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Searched refs:lw16 (Results 1 – 25 of 31) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/Mips/
Dtglobaladdr-wrapper.ll35 ; MM-NEXT: lw16 $4, 0($3)
39 ; MM-NEXT: lw16 $2, 0($5)
40 ; MM-NEXT: lw16 $2, 0($2)
Dmicromips-sw-lw-16.ll24 ; CHECK: lw16 ${{[0-9]+}}, 0($4)
26 ; CHECK: lw16 ${{[0-9]+}}, 4(${{[0-9]+}})
Dlw16-base-reg.ll24 ; CHECK: lw16 ${{[0-9]+}}, 0(${{[2-7]|16|17}})
Dtls.ll46 ; MM-DAG: lw16 $2, 0($2)
89 ; MM-DAG: lw16 $2, 0($2)
Dmno-ldc1-sdc1.ll133 ; MM-MNO-PIC-DAG: lw16 $[[R4:[0-9]+]], 0($[[R3]])
134 ; MM-MNO-PIC-DAG: lw16 $[[R5:[0-9]+]], 4($[[R3]])
270 ; MM-MNO-PIC-DAG: lw16 $[[R2:[0-9]+]], 0($[[R1]])
271 ; MM-MNO-PIC-DAG: lw16 $[[R3:[0-9]+]], 4($[[R1]])
Dmicromips-b-range.ll9 ; CHECK-NEXT: 10: 69 20 lw16 $2, 0($2)
/external/llvm/test/CodeGen/Mips/
Dmicromips-sw-lw-16.ll24 ; CHECK: lw16 ${{[0-9]+}}, 0($4)
26 ; CHECK: lw16 ${{[0-9]+}}, 4(${{[0-9]+}})
Dlw16-base-reg.ll26 ; CHECK: lw16 ${{[0-9]+}}, 0(${{[2-7]|16|17}})
Dmno-ldc1-sdc1.ll133 ; MM-MNO-PIC: lw16 $[[R4:[0-9]+]], 0($[[R3]])
134 ; MM-MNO-PIC: lw16 $[[R5:[0-9]+]], 4($[[R3]])
270 ; MM-MNO-PIC: lw16 $[[R2:[0-9]+]], 0($[[R1]])
271 ; MM-MNO-PIC: lw16 $[[R3:[0-9]+]], 4($[[R1]])
/external/llvm/test/MC/Mips/
Dmicromips-invalid.s43 lw16 $9, 8($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
49 lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
55 lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
61 lw16 $17, 8($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dmicromips-16-bit-instructions.s24 # CHECK-EL: lw16 $4, 8($17) # encoding: [0x12,0x6a]
79 # CHECK-EB: lw16 $4, 8($17) # encoding: [0x6a,0x12]
132 lw16 $4, 8($17)
/external/llvm-project/llvm/test/MC/Mips/
Dmicromips-invalid.s43 lw16 $9, 8($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
49 lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
55 lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of range
61 lw16 $17, 8($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dmicromips-16-bit-instructions.s24 # CHECK-EL: lw16 $4, 8($17) # encoding: [0x12,0x6a]
79 # CHECK-EB: lw16 $4, 8($17) # encoding: [0x6a,0x12]
132 lw16 $4, 8($17)
/external/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s53 lw16 $9, 8($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
54 …lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
55 …lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
56 lw16 $17, 8($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dvalid.s233 lw16 $4, 8($17) # CHECK: lw16 $4, 8($17) # encoding: [0x6a,0x12]
/external/llvm/test/MC/Mips/micromips64r6/
Dinvalid.s69 lw16 $9, 8($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
70 …lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
71 …lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
72 lw16 $17, 8($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dvalid.s29 lw16 $4, 8($17) # CHECK: lw16 $4, 8($17) # encoding: [0x6a,0x12]
/external/llvm-project/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s56 lw16 $9, 8($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
57 …lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
58 …lw16 $4, 68($17) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: immediate operand value out of ran…
59 lw16 $17, 8($10) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dvalid.s285 lw16 $4, 8($17) # CHECK: lw16 $4, 8($17) # encoding: [0x6a,0x12]
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dvalid.s40 lw16 $4, 8($17) # CHECK: lw16 $4, 8($17) # encoding: [0x6a,0x12] label
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt19 0x6a 0x12 # CHECK: lw16 $4, 8($17)
150 0x6a 0x12 # CHECK: lw16 $4, 8($17)
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt22 0x12 0x6a # CHECK: lw16 $4, 8($17)
Dvalid.txt22 0x6a 0x12 # CHECK: lw16 $4, 8($17)
/external/llvm-project/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt20 0x6a 0x12 # CHECK: lw16 $4, 8($17)
227 0x6a 0x12 # CHECK: lw16 $4, 8($17)
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt20 0x6a 0x12 # CHECK: lw16 $4, 8($17)
223 0x6a 0x12 # CHECK: lw16 $4, 8($17)

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