Home
last modified time | relevance | path

Searched refs:max_se (Results 1 – 21 of 21) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_sqtt.c70 unsigned max_se = device->physical_device->rad_info.max_se; in radv_emit_thread_trace_start() local
74 for (unsigned se = 0; se < max_se; se++) { in radv_emit_thread_trace_start()
273 unsigned max_se = device->physical_device->rad_info.max_se; in radv_emit_thread_trace_stop() local
290 for (unsigned se = 0; se < max_se; se++) { in radv_emit_thread_trace_stop()
592 …uint32_t dropped_cntr_per_se = info->gfx10_dropped_cntr / device->physical_device->rad_info.max_se; in radv_get_expected_buffer_size()
604 unsigned max_se = device->physical_device->rad_info.max_se; in radv_get_thread_trace() local
608 thread_trace->num_traces = max_se; in radv_get_thread_trace()
610 for (unsigned se = 0; se < max_se; se++) { in radv_get_thread_trace()
Dsi_cmd_buffer.c42 unsigned num_se = MAX2(physical_device->rad_info.max_se, 1); in si_write_harvested_raster_configs()
495 S_030980_NUM_PC_LINES(128 * physical_device->rad_info.max_se - 1)); in si_emit_graphics()
833 if (cmd_buffer->device->physical_device->rad_info.max_se < 4 || in si_get_ia_multi_vgt_param()
857 info->max_se == 4 && in si_get_ia_multi_vgt_param()
862 if (info->max_se > 2 && !wd_switch_on_eop) in si_get_ia_multi_vgt_param()
Dradv_rgp.c362 chunk->shader_engines = rad_info->max_se; in radv_fill_sqtt_asic_info()
Dradv_pipeline.c2160 unsigned num_se = device->physical_device->rad_info.max_se; in radv_pipeline_init_gs_ring_state()
3717 pipeline->device->physical_device->rad_info.max_se); in radv_gfx9_compute_bin_size()
3718 unsigned log_num_se = util_logbase2_ceil(pipeline->device->physical_device->rad_info.max_se); in radv_gfx9_compute_bin_size()
Dradv_device.c1893 pdevice->rad_info.max_se; in radv_GetPhysicalDeviceProperties2()
3315 device->physical_device->rad_info.max_se; in radv_get_hs_offchip_param()
3633 tess_factor_ring_size = 32768 * queue->device->physical_device->rad_info.max_se; in radv_get_preamble_cs()
/external/mesa3d/src/amd/common/
Dac_gpu_info.c503 info->max_se = amdinfo->num_shader_engines; in ac_query_gpu_info()
546 if (info->chip_class >= GFX10_3 && info->max_se > 1) { in ac_query_gpu_info()
547 unsigned num_rbs_per_se = info->num_render_backends / info->max_se; in ac_query_gpu_info()
550 info->num_se = info->max_se; in ac_query_gpu_info()
620 info->chip_class >= GFX10 || (info->chip_class >= GFX8 && info->max_se >= 2); in ac_query_gpu_info()
636 info->chip_class >= GFX8 && info->chip_class <= GFX9 && info->max_se >= 2; in ac_query_gpu_info()
659 for (i = 0; i < info->max_se; i++) { in ac_query_gpu_info()
777 info->pbb_max_alloc_count = MIN2(128, pc_lines / (4 * info->max_se)); in ac_query_gpu_info()
974 fprintf(f, " max_se = %i\n", info->max_se); in ac_print_gpu_info()
1157 se_tile_repeat = MAX2(se_width, se_height) * info->max_se; in ac_get_raster_config()
[all …]
Dac_gpu_info.h169 uint32_t max_se; /* number of shader engines incl. disabled ones */ member
/external/mesa3d/src/gallium/drivers/r600/
Dr600_perfcounter.c173 se_end = ctx->screen->info.max_se; in r600_pc_query_emit_stop()
260 sub_gids = sub_gids * screen->info.max_se; in get_group_state()
368 instances = screen->info.max_se; in r600_create_batch_query()
415 counter->qwords = screen->info.max_se; in r600_create_batch_query()
442 groups_se = screen->info.max_se; in r600_init_block_names()
631 block->num_groups *= rscreen->info.max_se; in r600_perfcounters_add_block()
Dr600_pipe_common.c1346 printf("max_se = %i\n", rscreen->info.max_se); in r600_common_screen_init()
Dr600_query.c439 result->u32 = rctx->screen->info.max_se; in r600_query_sw_get_result()
Dr600_state_common.c1658 unsigned num_ses = rctx->screen->b.info.max_se; in r600_setup_scratch_area_for_shader()
Devergreen_state.c4000 uint32_t immed_size = rscreen->b.info.max_se * 256 * 64 * util_format_get_blocksize(pformat); in evergreen_setup_immed_buffer()
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_winsys.c486 &ws->info.max_se); in do_winsys_init()
513 if (!ws->info.max_se) { in do_winsys_init()
516 ws->info.max_se = 1; in do_winsys_init()
525 ws->info.max_se = 2; in do_winsys_init()
528 ws->info.max_se = 4; in do_winsys_init()
533 ws->info.num_se = ws->info.max_se; in do_winsys_init()
540 (ws->info.max_se * ws->info.max_sh_per_se); in do_winsys_init()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_perfcounter.c988 se_end = sctx->screen->info.max_se; in si_pc_query_suspend()
1112 sub_gids = sub_gids * screen->info.max_se; in get_group_state()
1212 instances = screen->info.max_se; in si_create_batch_query()
1255 counter->qwords = screen->info.max_se; in si_create_batch_query()
1280 groups_se = screen->info.max_se; in si_init_block_names()
1488 block->num_instances = screen->info.max_se; in si_init_perfcounters()
1492 block->num_instances = MAX2(1, screen->info.max_se / 2); in si_init_perfcounters()
1506 block->num_groups *= screen->info.max_se; in si_init_perfcounters()
Dsi_state_binning.c47 util_logbase2_ceil(sscreen->info.num_render_backends / sscreen->info.max_se); in si_find_bin_size()
48 unsigned log_num_se = util_logbase2_ceil(sscreen->info.max_se); in si_find_bin_size()
Dsi_state_draw.c79 bool has_primid_instancing_bug = sctx->chip_class == GFX6 && sctx->screen->info.max_se == 1; in si_emit_derived_tess_state()
169 if (!sctx->screen->info.has_distributed_tess && sctx->screen->info.max_se > 1) in si_emit_derived_tess_state()
370 if (sscreen->info.max_se <= 2 || key->u.prim == PIPE_PRIM_POLYGON || in si_get_init_multi_vgt_param()
391 if (sscreen->info.chip_class <= GFX8 && sscreen->info.max_se == 4 && in si_get_init_multi_vgt_param()
396 if (sscreen->info.max_se == 4 && !wd_switch_on_eop) in si_get_init_multi_vgt_param()
Dsi_pipe.c998 sscreen->se_tile_repeat = 32 * sscreen->info.max_se; in radeonsi_screen_create_impl()
1141 unsigned max_offchip_buffers = max_offchip_buffers_per_se * sscreen->info.max_se; in radeonsi_screen_create_impl()
1155 sscreen->tess_factor_ring_size = 32768 * sscreen->info.max_se; in radeonsi_screen_create_impl()
Dsi_query.c538 result->u32 = sctx->screen->info.max_se; in si_query_sw_get_result()
Dsi_state.c5020 assert(se == ~0 || se < sctx->screen->info.max_se); in si_set_grbm_gfx_index_se()
5030 unsigned num_se = MAX2(sctx->screen->info.max_se, 1); in si_write_harvested_raster_configs()
Dsi_state_shaders.c3413 unsigned num_se = sctx->screen->info.max_se; in si_update_gs_ring_buffers()
/external/mesa3d/src/amd/vulkan/winsys/null/
Dradv_null_winsys.c108 info->max_se = 4; in radv_null_winsys_query_info()