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Searched refs:nir_op_fsub (Results 1 – 24 of 24) sorted by relevance

/external/mesa3d/prebuilt-intermediates/ir3/
Dir3_nir_trig.c89 nir_op_fsub,
/external/mesa3d/src/compiler/nir/
Dnir_lower_double_ops.c621 case nir_op_fsub: return nir_lower_dsub; in nir_lower_doubles_op_to_options_mask()
697 case nir_op_fsub: in lower_doubles_instr()
704 case nir_op_fsub: in lower_doubles_instr()
Dnir_lower_int_to_float.c78 case nir_op_isub: alu->op = nir_op_fsub; break; in lower_alu_instr()
Dnir_loop_analyze.c638 span = eval_const_binop(nir_op_fsub, bit_size, limit, initial, in get_iteration()
/external/mesa3d/prebuilt-intermediates/nir/
Dnir_opcodes.h241 nir_op_fsub, enumerator
Dnir_opt_algebraic.c5100 nir_op_fsub,
5140 nir_op_fsub,
25243 nir_op_fsub,
25293 nir_op_fsub,
25343 nir_op_fsub,
25367 nir_op_fsub,
25427 nir_op_fsub,
25477 nir_op_fsub,
25527 nir_op_fsub,
25551 nir_op_fsub,
[all …]
Dnir_builder_opcodes.h1076 return nir_build_alu(build, nir_op_fsub, src0, src1, NULL, NULL); in nir_fsub()
Dnir_constant_expressions.c47092 case nir_op_fsub: in nir_eval_const_opcode()
/external/mesa3d/prebuilt-intermediates/midgard/
Dmidgard_nir_algebraic.c336 nir_op_fsub,
1993 [nir_op_fsub] = {
/external/mesa3d/src/gallium/drivers/freedreno/a2xx/
Dir2_nir.c298 [nir_op_fsub] = {ADDs, ADDv}, in instr_create_alu()
457 case nir_op_fsub: in emit_alu()
/external/mesa3d/src/compiler/spirv/
Dvtn_alu.c274 case SpvOpFSub: return nir_op_fsub; in vtn_nir_alu_op_for_spirv_opcode()
/external/mesa3d/src/panfrost/bifrost/
Dbifrost_compile.c920 case nir_op_fsub: in bi_class_for_nir_alu()
1219 case nir_op_fsub: in emit_alu()
/external/mesa3d/src/mesa/program/
Dprog_to_nir.c643 [OPCODE_SUB] = nir_op_fsub,
/external/mesa3d/src/amd/compiler/
Daco_instruction_selection_setup.cpp678 case nir_op_fsub: in init_context()
Daco_instruction_selection.cpp1800 case nir_op_fsub: { in visit_alu_instr()
/external/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_emitaluinstruction.cpp145 case nir_op_fsub: return emit_alu_op2(instr, op2_add, op2_opt_neg_src1); in do_emit()
/external/mesa3d/src/intel/compiler/
Dbrw_vec4_nir.cpp1886 case nir_op_fsub: in nir_emit_alu()
/external/mesa3d/src/gallium/auxiliary/nir/
Dnir_to_tgsi.c807 case nir_op_fsub: in ntt_emit_alu()
/external/mesa3d/src/gallium/drivers/zink/nir_to_spirv/
Dnir_to_spirv.c1293 BINOP(nir_op_fsub, SpvOpFSub) in emit_alu()
/external/mesa3d/src/broadcom/compiler/
Dnir_to_vir.c1002 case nir_op_fsub: in ntq_emit_alu()
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_program.c1141 case nir_op_fsub: in ntq_emit_alu()
/external/mesa3d/src/freedreno/ir3/
Dir3_compiler_nir.c450 case nir_op_fsub: in emit_alu()
/external/mesa3d/src/amd/llvm/
Dac_nir_to_llvm.c621 case nir_op_fsub: in visit_alu()
/external/mesa3d/docs/relnotes/
D20.1.0.rst3972 - aco: implement 16-bit nir_op_fsub/nir_op_fadd