| /external/mesa3d/prebuilt-intermediates/midgard/ |
| D | midgard_nir_algebraic.c | 620 nir_op_ushr,
633 nir_op_ushr,
772 nir_op_ushr,
786 nir_op_ushr,
2250 [nir_op_ushr] = {
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| /external/mesa3d/prebuilt-intermediates/nir/ |
| D | nir_opcodes.h | 387 nir_op_ushr, enumerator
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| D | nir_opt_algebraic.c | 1944 nir_op_ushr,
1987 nir_op_ushr,
2025 nir_op_ushr,
6300 nir_op_ushr,
6310 nir_op_ushr,
6339 nir_op_ushr,
6536 nir_op_ushr,
6546 nir_op_ushr,
6575 nir_op_ushr,
6769 nir_op_ushr,
[all …]
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| D | nir_builder_opcodes.h | 1806 return nir_build_alu(build, nir_op_ushr, src0, src1, NULL, NULL); in nir_ushr()
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| /external/mesa3d/src/compiler/spirv/ |
| D | vtn_alu.c | 286 case SpvOpShiftRightLogical: return nir_op_ushr; in vtn_nir_alu_op_for_spirv_opcode()
720 assert (op == nir_op_ushr || op == nir_op_ishr || op == nir_op_ishl || in vtn_handle_alu()
780 case nir_op_ushr: in vtn_handle_alu()
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| D | spirv_to_nir.c | 2132 case nir_op_ushr: { in vtn_handle_constant()
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| /external/mesa3d/src/freedreno/ir3/ |
| D | ir3_nir_lower_io_offsets.c | 152 case nir_op_ushr: in ir3_nir_try_propagate_bit_shift()
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| D | ir3_compiler_nir.c | 587 case nir_op_ushr: in emit_alu()
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| /external/mesa3d/src/compiler/nir/ |
| D | nir_lower_bit_size.c | 65 if (i == 1 && (op == nir_op_ishl || op == nir_op_ishr || op == nir_op_ushr)) { in lower_alu_instr()
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| D | nir_lower_int64.c | 860 case nir_op_ushr: in nir_lower_int64_op_to_options_mask()
966 case nir_op_ushr: in lower_int64_alu_instr()
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| D | nir_range_analysis.c | 1318 case nir_op_ushr: in nir_unsigned_upper_bound()
1370 case nir_op_ushr: { in nir_unsigned_upper_bound()
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| /external/mesa3d/src/panfrost/bifrost/ |
| D | bifrost_compile.c | 936 case nir_op_ushr: in bi_class_for_nir_alu()
1244 case nir_op_ushr: in emit_alu()
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_from_nir.cpp | 482 case nir_op_ushr: in getOperation()
601 case nir_op_ushr: in getSubOp()
2506 case nir_op_ushr: in visit()
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| /external/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_emitaluinstruction.cpp | 128 case nir_op_ushr: return emit_alu_op2_int(instr, op2_lshr_int); in do_emit()
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_vec4_nir.cpp | 1812 case nir_op_ushr: in nir_emit_alu()
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| D | brw_fs_nir.cpp | 1815 case nir_op_ushr: in nir_emit_alu()
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| /external/mesa3d/src/gallium/auxiliary/nir/ |
| D | nir_to_tgsi.c | 646 [nir_op_ushr] = { TGSI_OPCODE_USHR, TGSI_OPCODE_U64SHR }, in ntt_emit_alu()
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| D | tgsi_to_nir.c | 1911 [TGSI_OPCODE_USHR] = nir_op_ushr,
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| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| D | lp_bld_nir.c | 919 case nir_op_ushr: { in do_alu_action()
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| /external/mesa3d/src/gallium/drivers/zink/nir_to_spirv/ |
| D | nir_to_spirv.c | 1307 BINOP(nir_op_ushr, SpvOpShiftRightLogical) in emit_alu()
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| /external/mesa3d/src/broadcom/compiler/ |
| D | nir_to_vir.c | 1041 case nir_op_ushr: in ntq_emit_alu()
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| /external/mesa3d/src/gallium/drivers/vc4/ |
| D | vc4_program.c | 1176 case nir_op_ushr: in ntq_emit_alu()
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_pipeline.c | 3005 case nir_op_ushr: in lower_bit_size_callback()
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| /external/mesa3d/src/amd/llvm/ |
| D | ac_nir_to_llvm.c | 691 case nir_op_ushr: in visit_alu()
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection.cpp | 1415 case nir_op_ushr: { in visit_alu_instr()
|