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/external/llvm-project/clang/test/Misc/
Dnvptx.languageOptsOpenCL.cl10 // RUN: %clang_cc1 -x cl -cl-std=CL %s -verify -triple nvptx64-unknown-unknown
11 // RUN: %clang_cc1 -x cl -cl-std=CL1.1 %s -verify -triple nvptx64-unknown-unknown
12 // RUN: %clang_cc1 -x cl -cl-std=CL1.2 %s -verify -triple nvptx64-unknown-unknown
13 // RUN: %clang_cc1 -x cl -cl-std=CL2.0 %s -verify -triple nvptx64-unknown-unknown
14 // RUN: %clang_cc1 -x cl -cl-std=CL %s -verify -triple nvptx64-unknown-unknown -Wpedantic-core-feat…
15 // RUN: %clang_cc1 -x cl -cl-std=CL1.1 %s -verify -triple nvptx64-unknown-unknown -Wpedantic-core-f…
16 // RUN: %clang_cc1 -x cl -cl-std=CL1.2 %s -verify -triple nvptx64-unknown-unknown -Wpedantic-core-f…
17 // RUN: %clang_cc1 -x cl -cl-std=CL2.0 %s -verify -triple nvptx64-unknown-unknown -Wpedantic-core-f…
/external/clang/test/Misc/
Dnvptx.languageOptsOpenCL.cl10 // RUN: %clang_cc1 -x cl -cl-std=CL %s -verify -triple nvptx64-unknown-unknown
11 // RUN: %clang_cc1 -x cl -cl-std=CL1.1 %s -verify -triple nvptx64-unknown-unknown
12 // RUN: %clang_cc1 -x cl -cl-std=CL1.2 %s -verify -triple nvptx64-unknown-unknown
13 // RUN: %clang_cc1 -x cl -cl-std=CL2.0 %s -verify -triple nvptx64-unknown-unknown
14 // RUN: %clang_cc1 -x cl -cl-std=CL %s -verify -triple nvptx64-unknown-unknown -Wpedantic-core-feat…
15 // RUN: %clang_cc1 -x cl -cl-std=CL1.1 %s -verify -triple nvptx64-unknown-unknown -Wpedantic-core-f…
16 // RUN: %clang_cc1 -x cl -cl-std=CL1.2 %s -verify -triple nvptx64-unknown-unknown -Wpedantic-core-f…
17 // RUN: %clang_cc1 -x cl -cl-std=CL2.0 %s -verify -triple nvptx64-unknown-unknown -Wpedantic-core-f…
/external/llvm/test/CodeGen/NVPTX/
Dvector-global.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
4 target triple = "nvptx64-nvidia-cuda"
Dfp-contract.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -fp-contract=fast | FileCheck %s --check-prefix=FAST
2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s --check-prefix=DEFAULT
4 target triple = "nvptx64-unknown-cuda"
Dconvergent-mir-call.ll1 ; RUN: llc -mtriple nvptx64-nvidia-cuda -stop-after machine-cp -o - < %s 2>&1 | FileCheck %s
6 target triple = "nvptx64-nvidia-cuda"
Dlower-alloca.ll2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
5 target triple = "nvptx64-unknown-unknown"
Dzeroext-32bit.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s
8 target triple = "nvptx64-unknown-cuda"
Dsymbol-naming.ll2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64
17 target triple = "nvptx64-unknown-unknown"
Dfma-disable.ll3 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA
4 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL
Dbranch-fold.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 -disable-cgp | FileCheck %s
6 target triple = "nvptx64-nvidia-cuda"
Dnounroll.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
4 target triple = "nvptx64-unknown-unknown"
Dbug21465.ll2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
5 target triple = "nvptx64-unknown-unknown"
/external/llvm-project/llvm/test/CodeGen/NVPTX/
Dvector-global.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
4 target triple = "nvptx64-nvidia-cuda"
Dfp-contract.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -fp-contract=fast | FileCheck %s --check-prefix=FAST
2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 | FileCheck %s --check-prefix=DEFAULT
4 target triple = "nvptx64-unknown-cuda"
Dnofunc.ll2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
8 target triple = "nvptx64-nvidia-cuda"
Dconvergent-mir-call.ll1 ; RUN: llc -mtriple nvptx64-nvidia-cuda -stop-after machine-cp -o - < %s 2>&1 | FileCheck %s
6 target triple = "nvptx64-nvidia-cuda"
Dlower-alloca.ll2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
5 target triple = "nvptx64-unknown-unknown"
Dzeroext-32bit.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_30 -verify-machineinstrs | FileCheck %s
8 target triple = "nvptx64-unknown-cuda"
Dnvvm-reflect-arch.ll4 ; RUN: opt %s -S -nvvm-reflect -O2 -mtriple=nvptx64 \
6 ; RUN: opt %s -S -nvvm-reflect -O2 -mtriple=nvptx64 -mcpu=sm_35 \
Dproxy-reg-erasure-mir.ll1 ; RUN: llc -march=nvptx64 -stop-before=nvptx-proxyreg-erasure < %s 2>&1 \
4 ; RUN: llc -march=nvptx64 -stop-after=nvptx-proxyreg-erasure < %s 2>&1 \
Dfma-disable.ll3 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA
4 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL
Dbranch-fold.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 -disable-cgp | FileCheck %s
6 target triple = "nvptx64-nvidia-cuda"
Dnounroll.ll1 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
4 target triple = "nvptx64-unknown-unknown"
Dbug21465.ll2 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_35 | FileCheck %s --check-prefix PTX
5 target triple = "nvptx64-unknown-unknown"
/external/llvm-project/llvm/test/Transforms/LoadStoreVectorizer/NVPTX/
Dpropagate-invariance-metadata.ll1 ; RUN: opt -load-store-vectorizer -march=nvptx64 -mcpu=sm_35 -S < %s | FileCheck %s
4 target triple = "nvptx64-nvidia-cuda"

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