1; RUN: llc < %s -march=nvptx -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA 2; RUN: llc < %s -march=nvptx -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL 3; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA 4; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL 5 6define ptx_device float @test_mul_add_f(float %x, float %y, float %z) { 7entry: 8; FMA: fma.rn.f32 9; MUL: mul.rn.f32 10; MUL: add.rn.f32 11 %a = fmul float %x, %y 12 %b = fadd float %a, %z 13 ret float %b 14} 15 16define ptx_device double @test_mul_add_d(double %x, double %y, double %z) { 17entry: 18; FMA: fma.rn.f64 19; MUL: mul.rn.f64 20; MUL: add.rn.f64 21 %a = fmul double %x, %y 22 %b = fadd double %a, %z 23 ret double %b 24} 25