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Searched refs:nxv32i8 (Results 1 – 17 of 17) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h162 nxv32i8 = 99, // n x 32 x i8 enumerator
459 case nxv32i8: return i8; in getVectorElementType()
581 case nxv32i8: in getVectorNumElements()
784 case nxv32i8: in getSizeInBits()
1036 if (NumElements == 32) return MVT::nxv32i8; in getScalableVectorVT()
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-extract-subvector.ll16 …%ext = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv32i8(<vscale x 32 x i8> %z0_z1_bc, i…
79 declare <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv32i8(<vscale x 32 x i8>, i32)
Dsve-intrinsics-ldN-reg+imm-addr-mode.ll14 define <vscale x 32 x i8> @ld2.nxv32i8(<vscale x 16 x i1> %Pg, <vscale x 16 x i8> *%addr) {
15 ; CHECK-LABEL: ld2.nxv32i8:
20 %res = call <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i…
30 %res = call <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i…
40 %res = call <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i…
51 %res = call <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i…
62 %res = call <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i…
73 %res = call <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i…
471 declare <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1>, i8*)
Dsve-split-store.ll78 …call void @llvm.masked.store.nxv32i8(<vscale x 32 x i8> %data, <vscale x 32 x i8> *%a, i32 1, <vsc…
132 declare void @llvm.masked.store.nxv32i8(<vscale x 32 x i8>, <vscale x 32 x i8>*, i32, <vscale x 32 …
Dsve-intrinsics-ldN-reg+reg-addr-mode.ll8 define <vscale x 32 x i8> @ld2.nxv32i8(<vscale x 16 x i1> %Pg, i8 *%addr, i64 %a) {
9 ; CHECK-LABEL: ld2.nxv32i8:
13 %res = call <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1> %Pg, i…
235 declare <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1>, i8*)
Dsve-split-load.ll90 …%load = call <vscale x 32 x i8> @llvm.masked.load.nxv32i8(<vscale x 32 x i8> *%a, i32 1, <vscale x…
143 declare <vscale x 32 x i8> @llvm.masked.load.nxv32i8(<vscale x 32 x i8>*, i32, <vscale x 32 x i1>, …
Dsve-intrinsics-create-tuple.ll15 …%tuple = tail call <vscale x 32 x i8> @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8(<vscale x 16…
20 …%extract = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8(<vscale x 32 x…
29 …%tuple = tail call <vscale x 32 x i8> @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8(<vscale x 16…
34 …%extract = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8(<vscale x 32 x…
762 declare <vscale x 32 x i8> @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8(<vscale x 16 x i8>, <vs…
782 declare <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8(<vscale x 32 x i8>, i32 imma…
Dsve-calling-convention-tuple-types.ll16 …%tuple = tail call <vscale x 32 x i8> @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8(<vscale x 16…
25 …%tuple = tail call <vscale x 32 x i8> @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8(<vscale x 16…
482 declare <vscale x 32 x i8> @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8(<vscale x 16 x i8>, <vsc…
Dsve-intrinsics-loads.ll293 …%res = call <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1> %pred…
544 declare <vscale x 32 x i8> @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1.p0i8(<vscale x 16 x i1>, i8*)
/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h182 nxv32i8 = 119, // n x 32 x i8 enumerator
527 case nxv32i8: in getVectorElementType()
688 case nxv32i8: in getVectorNumElements()
919 case nxv32i8: in getSizeInBits()
1244 if (NumElements == 32) return MVT::nxv32i8; in getScalableVectorVT()
/external/llvm-project/llvm/lib/Target/RISCV/Utils/
DRISCVBaseInfo.h284 constexpr MVT vint8m4_t = MVT::nxv32i8;
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVRegisterInfo.td285 // i8 nxv1i8 nxv2i8 nxv4i8 nxv8i8 nxv16i8 nxv32i8 nxv64i8
296 defvar vint8m4_t = nxv32i8;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp255 case MVT::nxv32i8: in getTypeForEVT()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td128 def nxv32i8 : ValueType<256, 99>; // n x 32 x i8 vector value
/external/llvm-project/llvm/include/llvm/CodeGen/
DValueTypes.td149 def nxv32i8 : ValueType<256, 119>; // n x 32 x i8 vector value
/external/llvm-project/llvm/lib/CodeGen/
DValueTypes.cpp406 case MVT::nxv32i8: in getTypeForEVT()
/external/llvm-project/llvm/utils/TableGen/
DCodeGenTarget.cpp185 case MVT::nxv32i8: return "MVT::nxv32i8"; in getEnumName()