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Searched refs:orrs (Results 1 – 25 of 105) sorted by relevance

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/external/llvm-project/llvm/test/MC/AArch64/SVE/
Dorrs-diagnostics.s6 orrs p0.h, p0/z, p0.h, p1.h label
11 orrs p0.s, p0/z, p0.s, p1.s label
16 orrs p0.d, p0/z, p0.d, p1.d label
24 orrs p0.b, p0/m, p1.b, p2.b label
Dorrs.s10 orrs p0.b, p0/z, p0.b, p1.b label
16 orrs p0.b, p0/z, p0.b, p0.b label
22 orrs p15.b, p15/z, p15.b, p15.b label
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dmve-vecreduce-bit.ll430 ; CHECK-NEXT: orrs r0, r1
443 ; CHECK-NEXT: orrs r0, r1
445 ; CHECK-NEXT: orrs r1, r2
446 ; CHECK-NEXT: orrs r0, r1
460 ; CHECK-NEXT: orrs r0, r1
462 ; CHECK-NEXT: orrs r1, r2
463 ; CHECK-NEXT: orrs r0, r1
476 ; CHECK-NEXT: orrs r0, r1
478 ; CHECK-NEXT: orrs r1, r2
479 ; CHECK-NEXT: orrs r0, r1
[all …]
Dumulo-128-legalisation-lowering.ll71 ; THUMBV7-NEXT: orrs r0, r3
88 ; THUMBV7-NEXT: orrs r3, r2
94 ; THUMBV7-NEXT: orrs.w r7, r2, r11
100 ; THUMBV7-NEXT: orrs r1, r3
101 ; THUMBV7-NEXT: orrs r0, r1
Dumulo-64-legalisation-lowering.ll26 ; THUMBV7-NEXT: orrs r1, r5
31 ; THUMBV7-NEXT: orrs r2, r1
Dmve-pred-or.ll382 ; CHECK-NEXT: orrs r0, r1
390 ; CHECK-NEXT: orrs r0, r1
398 ; CHECK-NEXT: orrs r0, r1
406 ; CHECK-NEXT: orrs r0, r1
435 ; CHECK-NEXT: orrs r0, r1
446 ; CHECK-NEXT: orrs r0, r1
454 ; CHECK-NEXT: orrs r0, r1
462 ; CHECK-NEXT: orrs r0, r1
/external/llvm-project/compiler-rt/lib/builtins/arm/
Daddsf3.S68 orrs r4, r6
74 orrs r5, r6
100 orrs r5, r7
128 orrs r4, r7 // result Significand
139 orrs r0, r2
143 orrs r0, r4
202 orrs r4, r7
262 orrs r0, r1
268 orrs r0, r4
Dcomparesf2.S68 orrs r6, r2
70 orrs r12, r2, r3, lsr #1
/external/capstone/suite/MC/ARM/
Dthumb2-narrow-dp.ll.cs299 0x52,0xea,0x01,0x07 = orrs.w r7, r2, r1
300 0x0a,0x43 = orrs r2, r1
301 0x0b,0x43 = orrs r3, r1
302 0x54,0xea,0x01,0x04 = orrs.w r4, r4, r1
303 0x51,0xea,0x05,0x05 = orrs.w r5, r1, r5
307 0x51,0xea,0x08,0x08 = orrs.w r8, r1, r8
308 0x58,0xea,0x01,0x08 = orrs.w r8, r8, r1
309 0x58,0xea,0x01,0x01 = orrs.w r1, r8, r1
310 0x50,0xea,0x08,0x00 = orrs.w r0, r0, r8
311 0x51,0xea,0x41,0x01 = orrs.w r1, r1, r1, lsl #1
[all …]
/external/llvm-project/llvm/test/CodeGen/Thumb/
Dumulo-128-legalisation-lowering.ll56 ; THUMBV6-NEXT: orrs r6, r1
57 ; THUMBV6-NEXT: orrs r6, r7
70 ; THUMBV6-NEXT: orrs r0, r6
99 ; THUMBV6-NEXT: orrs r7, r1
100 ; THUMBV6-NEXT: orrs r7, r6
112 ; THUMBV6-NEXT: orrs r2, r7
115 ; THUMBV6-NEXT: orrs r6, r3
119 ; THUMBV6-NEXT: orrs r4, r3
123 ; THUMBV6-NEXT: orrs r4, r2
125 ; THUMBV6-NEXT: orrs r4, r2
[all …]
/external/llvm/test/MC/ARM/
Dthumb_rewrites.s92 orrs r0, r0, r1
93 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
95 orrs r0, r1, r0
96 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
/external/llvm-project/llvm/test/MC/ARM/
Dthumb_rewrites.s92 orrs r0, r0, r1
93 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
95 orrs r0, r1, r0
96 @ CHECK: orrs r0, r1 @ encoding: [0x08,0x43]
/external/arm-optimized-routines/string/aarch64/
Dstrchr-sve.S41 orrs p4.b, p1/z, p2.b, p3.b /* c | 0 */
59 orrs p4.b, p0/z, p2.b, p3.b /* c | 0 */
/external/llvm-project/libc/AOR_v20.02/string/aarch64/
Dstrchr-sve.S45 orrs p4.b, p1/z, p2.b, p3.b /* c | 0 */
63 orrs p4.b, p0/z, p2.b, p3.b /* c | 0 */
/external/llvm-project/llvm/test/CodeGen/ARM/Windows/
Ddivision.ll33 ; CHECK: orrs.w r4, r0, r1
45 ; CHECK: orrs.w r4, r0, r1
/external/compiler-rt/lib/builtins/arm/
Dcomparesf2.S55 orrs r12, r2, r3, lsr #1
116 orrs r12, r2, r3, lsr #1
/external/llvm/test/CodeGen/ARM/
Dfast-isel-binary.ll52 ; THUMB: orrs r0, r1
64 ; THUMB: orrs r0, r1
76 ; THUMB: orrs r0, r1
D2011-04-15-RegisterCmpPeephole.ll23 ; CHECK: orrs
/external/llvm-project/llvm/test/CodeGen/ARM/
Dfast-isel-binary.ll52 ; THUMB: orrs r0, r1
64 ; THUMB: orrs r0, r1
76 ; THUMB: orrs r0, r1
Dand-load-combine.ll211 ; THUMB1-NEXT: orrs r1, r0
220 ; THUMB2-NEXT: orrs r0, r1
256 ; THUMB1-NEXT: orrs r1, r0
265 ; THUMB2-NEXT: orrs r0, r1
302 ; THUMB1-NEXT: orrs r1, r0
311 ; THUMB2-NEXT: orrs r0, r1
347 ; THUMB1-NEXT: orrs r1, r0
356 ; THUMB2-NEXT: orrs r0, r1
572 ; THUMB1-NEXT: orrs r0, r1
580 ; THUMB2-NEXT: orrs r0, r1
[all …]
Dfpcmp_ueq.ll16 ; CHECK-ARMv4: orrs r0, r0,
D2011-04-15-RegisterCmpPeephole.ll23 ; CHECK: orrs
/external/llvm-project/libc/AOR_v20.02/string/arm/
Dstrcmp-armv6m.S22 orrs r1, r0
35 orrs r2, r1
/external/arm-optimized-routines/string/arm/
Dstrcmp-armv6m.S21 orrs r1, r0
34 orrs r2, r1
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll127 ; ARMv7A: orrs r0, r1
134 ; ARMv7M: orrs r0, r1

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