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Searched refs:prfop (Results 1 – 25 of 29) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-gather-prefetches-vect-base-imm-offset.ll7 ; PRFB <prfop>, <Pg>, [<Zn>.S{, #<imm>}] -> 32-bit element
16 ; PRFB <prfop>, <Pg>, [<Zn>.D{, #<imm>}] -> 64-bit element
25 ; PRFH <prfop>, <Pg>, [<Zn>.S{, #<imm>}] -> 32-bit element
34 ; PRFH <prfop>, <Pg>, [<Zn>.D{, #<imm>}] -> 64-bit element
43 ; PRFW <prfop>, <Pg>, [<Zn>.S{, #<imm>}] -> 32-bit element
52 ; PRFW <prfop>, <Pg>, [<Zn>.D{, #<imm>}] -> 64-bit element
61 ; PRFD <prfop>, <Pg>, [<Zn>.S{, #<imm>}] -> 32-bit element
70 ; PRFD <prfop>, <Pg>, [<Zn>.D{, #<imm>}] -> 64-bit element
79 …er.scalar.offset.nx4vi32(<vscale x 4 x i1> %Pg, <vscale x 4 x i32> %bases, i64 %offset, i32 %prfop)
80 …er.scalar.offset.nx2vi64(<vscale x 2 x i1> %Pg, <vscale x 2 x i64> %bases, i64 %offset, i32 %prfop)
[all …]
Dsve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll7 ; PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>] -> 32-bit indexes
24 ; PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, <mod>] -> 32-bit unpacked indexes
41 ; PRFB <prfop>, <Pg>, [<Xn|SP>, <Zm>.D] -> 64-bit indexes
52 ; PRFH <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>] -> 32-bit indexes
69 ; PRFH <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, <mod> #1] -> 32-bit unpacked indexes
86 ; PRFH <prfop>, <Pg>, [<Xn|SP>, <Zm>.D] -> 64-bit indexes
97 ; PRFW <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>] -> 32-bit indexes
114 ; PRFW <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, <mod> #2] -> 32-bit unpacked indexes
131 ; PRFW <prfop>, <Pg>, [<Xn|SP>, <Zm>.D] -> 64-bit indexes
142 ; PRFD <prfop>, <Pg>, [<Xn|SP>, <Zm>.S, <mod>] -> 32-bit indexes
[all …]
Dsve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll7 ; PRFB <prfop>, <Pg>, [<Zn>.S{, #<imm>}] -> 32-bit element, imm = 0, 1, ..., 31
34 ; PRFB <prfop>, <Pg>, [<Zn>.D{, #<imm>}] -> 64-bit element, imm = 0, 1, ..., 31
63 ; PRFH <prfop>, <Pg>, [<Zn>.S{, #<imm>}] -> 32-bit element, imm = 0, 2, ..., 62
99 ; PRFH <prfop>, <Pg>, [<Zn>.D{, #<imm>}] -> 64-bit element, imm = 0, 2, ..., 62
137 ; PRFW <prfop>, <Pg>, [<Zn>.S{, #<imm>}] -> 32-bit element, imm = 0, 4, ..., 124
173 ; PRFW <prfop>, <Pg>, [<Zn>.D{, #<imm>}] -> 64-bit element, imm = 0, 4, ..., 124
211 ; PRFD <prfop>, <Pg>, [<Zn>.S{, #<imm>}] -> 32-bit element, imm = 0, 8, ..., 248
247 ; PRFD <prfop>, <Pg>, [<Zn>.D{, #<imm>}] -> 64-bit element, imm = 0, 4, ..., 248
283 …er.scalar.offset.nx4vi32(<vscale x 4 x i1> %Pg, <vscale x 4 x i32> %bases, i64 %offset, i32 %prfop)
284 …er.scalar.offset.nx2vi64(<vscale x 2 x i1> %Pg, <vscale x 2 x i64> %bases, i64 %offset, i32 %prfop)
[all …]
Dsve-intrinsics-contiguous-prefetches.ll8 ; Testing prfop encodings
/external/vixl/src/aarch64/
Dassembler-sve-aarch64.cc4474 PrefetchOperation prfop, in SVEGatherPrefetchVectorPlusImmediateHelper() argument
4506 Emit(op | SVEImmPrefetchOperation(prfop) | PgLow8(pg) | Rn(zn) | in SVEGatherPrefetchVectorPlusImmediateHelper()
4511 PrefetchOperation prfop, in SVEGatherPrefetchScalarPlusImmediateHelper() argument
4537 Emit(op | SVEImmPrefetchOperation(prfop) | PgLow8(pg) | in SVEGatherPrefetchScalarPlusImmediateHelper()
4542 PrefetchOperation prfop, in SVEContiguousPrefetchScalarPlusScalarHelper() argument
4575 Emit(op | SVEImmPrefetchOperation(prfop) | PgLow8(pg) | in SVEContiguousPrefetchScalarPlusScalarHelper()
4580 PrefetchOperation prfop, in SVEContiguousPrefetchScalarPlusVectorHelper() argument
4665 Emit(op | SVEImmPrefetchOperation(prfop) | PgLow8(pg) | sx | in SVEContiguousPrefetchScalarPlusVectorHelper()
4669 void Assembler::SVEPrefetchHelper(PrefetchOperation prfop, in SVEPrefetchHelper() argument
4676 SVEGatherPrefetchVectorPlusImmediateHelper(prfop, pg, addr, prefetch_size); in SVEPrefetchHelper()
[all …]
Dassembler-aarch64.h5119 void prfb(PrefetchOperation prfop,
5124 void prfh(PrefetchOperation prfop,
5129 void prfw(PrefetchOperation prfop,
5134 void prfd(PrefetchOperation prfop,
6749 void SVEContiguousPrefetchScalarPlusScalarHelper(PrefetchOperation prfop,
6754 void SVEContiguousPrefetchScalarPlusVectorHelper(PrefetchOperation prfop,
6759 void SVEGatherPrefetchVectorPlusImmediateHelper(PrefetchOperation prfop,
6764 void SVEGatherPrefetchScalarPlusImmediateHelper(PrefetchOperation prfop,
6769 void SVEPrefetchHelper(PrefetchOperation prfop,
6774 static Instr SVEImmPrefetchOperation(PrefetchOperation prfop) { in SVEImmPrefetchOperation() argument
[all …]
Dmacro-assembler-aarch64.h5484 void Prfb(PrefetchOperation prfop, in Prfb() argument
5489 prfb(prfop, pg, addr); in Prfb()
5491 void Prfh(PrefetchOperation prfop, in Prfh() argument
5496 prfh(prfop, pg, addr); in Prfh()
5498 void Prfw(PrefetchOperation prfop, in Prfw() argument
5503 prfw(prfop, pg, addr); in Prfw()
5505 void Prfd(PrefetchOperation prfop, in Prfd() argument
5510 prfd(prfop, pg, addr); in Prfd()
Dassembler-aarch64.cc5742 Instr prfop = ImmPrefetchOperation(op); in Prefetch() local
5743 Emit(PRFM | prfop | LoadStoreMemOperand(addr, kXRegSizeInBytesLog2, option)); in Prefetch()
/external/llvm-project/llvm/lib/Target/AArch64/
DSVEInstrFormats.td6594 : I<(outs), (ins sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, simm6s1:$imm6),
6595 asm, "\t$prfop, $Pg, [$Rn, $imm6, mul vl]",
6601 bits<4> prfop;
6609 let Inst{3-0} = prfop;
6617 def : InstAlias<asm # "\t$prfop, $Pg, [$Rn]",
6618 (!cast<Instruction>(NAME) sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0), 1>;
6622 : I<(outs), (ins sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, gprty:$Rm),
6623 asm, "\t$prfop, $Pg, [$Rn, $Rm]",
6629 bits<4> prfop;
6640 let Inst{3-0} = prfop;
[all …]
DAArch64SVEInstrInfo.td1068 …h (PredTy PPR_3b:$gp), (am_sve_indexed_s6 GPR64sp:$base, simm6s1:$offset), (i32 sve_prfop:$prfop)),
1069 (RegImmInst sve_prfop:$prfop, PPR_3b:$gp, GPR64:$base, simm6s1:$offset)>;
1074 …: Pat<(prefetch (PredTy PPR_3b:$gp), (AddrCP GPR64sp:$base, GPR64:$index), (i32 sve_prfop:$prfop)),
1075 (RegRegInst sve_prfop:$prfop, PPR_3b:$gp, GPR64:$base, GPR64:$index)>;
1079 def _default : Pat<(prefetch (PredTy PPR_3b:$gp), GPR64:$base, (i32 sve_prfop:$prfop)),
1080 (RegImmInst sve_prfop:$prfop, PPR_3b:$gp, GPR64:$base, (i64 0))>;
DAArch64InstrFormats.td3184 def prfop : Operand<i32> {
3192 (outs), (ins prfop:$Rt, GPR64sp:$Rn, uimm12s8:$offset),
3227 : I<(outs), (ins prfop:$Rt, am_ldrlit:$label),
3742 (ins prfop:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend64:$extend),
3750 (ins prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro_Xextend64:$extend),
3758 (!cast<Instruction>(NAME # "roX") prfop:$Rt,
3862 (ins prfop:$Rt, GPR64sp:$Rn, simm9:$offset),
3867 (!cast<Instruction>(NAME # "i") prfop:$Rt, GPR64sp:$Rn, 0)>;
/external/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64InstPrinter.cpp1127 unsigned prfop = MI->getOperand(OpNum).getImm(); in printPrefetchOp() local
1129 if (auto PRFM = AArch64SVEPRFM::lookupSVEPRFMByEncoding(prfop)) { in printPrefetchOp()
1133 } else if (auto PRFM = AArch64PRFM::lookupPRFMByEncoding(prfop)) { in printPrefetchOp()
1138 O << '#' << formatImm(prfop); in printPrefetchOp()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/MCTargetDesc/
DAArch64InstPrinter.cpp1113 unsigned prfop = MI->getOperand(OpNum).getImm(); in printPrefetchOp() local
1115 if (auto PRFM = AArch64SVEPRFM::lookupSVEPRFMByEncoding(prfop)) { in printPrefetchOp()
1119 } else if (auto PRFM = AArch64PRFM::lookupPRFMByEncoding(prfop)) { in printPrefetchOp()
1124 O << '#' << formatImm(prfop); in printPrefetchOp()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DSVEInstrFormats.td5948 : I<(outs), (ins sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, simm6s1:$imm6),
5949 asm, "\t$prfop, $Pg, [$Rn, $imm6, mul vl]",
5955 bits<4> prfop;
5963 let Inst{3-0} = prfop;
5971 def : InstAlias<asm # "\t$prfop, $Pg, [$Rn]",
5972 (!cast<Instruction>(NAME) sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0), 1>;
5976 : I<(outs), (ins sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, gprty:$Rm),
5977 asm, "\t$prfop, $Pg, [$Rn, $Rm]",
5983 bits<4> prfop;
5994 let Inst{3-0} = prfop;
[all …]
DAArch64InstrFormats.td3048 def prfop : Operand<i32> {
3056 (outs), (ins prfop:$Rt, GPR64sp:$Rn, uimm12s8:$offset),
3091 : I<(outs), (ins prfop:$Rt, am_ldrlit:$label),
3606 (ins prfop:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend64:$extend),
3614 (ins prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro_Xextend64:$extend),
3622 (!cast<Instruction>(NAME # "roX") prfop:$Rt,
3726 (ins prfop:$Rt, GPR64sp:$Rn, simm9:$offset),
3731 (!cast<Instruction>(NAME # "i") prfop:$Rt, GPR64sp:$Rn, 0)>;
/external/llvm/lib/Target/AArch64/InstPrinter/
DAArch64InstPrinter.cpp1193 unsigned prfop = MI->getOperand(OpNum).getImm(); in printPrefetchOp() local
1194 auto PRFM = AArch64PRFM::lookupPRFMByEncoding(prfop); in printPrefetchOp()
1198 O << '#' << formatImm(prfop); in printPrefetchOp()
/external/capstone/arch/AArch64/
DAArch64InstPrinter.c1248 unsigned prfop = (unsigned)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); in printPrefetchOp() local
1250 const char *Name = A64NamedImmMapper_toString(&A64PRFM_PRFMMapper, prfop, &Valid); in printPrefetchOp()
1257 … MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].prefetch = prfop + 1; in printPrefetchOp()
1261 printInt32Bang(O, prfop); in printPrefetchOp()
1270 MI->flat_insn->detail->arm64.operands[MI->flat_insn->detail->arm64.op_count].imm = prfop; in printPrefetchOp()
DAArch64GenAsmWriter.inc10448 // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0)
10459 // (PRFMui prfop:$Rt, GPR64sp:$Rn, 0)
10470 // (PRFUMi prfop:$Rt, GPR64sp:$Rn, 0)
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp2070 unsigned prfop = MCE->getValue(); in tryParsePrefetch() local
2071 if (prfop > 31) { in tryParsePrefetch()
2078 prfop, PRFM ? PRFM->Name : "", S, getContext())); in tryParsePrefetch()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp2383 unsigned prfop = MCE->getValue(); in tryParsePrefetch() local
2384 if (prfop > MaxVal) { in tryParsePrefetch()
2392 prfop, PRFM.getValueOr(""), S, getContext())); in tryParsePrefetch()
/external/llvm-project/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp2434 unsigned prfop = MCE->getValue(); in tryParsePrefetch() local
2435 if (prfop > MaxVal) { in tryParsePrefetch()
2443 prfop, PRFM.getValueOr(""), S, getContext())); in tryParsePrefetch()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmWriter.inc20251 // (PRFB_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2433
20257 // (PRFB_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2438
20263 // (PRFB_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2443
20269 // (PRFD_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2448
20275 // (PRFD_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2453
20281 // (PRFD_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2458
20287 // (PRFH_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2463
20293 // (PRFH_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2468
20299 // (PRFH_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2473
20305 // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2478
[all …]
DAArch64GenAsmWriter1.inc20972 // (PRFB_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2433
20978 // (PRFB_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2438
20984 // (PRFB_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2443
20990 // (PRFD_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2448
20996 // (PRFD_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2453
21002 // (PRFD_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2458
21008 // (PRFH_D_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR64:$Zn, 0) - 2463
21014 // (PRFH_PRI sve_prfop:$prfop, PPR3bAny:$Pg, GPR64sp:$Rn, 0) - 2468
21020 // (PRFH_S_PZI sve_prfop:$prfop, PPR3bAny:$Pg, ZPR32:$Zn, 0) - 2473
21026 // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) - 2478
[all …]
DAArch64GenMCCodeEmitter.inc6430 // op: prfop
7388 // op: prfop
11277 // op: prfop
11510 // op: prfop
/external/llvm/lib/Target/AArch64/
DAArch64InstrFormats.td2439 def prfop : Operand<i32> {
2447 (outs), (ins prfop:$Rt, GPR64sp:$Rn, uimm12s8:$offset),
2481 : I<(outs), (ins prfop:$Rt, am_ldrlit:$label),
2968 (ins prfop:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro_Wextend64:$extend),
2976 (ins prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro_Xextend64:$extend),
2984 (!cast<Instruction>(NAME # "roX") prfop:$Rt,
3045 (ins prfop:$Rt, GPR64sp:$Rn, simm9:$offset),
3050 (!cast<Instruction>(NAME # "i") prfop:$Rt, GPR64sp:$Rn, 0)>;

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