1; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s 2>%t | FileCheck %s 2; RUN: FileCheck --check-prefix=WARN --allow-empty %s <%t 3 4; If this check fails please read test/CodeGen/AArch64/README for instructions on how to resolve it. 5; WARN-NOT: warning 6 7; 8; Testing prfop encodings 9; 10define void @test_svprf_pldl1strm(<vscale x 16 x i1> %pg, i8* %base) { 11; CHECK-LABEL: test_svprf_pldl1strm 12; CHECK: prfb pldl1strm, p0, [x0] 13entry: 14 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 1) 15 ret void 16} 17 18define void @test_svprf_pldl2keep(<vscale x 16 x i1> %pg, i8* %base) { 19; CHECK-LABEL: test_svprf_pldl2keep 20; CHECK: prfb pldl2keep, p0, [x0] 21entry: 22 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 2) 23 ret void 24} 25 26define void @test_svprf_pldl2strm(<vscale x 16 x i1> %pg, i8* %base) { 27; CHECK-LABEL: test_svprf_pldl2strm 28; CHECK: prfb pldl2strm, p0, [x0] 29entry: 30 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 3) 31 ret void 32} 33 34define void @test_svprf_pldl3keep(<vscale x 16 x i1> %pg, i8* %base) { 35; CHECK-LABEL: test_svprf_pldl3keep 36; CHECK: prfb pldl3keep, p0, [x0] 37entry: 38 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 4) 39 ret void 40} 41 42define void @test_svprf_pldl3strm(<vscale x 16 x i1> %pg, i8* %base) { 43; CHECK-LABEL: test_svprf_pldl3strm 44; CHECK: prfb pldl3strm, p0, [x0] 45entry: 46 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 5) 47 ret void 48} 49 50define void @test_svprf_pstl1keep(<vscale x 16 x i1> %pg, i8* %base) { 51; CHECK-LABEL: test_svprf_pstl1keep 52; CHECK: prfb pstl1keep, p0, [x0] 53entry: 54 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 8) 55 ret void 56} 57 58define void @test_svprf_pstl1strm(<vscale x 16 x i1> %pg, i8* %base) { 59; CHECK-LABEL: test_svprf_pstl1strm 60; CHECK: prfb pstl1strm, p0, [x0] 61entry: 62 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 9) 63 ret void 64} 65 66define void @test_svprf_pstl2keep(<vscale x 16 x i1> %pg, i8* %base) { 67; CHECK-LABEL: test_svprf_pstl2keep 68; CHECK: prfb pstl2keep, p0, [x0] 69entry: 70 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 10) 71 ret void 72} 73 74define void @test_svprf_pstl2strm(<vscale x 16 x i1> %pg, i8* %base) { 75; CHECK-LABEL: test_svprf_pstl2strm 76; CHECK: prfb pstl2strm, p0, [x0] 77entry: 78 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 11) 79 ret void 80} 81 82define void @test_svprf_pstl3keep(<vscale x 16 x i1> %pg, i8* %base) { 83; CHECK-LABEL: test_svprf_pstl3keep 84; CHECK: prfb pstl3keep, p0, [x0] 85entry: 86 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 12) 87 ret void 88} 89 90define void @test_svprf_pstl3strm(<vscale x 16 x i1> %pg, i8* %base) { 91; CHECK-LABEL: test_svprf_pstl3strm 92; CHECK: prfb pstl3strm, p0, [x0] 93entry: 94 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 13) 95 ret void 96} 97 98; 99; Testing imm limits of SI form 100; 101 102define void @test_svprf_vnum_under(<vscale x 16 x i1> %pg, <vscale x 16 x i8>* %base) { 103; CHECK-LABEL: test_svprf_vnum_under 104; CHECK-NOT: prfb pstl3strm, p0, [x0, #-33, mul vl] 105entry: 106 %gep = getelementptr inbounds <vscale x 16 x i8>, <vscale x 16 x i8>* %base, i64 -33, i64 0 107 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %gep, i32 13) 108 ret void 109} 110 111define void @test_svprf_vnum_min(<vscale x 16 x i1> %pg, <vscale x 16 x i8>* %base) { 112; CHECK-LABEL: test_svprf_vnum_min 113; CHECK: prfb pstl3strm, p0, [x0, #-32, mul vl] 114entry: 115 %gep = getelementptr inbounds <vscale x 16 x i8>, <vscale x 16 x i8>* %base, i64 -32, i64 0 116 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %gep, i32 13) 117 ret void 118} 119 120define void @test_svprf_vnum_over(<vscale x 16 x i1> %pg, <vscale x 16 x i8>* %base) { 121; CHECK-LABEL: test_svprf_vnum_over 122; CHECK-NOT: prfb pstl3strm, p0, [x0, #32, mul vl] 123entry: 124 %gep = getelementptr inbounds <vscale x 16 x i8>, <vscale x 16 x i8>* %base, i64 32, i64 0 125 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %gep, i32 13) 126 ret void 127} 128 129define void @test_svprf_vnum_max(<vscale x 16 x i1> %pg, <vscale x 16 x i8>* %base) { 130; CHECK-LABEL: test_svprf_vnum_max 131; CHECK: prfb pstl3strm, p0, [x0, #31, mul vl] 132entry: 133 %gep = getelementptr inbounds <vscale x 16 x i8>, <vscale x 16 x i8>* %base, i64 31, i64 0 134 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %gep, i32 13) 135 ret void 136} 137 138; 139; scalar contiguous 140; 141 142define void @test_svprfb(<vscale x 16 x i1> %pg, i8* %base) { 143; CHECK-LABEL: test_svprfb 144; CHECK: prfb pldl1keep, p0, [x0] 145entry: 146 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %base, i32 0) 147 ret void 148} 149 150define void @test_svprfh(<vscale x 8 x i1> %pg, i8* %base) { 151; CHECK-LABEL: test_svprfh 152; CHECK: prfh pldl1keep, p0, [x0] 153entry: 154 tail call void @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %pg, i8* %base, i32 0) 155 ret void 156} 157 158define void @test_svprfw(<vscale x 4 x i1> %pg, i8* %base) { 159; CHECK-LABEL: test_svprfw 160; CHECK: prfw pldl1keep, p0, [x0] 161entry: 162 tail call void @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %pg, i8* %base, i32 0) 163 ret void 164} 165 166define void @test_svprfd(<vscale x 2 x i1> %pg, i8* %base) { 167; CHECK-LABEL: test_svprfd 168; CHECK: prfd pldl1keep, p0, [x0] 169entry: 170 tail call void @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %pg, i8* %base, i32 0) 171 ret void 172} 173 174; 175; scalar + imm contiguous 176; 177; imm form of prfb is tested above 178 179define void @test_svprfh_vnum(<vscale x 8 x i1> %pg, <vscale x 8 x i16>* %base) { 180; CHECK-LABEL: test_svprfh_vnum 181; CHECK: prfh pstl3strm, p0, [x0, #31, mul vl] 182entry: 183 %gep = getelementptr <vscale x 8 x i16>, <vscale x 8 x i16>* %base, i64 31 184 %addr = bitcast <vscale x 8 x i16>* %gep to i8* 185 tail call void @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %pg, i8* %addr, i32 13) 186 ret void 187} 188 189define void @test_svprfw_vnum(<vscale x 4 x i1> %pg, <vscale x 4 x i32>* %base) { 190; CHECK-LABEL: test_svprfw_vnum 191; CHECK: prfw pstl3strm, p0, [x0, #31, mul vl] 192entry: 193 %gep = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* %base, i64 31 194 %addr = bitcast <vscale x 4 x i32>* %gep to i8* 195 tail call void @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %pg, i8* %addr, i32 13) 196 ret void 197} 198 199define void @test_svprfd_vnum(<vscale x 2 x i1> %pg, <vscale x 2 x i64>* %base) { 200; CHECK-LABEL: test_svprfd_vnum 201; CHECK: prfd pstl3strm, p0, [x0, #31, mul vl] 202entry: 203 %gep = getelementptr <vscale x 2 x i64>, <vscale x 2 x i64>* %base, i64 31 204 %addr = bitcast <vscale x 2 x i64>* %gep to i8* 205 tail call void @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %pg, i8* %addr, i32 13) 206 ret void 207} 208 209; 210; scalar + scaled scalar contiguous 211; 212 213define void @test_svprfb_ss(<vscale x 16 x i1> %pg, i8* %base, i64 %offset) { 214; CHECK-LABEL: test_svprfb_ss 215; CHECK: prfb pstl3strm, p0, [x0, x1] 216entry: 217 %addr = getelementptr i8, i8* %base, i64 %offset 218 tail call void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1> %pg, i8* %addr, i32 13) 219 ret void 220} 221 222define void @test_svprfh_ss(<vscale x 8 x i1> %pg, i16* %base, i64 %offset) { 223; CHECK-LABEL: test_svprfh_ss 224; CHECK: prfh pstl3strm, p0, [x0, x1, lsl #1] 225entry: 226 %gep = getelementptr i16, i16* %base, i64 %offset 227 %addr = bitcast i16* %gep to i8* 228 tail call void @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1> %pg, i8* %addr, i32 13) 229 ret void 230} 231 232define void @test_svprfw_ss(<vscale x 4 x i1> %pg, i32* %base, i64 %offset) { 233; CHECK-LABEL: test_svprfw_ss 234; CHECK: prfw pstl3strm, p0, [x0, x1, lsl #2] 235entry: 236 %gep = getelementptr i32, i32* %base, i64 %offset 237 %addr = bitcast i32* %gep to i8* 238 tail call void @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1> %pg, i8* %addr, i32 13) 239 ret void 240} 241 242define void @test_svprfd_ss(<vscale x 2 x i1> %pg, i64* %base, i64 %offset) { 243; CHECK-LABEL: test_svprfd_ss 244; CHECK: prfd pstl3strm, p0, [x0, x1, lsl #3] 245entry: 246 %gep = getelementptr i64, i64* %base, i64 %offset 247 %addr = bitcast i64* %gep to i8* 248 tail call void @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1> %pg, i8* %addr, i32 13) 249 ret void 250} 251 252 253declare void @llvm.aarch64.sve.prf.nxv16i1(<vscale x 16 x i1>, i8*, i32) 254declare void @llvm.aarch64.sve.prf.nxv8i1(<vscale x 8 x i1>, i8*, i32) 255declare void @llvm.aarch64.sve.prf.nxv4i1(<vscale x 4 x i1>, i8*, i32) 256declare void @llvm.aarch64.sve.prf.nxv2i1(<vscale x 2 x i1>, i8*, i32) 257