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Searched refs:qsax (Results 1 – 25 of 33) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/ARM/
Dacle-intrinsics.ll186 define i32 @qsax(i32 %a, i32 %b) nounwind {
187 ; CHECK-LABEL: qsax
188 ; CHECK: qsax r0, r0, r1
189 %tmp = call i32 @llvm.arm.qsax(i32 %a, i32 %b)
448 declare i32 @llvm.arm.qsax(i32, i32) nounwind
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Darm-tests.txt128 # CHECK: qsax r8, r9, r10
Dbasic-arm-instructions.txt1165 # CHECK: qsax r9, r12, r0
Dthumb2.txt1402 # CHECK: qsax r9, r12, r0
/external/llvm/test/MC/Disassembler/ARM/
Darm-tests.txt128 # CHECK: qsax r8, r9, r10
Dthumb2.txt1402 # CHECK: qsax r9, r12, r0
Dbasic-arm-instructions.txt1165 # CHECK: qsax r9, r12, r0
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-rm-t32.cc56 M(qsax) \
Dtest-assembler-cond-rd-rn-rm-a32.cc57 M(qsax) \
/external/llvm-project/llvm/test/tools/llvm-mca/ARM/
Dm7-int.s214 qsax r0, r1, r2 label
646 # CHECK-NEXT: 1 2 1.00 qsax r0, r1, r2
1086 …0.50 - - - - 1.00 - - - - - - qsax r0, r1, r2
Dm4-int.s221 qsax r0, r1, r2 label
668 # CHECK-NEXT: 1 1 1.00 qsax r0, r1, r2
1106 # CHECK-NEXT: 1.00 qsax r0, r1, r2
Dcortex-a57-basic-instructions.s426 qsax r9, r12, r0
1296 # CHECK-NEXT: 2 3 1.00 qsax r9, r12, r0
2173 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - qsax r9, r12, r0
Dcortex-a57-thumb.s488 qsax r9, r12, r0
1396 # CHECK-NEXT: 2 3 1.00 qsax r9, r12, r0
2310 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - qsax r9, r12, r0
/external/capstone/suite/MC/ARM/
Dbasic-arm-instructions.s.cs500 0x50,0x9f,0x2c,0xe6 = qsax r9, r12, r0
/external/vixl/src/aarch32/
Dassembler-aarch32.h2842 void qsax(Condition cond, Register rd, Register rn, Register rm);
2843 void qsax(Register rd, Register rn, Register rm) { qsax(al, rd, rn, rm); } in qsax() function
Ddisasm-aarch32.h1000 void qsax(Condition cond, Register rd, Register rn, Register rm);
/external/llvm-project/llvm/test/MC/ARM/
Dbasic-arm-instructions.s1849 qsax r9, r12, r0
1852 @ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6]
Dbasic-thumb2-instructions.s2099 qsax r9, r12, r0
2103 @ CHECK: qsax r9, r12, r0 @ encoding: [0xec,0xfa,0x10,0xf9]
/external/llvm/test/MC/ARM/
Dbasic-arm-instructions.s1819 qsax r9, r12, r0
1822 @ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6]
Dbasic-thumb2-instructions.s1890 qsax r9, r12, r0
1894 @ CHECK: qsax r9, r12, r0 @ encoding: [0xec,0xfa,0x10,0xf9]
/external/capstone/arch/AArch64/
DARMMappingInsnOp.inc583 { /* ARM_QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */
5863 { /* ARM_t2QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */
/external/capstone/arch/ARM/
DARMMappingInsnOp.inc583 { /* ARM_QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */
5863 { /* ARM_t2QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td3577 def QSAX : AAI<0b01100010, 0b11110101, "qsax">;
5683 def : MnemonicAlias<"qsubaddx", "qsax">;
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrInfo.td3941 def QSAX : AAIIntrinsic<0b01100010, 0b11110101, "qsax", int_arm_qsax>;
6222 def : MnemonicAlias<"qsubaddx", "qsax">;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrInfo.td3808 def QSAX : AAIIntrinsic<0b01100010, 0b11110101, "qsax", int_arm_qsax>;
6065 def : MnemonicAlias<"qsubaddx", "qsax">;

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