/external/llvm-project/llvm/test/CodeGen/ARM/ |
D | acle-intrinsics.ll | 186 define i32 @qsax(i32 %a, i32 %b) nounwind { 187 ; CHECK-LABEL: qsax 188 ; CHECK: qsax r0, r0, r1 189 %tmp = call i32 @llvm.arm.qsax(i32 %a, i32 %b) 448 declare i32 @llvm.arm.qsax(i32, i32) nounwind
|
/external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
D | arm-tests.txt | 128 # CHECK: qsax r8, r9, r10
|
D | basic-arm-instructions.txt | 1165 # CHECK: qsax r9, r12, r0
|
D | thumb2.txt | 1402 # CHECK: qsax r9, r12, r0
|
/external/llvm/test/MC/Disassembler/ARM/ |
D | arm-tests.txt | 128 # CHECK: qsax r8, r9, r10
|
D | thumb2.txt | 1402 # CHECK: qsax r9, r12, r0
|
D | basic-arm-instructions.txt | 1165 # CHECK: qsax r9, r12, r0
|
/external/vixl/test/aarch32/ |
D | test-assembler-cond-rd-rn-rm-t32.cc | 56 M(qsax) \
|
D | test-assembler-cond-rd-rn-rm-a32.cc | 57 M(qsax) \
|
/external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
D | m7-int.s | 214 qsax r0, r1, r2 label 646 # CHECK-NEXT: 1 2 1.00 qsax r0, r1, r2 1086 …0.50 - - - - 1.00 - - - - - - qsax r0, r1, r2
|
D | m4-int.s | 221 qsax r0, r1, r2 label 668 # CHECK-NEXT: 1 1 1.00 qsax r0, r1, r2 1106 # CHECK-NEXT: 1.00 qsax r0, r1, r2
|
D | cortex-a57-basic-instructions.s | 426 qsax r9, r12, r0 1296 # CHECK-NEXT: 2 3 1.00 qsax r9, r12, r0 2173 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - qsax r9, r12, r0
|
D | cortex-a57-thumb.s | 488 qsax r9, r12, r0 1396 # CHECK-NEXT: 2 3 1.00 qsax r9, r12, r0 2310 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - qsax r9, r12, r0
|
/external/capstone/suite/MC/ARM/ |
D | basic-arm-instructions.s.cs | 500 0x50,0x9f,0x2c,0xe6 = qsax r9, r12, r0
|
/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2842 void qsax(Condition cond, Register rd, Register rn, Register rm); 2843 void qsax(Register rd, Register rn, Register rm) { qsax(al, rd, rn, rm); } in qsax() function
|
D | disasm-aarch32.h | 1000 void qsax(Condition cond, Register rd, Register rn, Register rm);
|
/external/llvm-project/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 1849 qsax r9, r12, r0 1852 @ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6]
|
D | basic-thumb2-instructions.s | 2099 qsax r9, r12, r0 2103 @ CHECK: qsax r9, r12, r0 @ encoding: [0xec,0xfa,0x10,0xf9]
|
/external/llvm/test/MC/ARM/ |
D | basic-arm-instructions.s | 1819 qsax r9, r12, r0 1822 @ CHECK: qsax r9, r12, r0 @ encoding: [0x50,0x9f,0x2c,0xe6]
|
D | basic-thumb2-instructions.s | 1890 qsax r9, r12, r0 1894 @ CHECK: qsax r9, r12, r0 @ encoding: [0xec,0xfa,0x10,0xf9]
|
/external/capstone/arch/AArch64/ |
D | ARMMappingInsnOp.inc | 583 { /* ARM_QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */ 5863 { /* ARM_t2QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */
|
/external/capstone/arch/ARM/ |
D | ARMMappingInsnOp.inc | 583 { /* ARM_QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */ 5863 { /* ARM_t2QSAX, ARM_INS_QSAX: qsax${p} $rd, $rn, $rm */
|
/external/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 3577 def QSAX : AAI<0b01100010, 0b11110101, "qsax">; 5683 def : MnemonicAlias<"qsubaddx", "qsax">;
|
/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 3941 def QSAX : AAIIntrinsic<0b01100010, 0b11110101, "qsax", int_arm_qsax>; 6222 def : MnemonicAlias<"qsubaddx", "qsax">;
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 3808 def QSAX : AAIIntrinsic<0b01100010, 0b11110101, "qsax", int_arm_qsax>; 6065 def : MnemonicAlias<"qsubaddx", "qsax">;
|