Searched refs:sbextw (Results 1 – 4 of 4) sorted by relevance
| /external/llvm-project/llvm/test/MC/RISCV/ |
| D | rv64zbs-valid.s | 24 # CHECK-ASM-AND-OBJ: sbextw t0, t1, t2
26 sbextw t0, t1, t2 label
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| D | rv64zbs-invalid.s | 10 sbextw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
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| /external/llvm-project/llvm/test/CodeGen/RISCV/ |
| D | rv64Zbs.ll | 421 ; RV64IB-NEXT: sbextw a0, a0, a1
426 ; RV64IBS-NEXT: sbextw a0, a0, a1
443 ; RV64IB-NEXT: sbextw a0, a0, a1
448 ; RV64IBS-NEXT: sbextw a0, a0, a1
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| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoB.td | 375 def SBEXTW : ALUW_rr<0b0100100, 0b101, "sbextw">, Sched<[]>;
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