Searched refs:sbinvw (Results 1 – 4 of 4) sorted by relevance
/external/llvm-project/llvm/test/MC/RISCV/ |
D | rv64zbs-valid.s | 21 # CHECK-ASM-AND-OBJ: sbinvw t0, t1, t2 23 sbinvw t0, t1, t2 label
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D | rv64zbs-invalid.s | 8 sbinvw t0, t1 # CHECK: :[[@LINE]]:1: error: too few operands for instruction label
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/external/llvm-project/llvm/test/CodeGen/RISCV/ |
D | rv64Zbs.ll | 305 ; RV64IB-NEXT: sbinvw a0, a0, a1 310 ; RV64IBS-NEXT: sbinvw a0, a0, a1 328 ; RV64IB-NEXT: sbinvw a0, a0, a1 333 ; RV64IBS-NEXT: sbinvw a0, a0, a1 353 ; RV64IB-NEXT: sbinvw a0, a0, a1 359 ; RV64IBS-NEXT: sbinvw a0, a0, a1
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/external/llvm-project/llvm/lib/Target/RISCV/ |
D | RISCVInstrInfoB.td | 374 def SBINVW : ALUW_rr<0b0110100, 0b001, "sbinvw">, Sched<[]>;
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