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Searched refs:seqz (Results 1 – 23 of 23) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/RISCV/
Dget-setcc-result-type.ll12 ; RV32I-NEXT: seqz a1, a1
13 ; RV32I-NEXT: seqz a2, a2
14 ; RV32I-NEXT: seqz a3, a3
15 ; RV32I-NEXT: seqz a4, a4
Di32-icmp.ll5 ; TODO: check the generated instructions for the equivalent of seqz, snez,
12 ; RV32I-NEXT: seqz a0, a0
23 ; RV32I-NEXT: seqz a0, a0
34 ; RV32I-NEXT: seqz a0, a0
46 ; RV32I-NEXT: seqz a0, a0
57 ; RV32I-NEXT: seqz a0, a0
67 ; RV32I-NEXT: seqz a0, a0
Dfloat-isnan.ll11 ; RV32IF-NEXT: seqz a0, a0
17 ; RV64IF-NEXT: seqz a0, a0
Ddouble-isnan.ll11 ; RV32IFD-NEXT: seqz a0, a0
17 ; RV64IFD-NEXT: seqz a0, a0
Dsetcc-logic.ll13 ; RV32I-NEXT: seqz a0, a0
23 ; RV64I-NEXT: seqz a0, a0
64 ; RV32I-NEXT: seqz a0, a0
71 ; RV64I-NEXT: seqz a0, a0
Dhalf-isnan.ll11 ; RV32IZFH-NEXT: seqz a0, a0
17 ; RV64IZFH-NEXT: seqz a0, a0
Dhalf-fcmp.ll148 ; RV32IZFH-NEXT: seqz a1, a1
158 ; RV64IZFH-NEXT: seqz a1, a1
257 ; RV32IZFH-NEXT: seqz a0, a0
265 ; RV64IZFH-NEXT: seqz a0, a0
Datomic-cmpxchg-flag.ll22 ; RV64IA-NEXT: seqz a0, a0
Dfloat-fcmp.ll178 ; RV32IF-NEXT: seqz a1, a1
190 ; RV64IF-NEXT: seqz a1, a1
311 ; RV32IF-NEXT: seqz a0, a0
321 ; RV64IF-NEXT: seqz a0, a0
Dhalf-select-fcmp.ll205 ; RV32IZFH-NEXT: seqz a1, a1
219 ; RV64IZFH-NEXT: seqz a1, a1
363 ; RV32IZFH-NEXT: seqz a0, a0
375 ; RV64IZFH-NEXT: seqz a0, a0
Dsext-zext-trunc.ll527 ; RV32I-NEXT: seqz a0, a0
536 ; RV64I-NEXT: seqz a0, a0
550 ; RV32I-NEXT: seqz a1, a0
559 ; RV64I-NEXT: seqz a0, a0
Ddouble-fcmp.ll225 ; RV32IFD-NEXT: seqz a1, a1
238 ; RV64IFD-NEXT: seqz a1, a1
394 ; RV32IFD-NEXT: seqz a0, a0
405 ; RV64IFD-NEXT: seqz a0, a0
Dcalling-conv-lp64-lp64f-lp64d-common.ll62 ; RV64I-NEXT: seqz a1, a1
125 ; RV64I-NEXT: seqz a0, a0
180 ; RV64I-NEXT: seqz a0, a0
249 ; RV64I-NEXT: seqz a0, a0
411 ; RV64I-NEXT: seqz a0, a0
Dcalling-conv-ilp32-ilp32f-ilp32d-common.ll96 ; RV32I-FPELIM-NEXT: seqz a1, a1
120 ; RV32I-WITHFP-NEXT: seqz a1, a1
210 ; RV32I-FPELIM-NEXT: seqz a0, a0
234 ; RV32I-WITHFP-NEXT: seqz a0, a0
317 ; RV32I-FPELIM-NEXT: seqz a0, a0
342 ; RV32I-WITHFP-NEXT: seqz a0, a0
469 ; RV32I-FPELIM-NEXT: seqz a0, a0
479 ; RV32I-WITHFP-NEXT: seqz a0, a0
798 ; RV32I-FPELIM-NEXT: seqz a0, a0
817 ; RV32I-WITHFP-NEXT: seqz a0, a0
Dfloat-select-fcmp.ll249 ; RV32IF-NEXT: seqz a1, a1
266 ; RV64IF-NEXT: seqz a1, a1
443 ; RV32IF-NEXT: seqz a0, a0
458 ; RV64IF-NEXT: seqz a0, a0
Ddouble-select-fcmp.ll311 ; RV32IFD-NEXT: seqz a1, a1
331 ; RV64IFD-NEXT: seqz a1, a1
553 ; RV32IFD-NEXT: seqz a0, a0
571 ; RV64IFD-NEXT: seqz a0, a0
Dhalf-br-fcmp.ll355 ; RV32IZFH-NEXT: seqz a1, a1
373 ; RV64IZFH-NEXT: seqz a1, a1
585 ; RV32IZFH-NEXT: seqz a0, a0
601 ; RV64IZFH-NEXT: seqz a0, a0
Dfloat-br-fcmp.ll389 ; RV32IF-NEXT: seqz a1, a1
409 ; RV64IF-NEXT: seqz a1, a1
643 ; RV32IF-NEXT: seqz a0, a0
661 ; RV64IF-NEXT: seqz a0, a0
Ddouble-br-fcmp.ll424 ; RV32IFD-NEXT: seqz a1, a1
444 ; RV64IFD-NEXT: seqz a1, a1
702 ; RV32IFD-NEXT: seqz a0, a0
720 ; RV64IFD-NEXT: seqz a0, a0
Drv64i-single-softfloat.ll68 ; RV64I-NEXT: seqz a0, a0
148 ; RV64I-NEXT: seqz a0, a0
/external/llvm-project/llvm/test/MC/RISCV/
Drvi-aliases-valid.s53 # CHECK-S-OBJ: seqz t6, ra
54 seqz x31, x1 label
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td599 def : InstAlias<"seqz $rd, $rs", (SLTIU GPR:$rd, GPR:$rs, 1)>;
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td661 def : InstAlias<"seqz $rd, $rs", (SLTIU GPR:$rd, GPR:$rs, 1)>;