| /external/llvm/test/MC/ARM/ |
| D | arm-load-store-multiple-deprecated.s | 94 .global stmib symbol
95 .type stmib,%function
96 stmib: label
97 stmib sp!, {r0, pc}
99 @ CHECK: stmib sp!, {r0, pc}
101 stmib r0!, {r0, sp}
103 @ CHECK: stmib r0!, {r0, sp}
105 stmib r1!, {r0, sp, pc}
107 @ CHECK: stmib r1!, {r0, sp, pc}
109 stmib r2!, {sp, pc}
[all …]
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| D | basic-arm-instructions.s | 2836 stmib r4, {r1,r3-r6,sp}
2843 stmib r9!, {r1,r3-r6,sp}
2849 @ CHECK: stmib r4, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x84,0xe9]
2855 @ CHECK: stmib r9!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa9,0xe9]
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | arm-load-store-multiple-deprecated.s | 98 .global stmib symbol
99 .type stmib,%function
100 stmib: label
101 stmib sp!, {r0, pc}
103 @ CHECK: stmib sp!, {r0, pc}
105 stmib r0!, {r0, sp}
107 @ CHECK: stmib r0!, {r0, sp}
109 stmib r1!, {r0, sp, pc}
111 @ CHECK: stmib r1!, {r0, sp, pc}
113 stmib r2!, {sp, pc}
[all …]
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| D | basic-arm-instructions.s | 2866 stmib r4, {r1,r3-r6,sp}
2873 stmib r9!, {r1,r3-r6,sp}
2879 @ CHECK: stmib r4, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0x84,0xe9]
2885 @ CHECK: stmib r9!, {r1, r3, r4, r5, r6, sp} @ encoding: [0x7a,0x20,0xa9,0xe9]
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| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | inlineasm-global.ll | 7 ; THUMB: stmib
11 ; ARM: stmib
13 module asm "stmib sp, {r0-r14};"
|
| D | va_arg.ll | 13 ; CHECK-NEXT: stmib sp, {r1, r2, r3}
42 ; CHECK-NEXT: stmib sp, {r2, r3}
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| D | 2012-10-04-AAPCS-byval-align8.ll | 16 ; CHECK: stmib sp, {r1, r2, r3}
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| D | umulo-128-legalisation-lowering.ll | 151 ; ARMV7-NEXT: stmib r6, {r2, r3, r8}
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| /external/llvm/test/CodeGen/ARM/ |
| D | inlineasm-global.ll | 7 ; THUMB: stmib
11 ; ARM: stmib
13 module asm "stmib sp, {r0-r14};"
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| D | 2012-10-04-AAPCS-byval-align8.ll | 15 ; CHECK: stmib sp, {r1, r2, r3}
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-arm-instructions.s.cs | 803 0x7a,0x20,0x84,0xe9 = stmib r4, {r1, r3, r4, r5, r6, sp}
808 0x7a,0x20,0xa9,0xe9 = stmib r9!, {r1, r3, r4, r5, r6, sp}
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | cortex-a57-basic-instructions.s | 674 stmib r4, {r1, r3, r4, r5, r6, sp}
679 stmib r9!, {r1, r3, r4, r5, r6, sp}
1544 # CHECK-NEXT: 1 3 1.00 * stmib r4, {r1, r3, r4, r5, r6, sp}
1549 # CHECK-NEXT: 2 4 1.00 * stmib r9!, {r1, r3, r4, r5, r6, sp}
2421 # CHECK-NEXT: - - - - - 1.00 - - stmib r4, {r1, r3, r4, r5, r6…
2426 # CHECK-NEXT: - 0.50 0.50 - - 1.00 - - stmib r9!, {r1, r3, r4, r5, r…
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1914 # CHECK: stmib r4, {r1, r3, r4, r5, r6, sp}
1921 # CHECK: stmib r9!, {r1, r3, r4, r5, r6, sp}
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | basic-arm-instructions.txt | 1914 # CHECK: stmib r4, {r1, r3, r4, r5, r6, sp}
1921 # CHECK: stmib r9!, {r1, r3, r4, r5, r6, sp}
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 973 { /* ARM_STMIB, ARM_INS_STMIB: stmib${p} $rn, $regs */
976 { /* ARM_STMIB_UPD, ARM_INS_STMIB: stmib${p} $rn!, $regs */
5323 { /* ARM_sysSTMIB, ARM_INS_STMIB: stmib${p} $rn, $regs ^ */
5326 { /* ARM_sysSTMIB_UPD, ARM_INS_STMIB: stmib${p} $rn!, $regs ^ */
|
| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 973 { /* ARM_STMIB, ARM_INS_STMIB: stmib${p} $rn, $regs */
976 { /* ARM_STMIB_UPD, ARM_INS_STMIB: stmib${p} $rn!, $regs */
5323 { /* ARM_sysSTMIB, ARM_INS_STMIB: stmib${p} $rn, $regs ^ */
5326 { /* ARM_sysSTMIB_UPD, ARM_INS_STMIB: stmib${p} $rn!, $regs ^ */
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3402 void stmib(Condition cond,
3406 void stmib(Register rn, WriteBack write_back, RegisterList registers) { in stmib() function
3407 stmib(al, rn, write_back, registers); in stmib()
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| D | disasm-aarch32.h | 1262 void stmib(Condition cond,
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| D | assembler-aarch32.cc | 11321 void Assembler::stmib(Condition cond, in stmib() function in vixl::aarch32::Assembler
11336 Delegate(kStmib, &Assembler::stmib, cond, rn, write_back, registers); in stmib()
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| D | macro-assembler-aarch32.h | 4398 stmib(cond, rn, write_back, registers); in Stmib()
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| D | disasm-aarch32.cc | 3079 void Disassembler::stmib(Condition cond, in stmib() function in vixl::aarch32::Disassembler
64598 stmib(condition, Register(rn), write_back, registers); in DecodeA32()
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 9909 "d\006stlexh\004stlh\003stm\005stmda\005stmdb\005stmib\003str\004strb\005"
11291 …{ 1531 /* stmib */, ARM::STMIB, Convert__Reg1_1__CondCode2_0__RegList1_2, AMFBS_IsARM, { MCK_CondC…
11292 …{ 1531 /* stmib */, ARM::STMIB_UPD, Convert__Reg1_1__Tie0_2_2__CondCode2_0__RegList1_3, AMFBS_IsAR…
11293 …{ 1531 /* stmib */, ARM::sysSTMIB, Convert__Reg1_1__CondCode2_0__RegList1_2, AMFBS_IsARM, { MCK_Co…
11294 …{ 1531 /* stmib */, ARM::sysSTMIB_UPD, Convert__Reg1_1__Tie0_2_2__CondCode2_0__RegList1_3, AMFBS_I…
|