| /external/llvm-project/llvm/test/MC/Mips/ |
| D | macro-aliases.s | 3 # Test that subu accepts constant operands and inverts them when
6 subu $4, $4, 4 # CHECK: ADDiu
8 subu $gp, $gp, 4 # CHECK: ADDiu
10 subu $sp, $sp, 4 # CHECK: ADDiu
12 subu $4, $4, -4 # CHECK: ADDiu
14 subu $gp, $gp, -4 # CHECK: ADDiu
16 subu $sp, $sp, -4 # CHECK: ADDiu
18 subu $sp, $sp, -(4 + 4) # CHECK: ADDiu
21 subu $4, 8 # CHECK: ADDiu
23 subu $gp, 8 # CHECK: ADDiu
[all …]
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| D | macro-aliases-invalid-wrong-error.s | 7 # Check that subu only rejects any non-constant values.
10 subu $4, $4, %lo($start) # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
12 subu $4, $4, $start # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
14 subu $4, $a4, $a4 # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
15 subu $4, $4, %hi(end) # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
17 subu $4, $4, end + 4 # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
19 subu $4, $4, end # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
21 subu $4, $4, sp # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
24 subu $4, %lo($start) # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
26 subu $4, $start # O32: [[@LINE]]:{{[0-9]+}}: error: unexpected token in argument list
[all …]
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| D | mips-alu-instructions.s | 90 # CHECK: subu $4, $3, $5 # encoding: [0x23,0x20,0x65,0x00]
115 subu $4,$3,$5
116 subu $sp,$sp,40
134 # CHECK: subu $9, $9, $3 # encoding: [0x23,0x48,0x23,0x01]
146 subu $9, $3
148 subu $9, 10
|
| /external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ |
| D | sub.ll | 7 ; MIPS32-NEXT: subu $2, $4, $5
18 ; MIPS32-NEXT: subu $1, $5, $4
31 ; MIPS32-NEXT: subu $1, $5, $4
43 ; MIPS32-NEXT: subu $2, $5, $4
54 ; MIPS32-NEXT: subu $1, $5, $4
67 ; MIPS32-NEXT: subu $1, $5, $4
79 ; MIPS32-NEXT: subu $2, $5, $4
90 ; MIPS32-NEXT: subu $2, $6, $4
92 ; MIPS32-NEXT: subu $1, $7, $5
94 ; MIPS32-NEXT: subu $3, $1, $3
[all …]
|
| D | cttz.ll | 12 ; MIPS32-NEXT: subu $2, $1, $2
32 ; MIPS32-NEXT: subu $1, $2, $1
38 ; MIPS32-NEXT: subu $2, $2, $5
59 ; MIPS32-NEXT: subu $2, $2, $3
85 ; MIPS32-NEXT: subu $6, $2, $6
91 ; MIPS32-NEXT: subu $2, $2, $8
|
| D | ctpop.ll | 11 ; MIPS32-NEXT: subu $2, $4, $1
43 ; MIPS32-NEXT: subu $2, $4, $1
61 ; MIPS32-NEXT: subu $5, $5, $1
|
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | sub.ll | 38 ; NOT-MM: subu $[[T0:[0-9]+]], $4, $5
54 ; NOT-R2-R6: subu $[[T0:[0-9]+]], $4, $5
58 ; R2-R6: subu $[[T0:[0-9]+]], $4, $5
72 ; NOT-R2-R6: subu $[[T0:[0-9]+]], $4, $5
76 ; R2-R6: subu $[[T0:[0-9]+]], $4, $5
90 ; NOT-MM: subu $2, $4, $5
102 ; GP32: subu $3, $5, $7
105 ; GP32: subu $2, $4, $[[T1]]
123 ; GP32-NOT-MM: subu $[[T6:[0-9]+]], $7, $[[T5]]
124 ; GP32-NOT-MM: subu $2, $4, $[[T3]]
[all …]
|
| /external/llvm-project/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | sub.ll | 36 ; NOT-MM: subu $[[T0:[0-9]+]], $4, $5
53 ; NOT-R2-R6: subu $[[T0:[0-9]+]], $4, $5
57 ; R2-R6: subu $[[T0:[0-9]+]], $4, $5
71 ; NOT-R2-R6: subu $[[T0:[0-9]+]], $4, $5
75 ; R2-R6: subu $[[T0:[0-9]+]], $4, $5
89 ; NOT-MM: subu $2, $4, $5
102 ; GP32: subu $2, $4, $6
103 ; GP32: subu $2, $2, $[[T0]]
104 ; GP32: subu $3, $5, $7
131 ; PRE4: subu $[[T7:[0-9]+]], $5, $[[T6]]
[all …]
|
| /external/libffi/src/m88k/ |
| D | obsd.S | 58 subu %r31, %r31, 32
99 subu %r31, %r30, 32
167 subu %r31, %r30, 16
181 subu %r31, %r31, 16
187 subu %r31, %r31, (8 * 4)
204 subu %r31, %r30, 16
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/m88k/ |
| D | obsd.S | 58 subu %r31, %r31, 32
99 subu %r31, %r30, 32
167 subu %r31, %r30, 16
181 subu %r31, %r31, 16
187 subu %r31, %r31, (8 * 4)
204 subu %r31, %r30, 16
|
| /external/llvm-project/llvm/test/MC/VE/ |
| D | SUB.s | 6 # CHECK-INST: subu.l %s11, %s20, %s22
8 subu.l %s11, %s20, %s22
10 # CHECK-INST: subu.w %s11, 22, %s22
12 subu.w %s11, 22, %s22
|
| D | register.s | 7 subu.l %fp, %sp, %s0
15 # CHECK: subu.l %s9, %s11, %s0
22 # CHECK-INST: subu.l %s9, %s11, %s0
|
| /external/llvm-project/llvm/test/CodeGen/Mips/ |
| D | madd-msub.ll | 277 ; 32R6-NEXT: subu $3, $4, $3
278 ; 32R6-NEXT: subu $2, $3, $2
280 ; 32R6-NEXT: subu $3, $6, $1
316 ; 16-NEXT: subu $3, $6, $2
320 ; 16-NEXT: subu $4, $5, $4
321 ; 16-NEXT: subu $2, $4, $2
351 ; 32R6-NEXT: subu $3, $6, $3
384 ; 16-NEXT: subu $3, $6, $2
411 ; 32R6-NEXT: subu $3, $6, $3
412 ; 32R6-NEXT: subu $2, $3, $2
[all …]
|
| D | 2008-06-05-Carry.ll | 18 ; CHECK-DAG: subu
19 ; CHECK: subu
20 ; CHECK: subu
|
| D | cttz-v.ll | 13 ; MIPS32-DAG: subu $2, $[[R4]], $[[R3]]
19 ; MIPS32-DAG: subu $3, $[[R4]], $[[R8]]
27 ; MIPS64-DAG: subu $[[R5:[0-9]+]], $[[R4]], $[[R3]]
35 ; MIPS64-DAG: subu $[[R13:[0-9]+]], $[[R4]], $[[R12]]
|
| D | llcarry.ll | 29 ; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
32 ; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
33 ; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}
|
| D | 2008-08-06-Alloca.ll | 5 ; CHECK: subu ${{[0-9]+}}, $sp
6 ; CHECK: subu ${{[0-9]+}}, $sp
|
| /external/llvm/test/MC/Mips/ |
| D | mips-alu-instructions.s | 90 # CHECK: subu $4, $3, $5 # encoding: [0x23,0x20,0x65,0x00]
115 subu $4,$3,$5
116 subu $sp,$sp,40
134 # CHECK: subu $9, $9, $3 # encoding: [0x23,0x48,0x23,0x01]
146 subu $9, $3
148 subu $9, 10
|
| /external/llvm/test/CodeGen/Mips/ |
| D | cttz-v.ll | 13 ; MIPS32-DAG: subu $2, $[[R4]], $[[R3]]
19 ; MIPS32-DAG: subu $3, $[[R4]], $[[R8]]
27 ; MIPS64-DAG: subu $2, $[[R4]], $[[R3]]
34 ; MIPS64-DAG: subu $3, $[[R4]], $[[R8]]
|
| D | 2008-08-06-Alloca.ll | 5 ; CHECK: subu ${{[0-9]+}}, $sp
6 ; CHECK: subu ${{[0-9]+}}, $sp
|
| D | 2008-06-05-Carry.ll | 16 ; CHECK: subu
19 ; CHECK: subu
|
| /external/llvm-project/llvm/test/CodeGen/Mips/cstmaterialization/ |
| D | stack.ll | 8 ; (d)subu and (d)addu rather than just (d)addu. The (d)subu sequences are
21 ; CHECK-MIPS32: subu $sp, $sp, $[[R0]]
46 ; CHECK-MIPSN32: subu $sp, $sp, $[[R0]]
|
| /external/llvm/test/CodeGen/Mips/cstmaterialization/ |
| D | stack.ll | 8 ; (d)subu and (d)addu rather than just (d)addu. The (d)subu sequences are
21 ; CHECK-MIPS32: subu $sp, $sp, $[[R0]]
46 ; CHECK-MIPSN32: subu $sp, $sp, $[[R0]]
|
| /external/capstone/suite/MC/Mips/ |
| D | micromips-alu-instructions.s.cs | 9 0xa3,0x00,0xd0,0x21 = subu $a0, $v1, $a1
11 0xe0,0x00,0xd0,0x31 = subu $a2, $zero, $a3
|
| D | micromips-alu-instructions-EB.s.cs | 9 0x00,0xa3,0x21,0xd0 = subu $a0, $v1, $a1
11 0x00,0xe0,0x31,0xd0 = subu $a2, $zero, $a3
|