| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 312 define i32 @uqsax(i32 %a, i32 %b) nounwind {
313 ; CHECK-LABEL: uqsax
314 ; CHECK: uqsax r0, r0, r1
315 %tmp = call i32 @llvm.arm.uqsax(i32 %a, i32 %b)
467 declare i32 @llvm.arm.uqsax(i32, i32) nounwind
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 339 # CHECK: uqsax r5, r6, r7
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| D | basic-arm-instructions.txt | 2343 # CHECK: uqsax r1, r3, r7
2344 # CHECK: uqsax r3, r6, r2
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| D | thumb2.txt | 2471 # CHECK: uqsax r3, r4, r8
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | arm-tests.txt | 339 # CHECK: uqsax r5, r6, r7
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| D | basic-arm-instructions.txt | 2343 # CHECK: uqsax r1, r3, r7
2344 # CHECK: uqsax r3, r6, r2
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| D | thumb2.txt | 2471 # CHECK: uqsax r3, r4, r8
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| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 1120 0xe4,0xfa,0x58,0xf3 = uqsax r3, r4, r8
1125 0xe4,0xfa,0x58,0xf3 = uqsax r3, r4, r8
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| D | basic-arm-instructions.s.cs | 933 0x57,0x1f,0x63,0xe6 = uqsax r1, r3, r7
934 0x52,0x3f,0x66,0xe6 = uqsax r3, r6, r2
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 88 M(uqsax) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 89 M(uqsax) \
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | cortex-a57-basic-instructions.s | 806 uqsax r1, r3, r7
807 uqsax r3, r6, r2
1676 # CHECK-NEXT: 2 3 1.00 uqsax r1, r3, r7
1677 # CHECK-NEXT: 2 3 1.00 uqsax r3, r6, r2
2553 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - uqsax r1, r3, r7
2554 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - uqsax r3, r6, r2
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| D | m7-int.s | 404 uqsax r0, r1, r2 label
832 # CHECK-NEXT: 1 2 1.00 uqsax r0, r1, r2
1272 ….50 - - - - 1.00 - - - - - - uqsax r0, r1, r2
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| D | m4-int.s | 417 uqsax r0, r1, r2 label
856 # CHECK-NEXT: 1 1 1.00 uqsax r0, r1, r2
1294 # CHECK-NEXT: 1.00 uqsax r0, r1, r2
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| D | cortex-a57-thumb.s | 828 uqsax r3, r4, r8
1735 # CHECK-NEXT: 2 3 1.00 uqsax r3, r4, r8
2649 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - uqsax r3, r4, r8
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3380 uqsax r1, r3, r7
3383 @ CHECK: uqsax r1, r3, r7 @ encoding: [0x57,0x1f,0x63,0xe6]
3384 @ CHECK: uqsax r3, r6, r2 @ encoding: [0x52,0x3f,0x66,0xe6]
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| D | basic-thumb2-instructions.s | 3717 uqsax r3, r4, r8
3729 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
3735 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
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| /external/llvm/test/MC/ARM/ |
| D | basic-arm-instructions.s | 3350 uqsax r1, r3, r7
3353 @ CHECK: uqsax r1, r3, r7 @ encoding: [0x57,0x1f,0x63,0xe6]
3354 @ CHECK: uqsax r3, r6, r2 @ encoding: [0x52,0x3f,0x66,0xe6]
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| D | basic-thumb2-instructions.s | 3458 uqsax r3, r4, r8
3470 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
3476 @ CHECK: uqsax r3, r4, r8 @ encoding: [0xe4,0xfa,0x58,0xf3]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3701 void uqsax(Condition cond, Register rd, Register rn, Register rm);
3702 void uqsax(Register rd, Register rn, Register rm) { uqsax(al, rd, rn, rm); } in uqsax() function
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| D | disasm-aarch32.h | 1406 void uqsax(Condition cond, Register rd, Register rn, Register rm);
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 1186 { /* ARM_UQSAX, ARM_INS_UQSAX: uqsax${p} $rd, $rn, $rm */
6367 { /* ARM_t2UQSAX, ARM_INS_UQSAX: uqsax${p} $rd, $rn, $rm */
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 1186 { /* ARM_UQSAX, ARM_INS_UQSAX: uqsax${p} $rd, $rn, $rm */
6367 { /* ARM_t2UQSAX, ARM_INS_UQSAX: uqsax${p} $rd, $rn, $rm */
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3583 def UQSAX : AAI<0b01100110, 0b11110101, "uqsax">;
5701 def : MnemonicAlias<"uqsubaddx", "uqsax">;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3943 def UQSAX : AAIIntrinsic<0b01100110, 0b11110101, "uqsax", int_arm_uqsax>;
6240 def : MnemonicAlias<"uqsubaddx", "uqsax">;
|