| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics.ll | 326 define i32 @usax(i32 %a, i32 %b) nounwind {
327 ; CHECK-LABEL: usax
328 ; CHECK: usax r0, r0, r1
329 %tmp = call i32 @llvm.arm.usax(i32 %a, i32 %b)
460 declare i32 @llvm.arm.usax(i32, i32) nounwind
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| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 1145 0xe3,0xfa,0x44,0xf2 = usax r2, r3, r4
1148 0xe3,0xfa,0x44,0xf2 = usax r2, r3, r4
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| D | basic-arm-instructions.s.cs | 950 0x54,0x2f,0x53,0xe6 = usax r2, r3, r4
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| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-rm-t32.cc | 102 M(usax) \
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| D | test-assembler-cond-rd-rn-rm-a32.cc | 103 M(usax) \
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| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | cortex-a57-thumb.s | 848 usax r2, r3, r4
851 usax r2, r3, r4
1755 # CHECK-NEXT: 2 3 1.00 * * U usax r2, r3, r4
1758 # CHECK-NEXT: 2 3 1.00 * * U usax r2, r3, r4
2669 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - usax r2, r3, r4
2672 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - usax r2, r3, r4
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| D | m7-int.s | 412 usax r0, r1, r2 label
840 # CHECK-NEXT: 1 1 1.00 * * U usax r0, r1, r2
1280 …0.50 - - - - 1.00 - - - - - - usax r0, r1, r2
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| D | m4-int.s | 425 usax r0, r1, r2 label
864 # CHECK-NEXT: 1 1 1.00 * * U usax r0, r1, r2
1302 # CHECK-NEXT: 1.00 usax r0, r1, r2
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| D | cortex-a57-basic-instructions.s | 823 usax r2, r3, r4
1693 # CHECK-NEXT: 2 3 1.00 * * U usax r2, r3, r4
2570 # CHECK-NEXT: - 0.50 0.50 - 1.00 - - - usax r2, r3, r4
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2542 # CHECK: usax r2, r3, r4
2545 # CHECK: usax r2, r3, r4
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| D | basic-arm-instructions.txt | 2407 # CHECK: usax r2, r3, r4
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| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | thumb2.txt | 2542 # CHECK: usax r2, r3, r4
2545 # CHECK: usax r2, r3, r4
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| D | basic-arm-instructions.txt | 2407 # CHECK: usax r2, r3, r4
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| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3541 usax r2, r3, r4
3548 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2]
3551 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2]
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| D | basic-arm-instructions.s | 3414 usax r2, r3, r4
3417 @ CHECK: usax r2, r3, r4 @ encoding: [0x54,0x2f,0x53,0xe6]
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 3800 usax r2, r3, r4
3807 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2]
3810 @ CHECK: usax r2, r3, r4 @ encoding: [0xe3,0xfa,0x44,0xf2]
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| D | basic-arm-instructions.s | 3444 usax r2, r3, r4
3447 @ CHECK: usax r2, r3, r4 @ encoding: [0x54,0x2f,0x53,0xe6]
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| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3731 void usax(Condition cond, Register rd, Register rn, Register rm);
3732 void usax(Register rd, Register rn, Register rm) { usax(al, rd, rn, rm); } in usax() function
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| D | disasm-aarch32.h | 1421 void usax(Condition cond, Register rd, Register rn, Register rm);
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| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 1207 { /* ARM_USAX, ARM_INS_USAX: usax${p} $rd, $rn, $rm */
6388 { /* ARM_t2USAX, ARM_INS_USAX: usax${p} $rd, $rn, $rm */
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| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 1207 { /* ARM_USAX, ARM_INS_USAX: usax${p} $rd, $rn, $rm */
6388 { /* ARM_t2USAX, ARM_INS_USAX: usax${p} $rd, $rn, $rm */
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| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3598 def USAX : AAI<0b01100101, 0b11110101, "usax">;
5703 def : MnemonicAlias<"usubaddx", "usax">;
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3956 def USAX : AAIIntrinsic<0b01100101, 0b11110101, "usax", int_arm_usax>;
6242 def : MnemonicAlias<"usubaddx", "usax">;
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrInfo.td | 3823 def USAX : AAIIntrinsic<0b01100101, 0b11110101, "usax", int_arm_usax>;
6085 def : MnemonicAlias<"usubaddx", "usax">;
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 1422 Mnemonic = "usax"; // "usubaddx"
9917 "\005usad8\006usada8\004usat\006usat16\004usax\006usub16\005usub8\005uxt"
11540 …{ 1905 /* usax */, ARM::t2USAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, AMFBS_IsThumb2_HasDS…
11541 …{ 1905 /* usax */, ARM::USAX, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, AMFBS_IsARM, { MCK_Con…
|