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Searched refs:v111 (Results 1 – 25 of 31) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dbug14859-split-const-block-addr.ll202 %v84 = phi i8* [ %v111, %b31 ], [ %v71, %b22 ]
213 %v89 = phi i8* [ %v71, %b21 ], [ %v111, %b31 ]
231 %v97 = phi i8* [ %v111, %b31 ], [ %v84, %b23 ]
240 %v99 = phi i8* [ %v111, %b31 ], [ %v84, %b24 ]
255 %v111 = getelementptr inbounds i8, i8* %v99, i32 -1
256 store i8 %v110, i8* %v111, align 1, !tbaa !4
Dregscavengerbug.ll197 %v111 = load double, double* %v110, align 8, !tbaa !6
208 %v122 = fcmp olt double %v121, %v111
209 %v123 = select i1 %v122, double %v121, double %v111
210 %v124 = fcmp ogt double %v121, %v111
211 %v125 = select i1 %v124, double %v121, double %v111
Daggr-licm.ll131 %v111 = or i64 %v110, %v105
142 %v122 = or i64 %v121, %v111
Dregisterscavenger-fail1.ll213 %v111 = icmp sgt i32 %v106, 0
229 br i1 %v111, label %b30, label %b35
Dexpand-vstorerw-undef2.ll170 …%v111 = tail call <64 x i32> @llvm.hexagon.V6.vshuffvdd.128B(<32 x i32> %v110, <32 x i32> %v103, i…
171 %v112 = tail call <32 x i32> @llvm.hexagon.V6.hi.128B(<64 x i32> %v111)
172 %v113 = tail call <32 x i32> @llvm.hexagon.V6.lo.128B(<64 x i32> %v111)
Dswp-epilog-phi7.ll138 %v111 = phi <16 x i32>* [ %v9, %b1 ], [ %v148, %b2 ]
175 %v148 = getelementptr inbounds <16 x i32>, <16 x i32>* %v111, i32 1
176 store <16 x i32> %v147, <16 x i32>* %v111, align 64, !tbaa !0
Dlate_instr.ll141 %v111 = getelementptr <16 x i32>, <16 x i32>* %v62, i32 %v110
149 %v116 = phi <16 x i32>* [ %v111, %b5 ], [ %v62, %b2 ]
DSUnit-boundary-prob.ll148 %v111 = tail call <16 x i32> @llvm.hexagon.V6.hi(<32 x i32> %v106)
152 store <16 x i32> %v111, <16 x i32>* %v114, align 64, !tbaa !6
Dcext-ice.ll228 %v111 = load i32, i32* %v14, align 4, !tbaa !0
229 store volatile i32 %v111, i32* %v4, align 4, !tbaa !0
Dswp-sigma.ll165 %v111 = getelementptr inbounds <16 x i32>, <16 x i32>* %v41, i32 1
168 %v114 = select i1 %v109, <16 x i32>* %v111, <16 x i32>* %v41
Dlarge-number-of-preds.ll180 %v111 = getelementptr inbounds [64 x float], [64 x float]* %v0, i32 0, i32 25
181 store float %v109, float* %v111, align 4, !tbaa !0
Dreg-scavengebug.ll145 %v111 = tail call <16 x i32> @llvm.hexagon.V6.vaddw(<16 x i32> %v108, <16 x i32> %v109)
147 …%v113 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwh.acc(<16 x i32> %v7, <16 x i32> %v111, i32 53…
Dregscavenger_fail_hwloop.ll136 %v111 = icmp ne i32 %v110, 0
139 %v114 = select i1 %v111, i32 %v113, i32 %v109
Dlsr-post-inc-cross-use-offsets.ll174 %v111 = add nsw i32 %v110, -129
175 %v112 = getelementptr inbounds i8, i8* %v1, i32 %v111
Dreg-scav-imp-use-dbl-vec.ll205 %v111 = add i32 %v105, %v30
206 %v112 = shl nsw i32 %v111, 6
Dreg-scavengebug-5.ll135 %v111 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v106, <16 x i32> %v87, i32 1)
156 %v132 = tail call <32 x i32> @llvm.hexagon.V6.vcombine(<16 x i32> %v122, <16 x i32> %v111)
Dopt-glob-addrs-003.ll203 %v111 = zext i1 %v110 to i16
204 %v112 = add nuw nsw i16 %v111, %v107
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dreserve-vgpr-for-sgpr-spill.ll35 ,~{v110},~{v111},~{v112},~{v113},~{v114},~{v115},~{v116},~{v117},~{v118},~{v119}
80 ,~{v110},~{v111},~{v112},~{v113},~{v114},~{v115},~{v116},~{v117},~{v118},~{v119}
122 ,~{v110},~{v111},~{v112},~{v113},~{v114},~{v115},~{v116},~{v117},~{v118},~{v119}
171 ,~{v110},~{v111},~{v112},~{v113},~{v114},~{v115},~{v116},~{v117},~{v118},~{v119}
Doccupancy-levels.ll193 call void asm sideeffect "", "~{v111}" ()
Dattr-amdgpu-flat-work-group-size-vgpr-limit.ll121 %v111 = call i32 asm sideeffect "; def $0", "=v"()
377 call void asm sideeffect "; use $0", "v"(i32 %v111)
/external/llvm-project/llvm/test/Transforms/LoopVectorize/Hexagon/
Dminimum-vf.ll139 %v111 = mul nsw i16 %v110, -5
140 %v112 = add i16 %v111, %v106
/external/mesa3d/src/gallium/auxiliary/gallivm/
Dlp_bld_arit.h167 LLVMValueRef v111,
/external/XNNPACK/models/
Dfp32-mobilenet-v3-large.cc131 alignas(16) static std::array<float, 1280> v111; in FP32MobileNetV3Large() local
377 std::generate(v111.begin(), v111.end(), std::ref(f32rng)); in FP32MobileNetV3Large()
3688 v110.data() /* input */, v111.data() /* output */, in FP32MobileNetV3Large()
3698 v111.data() /* input */, v112.data() /* output */, in FP32MobileNetV3Large()
Dfp16-mobilenet-v3-large.cc133 alignas(16) static std::array<uint16_t, 1280> v111; in FP16MobileNetV3Large() local
380 std::generate(v111.begin(), v111.end(), std::ref(f16rng)); in FP16MobileNetV3Large()
3691 v110.data() /* input */, v111.data() /* output */, in FP16MobileNetV3Large()
3701 v111.data() /* input */, v112.data() /* output */, in FP16MobileNetV3Large()
Dfp32-sparse-mobilenet-v3-large.cc131 alignas(16) static std::array<float, 1280> v111; in FP32SparseMobileNetV3Large() local
377 std::generate(v111.begin(), v111.end(), std::ref(f32rng)); in FP32SparseMobileNetV3Large()
3780 v110.data() /* input */, v111.data() /* output */, in FP32SparseMobileNetV3Large()
3790 v111.data() /* input */, v112.data() /* output */, in FP32SparseMobileNetV3Large()

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