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/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dnon-simple-args-intrin.ll6 ; non-simple arguments. eg: @llvm.sqrt.v16f64.
33 %16 = call nsz <16 x double> @llvm.sqrt.v16f64(<16 x double> %15)
46 declare <16 x double> @llvm.sqrt.v16f64(<16 x double>) #1
/external/llvm-project/llvm/test/Transforms/LowerMatrixIntrinsics/
Dpropagate-multiple-iterations.ll77 %A.trans = tail call <16 x double> @llvm.matrix.transpose.v16f64(<16 x double> %A, i32 4, i32 4)
83 declare <16 x double> @llvm.matrix.multiply.v16f64.v16f64.v16f64(<16 x double>, <16 x double>, i32 …
84 declare <16 x double> @llvm.matrix.transpose.v16f64(<16 x double>, i32 immarg, i32 immarg)
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Dfmaxnum-size-latency.ll36 …ed cost of 32 for instruction: %V16f64 = call <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
44 …ed cost of 12 for instruction: %V16f64 = call <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
51 %V16f64 = call <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
65 declare <16 x double> @llvm.maxnum.v16f64(<16 x double>, <16 x double>)
Dfminnum-size-latency.ll36 …ed cost of 32 for instruction: %V16f64 = call <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
44 …ed cost of 12 for instruction: %V16f64 = call <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
51 %V16f64 = call <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
65 declare <16 x double> @llvm.minnum.v16f64(<16 x double>, <16 x double>)
Dfminnum.ll60 …ed cost of 32 for instruction: %V16f64 = call <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
68 …ed cost of 20 for instruction: %V16f64 = call <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
76 …ed cost of 12 for instruction: %V16f64 = call <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
84 …ted cost of 4 for instruction: %V16f64 = call <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
91 %V16f64 = call <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
134 …ost of 8 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
142 …ost of 4 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
150 …ost of 2 for instruction: %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> unde…
157 %V16f64 = call nnan <16 x double> @llvm.minnum.v16f64(<16 x double> undef, <16 x double> undef)
171 declare <16 x double> @llvm.minnum.v16f64(<16 x double>, <16 x double>)
Dfmaxnum.ll60 …ed cost of 32 for instruction: %V16f64 = call <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
68 …ed cost of 20 for instruction: %V16f64 = call <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
76 …ed cost of 12 for instruction: %V16f64 = call <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
84 …ted cost of 4 for instruction: %V16f64 = call <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
91 %V16f64 = call <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
134 …ost of 8 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
142 …ost of 4 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
150 …ost of 2 for instruction: %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> unde…
157 %V16f64 = call nnan <16 x double> @llvm.maxnum.v16f64(<16 x double> undef, <16 x double> undef)
171 declare <16 x double> @llvm.maxnum.v16f64(<16 x double>, <16 x double>)
Dreduce-fmax.ll18 …d cost of 9 for instruction: %V16 = call double @llvm.vector.reduce.fmax.v16f64(<16 x double> unde…
26 …d cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fmax.v16f64(<16 x double> unde…
34 …d cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fmax.v16f64(<16 x double> unde…
41 %V16 = call double @llvm.vector.reduce.fmax.v16f64(<16 x double> undef)
86 declare double @llvm.vector.reduce.fmax.v16f64(<16 x double>)
Dreduce-fmin.ll18 …d cost of 9 for instruction: %V16 = call double @llvm.vector.reduce.fmin.v16f64(<16 x double> unde…
26 …d cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fmin.v16f64(<16 x double> unde…
34 …d cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fmin.v16f64(<16 x double> unde…
41 %V16 = call double @llvm.vector.reduce.fmin.v16f64(<16 x double> undef)
86 declare double @llvm.vector.reduce.fmin.v16f64(<16 x double>)
Dreduce-fadd.ll18 … cost of 16 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg, <16 x…
26 … cost of 16 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg, <16 x…
34 … cost of 16 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg, <16 x…
42 …d cost of 9 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg, <16 x…
50 …d cost of 9 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg, <16 x…
58 …d cost of 6 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg, <16 x…
66 …d cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg, <16 x…
73 %V16 = call double @llvm.vector.reduce.fadd.v16f64(double %arg, <16 x double> undef)
154 declare double @llvm.vector.reduce.fadd.v16f64(double, <16 x double>)
Dreduce-fmul.ll18 … cost of 17 for instruction: %V16 = call double @llvm.vector.reduce.fmul.v16f64(double %arg, <16 x…
26 … cost of 17 for instruction: %V16 = call double @llvm.vector.reduce.fmul.v16f64(double %arg, <16 x…
34 … cost of 17 for instruction: %V16 = call double @llvm.vector.reduce.fmul.v16f64(double %arg, <16 x…
42 …d cost of 9 for instruction: %V16 = call double @llvm.vector.reduce.fmul.v16f64(double %arg, <16 x…
50 … cost of 10 for instruction: %V16 = call double @llvm.vector.reduce.fmul.v16f64(double %arg, <16 x…
58 …d cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fmul.v16f64(double %arg, <16 x…
66 …d cost of 7 for instruction: %V16 = call double @llvm.vector.reduce.fmul.v16f64(double %arg, <16 x…
73 %V16 = call double @llvm.vector.reduce.fmul.v16f64(double %arg, <16 x double> undef)
154 declare double @llvm.vector.reduce.fmul.v16f64(double, <16 x double>)
/external/llvm/test/CodeGen/AMDGPU/
Dfminnum.f64.ll8 declare <16 x double> @llvm.minnum.v16f64(<16 x double>, <16 x double>) #0
71 %val = call <16 x double> @llvm.minnum.v16f64(<16 x double> %a, <16 x double> %b) #0
Dfmaxnum.f64.ll8 declare <16 x double> @llvm.maxnum.v16f64(<16 x double>, <16 x double>) #0
71 %val = call <16 x double> @llvm.maxnum.v16f64(<16 x double> %a, <16 x double> %b) #0
Dfceil64.ll10 declare <16 x double> @llvm.ceil.v16f64(<16 x double>) nounwind readnone
101 %y = call <16 x double> @llvm.ceil.v16f64(<16 x double> %x) nounwind readnone
Dftrunc.f64.ll10 declare <16 x double> @llvm.trunc.v16f64(<16 x double>) nounwind readnone
108 %y = call <16 x double> @llvm.trunc.v16f64(<16 x double> %x) nounwind readnone
Dffloor.f64.ll11 declare <16 x double> @llvm.floor.v16f64(<16 x double>) nounwind readnone
125 %y = call <16 x double> @llvm.floor.v16f64(<16 x double> %x) nounwind readnone
/external/llvm-project/llvm/test/CodeGen/X86/
Dpr45563.ll61 …%res = call <16 x double> @llvm.masked.load.v16f64.p0v16f64(<16 x double>* %addr, i32 4, <16 x i1>…
65 declare <16 x double> @llvm.masked.load.v16f64.p0v16f64(<16 x double>* %addr, i32 %align, <16 x i1>…
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dfmaxnum.f64.ll8 declare <16 x double> @llvm.maxnum.v16f64(<16 x double>, <16 x double>) #0
71 %val = call <16 x double> @llvm.maxnum.v16f64(<16 x double> %a, <16 x double> %b) #0
Dfceil64.ll10 declare <16 x double> @llvm.ceil.v16f64(<16 x double>) nounwind readnone
102 %y = call <16 x double> @llvm.ceil.v16f64(<16 x double> %x) nounwind readnone
Dftrunc.f64.ll10 declare <16 x double> @llvm.trunc.v16f64(<16 x double>) nounwind readnone
107 %y = call <16 x double> @llvm.trunc.v16f64(<16 x double> %x) nounwind readnone
Dfminnum.f64.ll9 declare <16 x double> @llvm.minnum.v16f64(<16 x double>, <16 x double>) #0
110 %val = call <16 x double> @llvm.minnum.v16f64(<16 x double> %a, <16 x double> %b) #0
Dffloor.f64.ll11 declare <16 x double> @llvm.floor.v16f64(<16 x double>) nounwind readnone
125 %y = call fast <16 x double> @llvm.floor.v16f64(<16 x double> %x) nounwind readnone
/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h157 v16f64 = 102, // 16 x f64 enumerator
411 SimpleTy == MVT::v32f32 || SimpleTy == MVT::v16f64 || in is1024BitVector()
628 case v16f64: in getVectorElementType()
701 case v16f64: in getVectorNumElements()
950 case v16f64: return TypeSize::Fixed(1024); in getSizeInBits()
1215 if (NumElements == 16) return MVT::v16f64; in getVectorVT()
/external/llvm-project/libclc/generic/include/math/
Dunary_intrin.inc15 _CLC_OVERLOAD double16 __CLC_FUNCTION(double16 d) __asm(__CLC_INTRINSIC ".v16f64");
Dbinary_intrin.inc15 _CLC_OVERLOAD double16 __CLC_FUNCTION(double16, double16) __asm(__CLC_INTRINSIC ".v16f64");
Dternary_intrin.inc15 _CLC_OVERLOAD double16 __CLC_FUNCTION(double16, double16, double16) __asm(__CLC_INTRINSIC ".v16f64"…

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