v32i16 (reference) in projects: external

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Searched refs:v32i16 (Results 1 – 25 of 164) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/X86/
D	avx512bw-intrinsics-canonical.ll	21 %res = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> %a, <32 x i16> %b) 24 declare <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16>, <32 x i16>) 40 %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> %a, <32 x i16> %b) 58 %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> %a, <32 x i16> %b) 76 %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> %a, <32 x i16> %b) 96 %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> %a, <32 x i16> %b) 116 %1 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> %a, <32 x i16> %b) 132 %sub = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> %a, <32 x i16> %b) 135 declare <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16>, <32 x i16>) 151 %sub = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> %a, <32 x i16> %b) [all …]
D	avx512vbmi2-intrinsics.ll	20 %3 = call <32 x i16> @llvm.masked.expandload.v32i16(i16* %1, <32 x i1> %2, <32 x i16> %data) 39 …%3 = call <32 x i16> @llvm.masked.expandload.v32i16(i16* %1, <32 x i1> %2, <32 x i16> zeroinitiali… 57 …%2 = call <32 x i16> @llvm.masked.expandload.v32i16(i16* %1, <32 x i1> <i1 true, i1 true, i1 true,… 65 …%1 = call <32 x i16> @llvm.x86.avx512.mask.expand.v32i16(<32 x i16> %data, <32 x i16> undef, <32 x… 84 …%2 = call <32 x i16> @llvm.x86.avx512.mask.expand.v32i16(<32 x i16> %data, <32 x i16> %passthru, <… 101 …%2 = call <32 x i16> @llvm.x86.avx512.mask.expand.v32i16(<32 x i16> %data, <32 x i16> zeroinitiali… 219 call void @llvm.masked.compressstore.v32i16(<32 x i16> %data, i16* %1, <32 x i1> %2) 239 …call void @llvm.masked.compressstore.v32i16(<32 x i16> %data, i16* %1, <32 x i1> <i1 true, i1 true… 258 …%2 = call <32 x i16> @llvm.x86.avx512.mask.compress.v32i16(<32 x i16> %data, <32 x i16> %passthru,… 275 …%2 = call <32 x i16> @llvm.x86.avx512.mask.compress.v32i16(<32 x i16> %data, <32 x i16> zeroinitia… [all …]
D	avx512vbmi2-intrinsics-fast-isel.ll	108 tail call void @llvm.masked.compressstore.v32i16(<32 x i16> %0, i16* %1, <32 x i1> %2) 235 %3 = tail call <32 x i16> @llvm.masked.expandload.v32i16(i16* %1, <32 x i1> %2, <32 x i16> %0) 256 …%2 = tail call <32 x i16> @llvm.masked.expandload.v32i16(i16* %0, <32 x i1> %1, <32 x i16> zeroini… 433 …%2 = tail call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %0, <32 x i16> %1, <32 x i16> <i16 3, i16 3… 441 declare <32 x i16> @llvm.fshl.v32i16(<32 x i16>, <32 x i16>, <32 x i16>) 458 …%2 = tail call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %0, <32 x i16> %1, <32 x i16> <i16 7, i16 7… 473 …%2 = tail call <32 x i16> @llvm.fshl.v32i16(<32 x i16> %0, <32 x i16> %1, <32 x i16> <i16 15, i16 … 605 …%2 = tail call <32 x i16> @llvm.fshr.v32i16(<32 x i16> %1, <32 x i16> %0, <32 x i16> <i16 3, i16 3… 613 declare <32 x i16> @llvm.fshr.v32i16(<32 x i16>, <32 x i16>, <32 x i16>) 630 …%2 = tail call <32 x i16> @llvm.fshr.v32i16(<32 x i16> %1, <32 x i16> %0, <32 x i16> <i16 15, i16 … [all …]
/external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/
D	bitcount-64b.ll	`16 %t0 = call <32 x i16> @llvm.ctpop.v32i16(<32 x i16> %a0) 45 %t0 = call <32 x i16> @llvm.ctlz.v32i16(<32 x i16> %a0) 92 %t0 = call <32 x i16> @llvm.cttz.v32i16(<32 x i16> %a0) 114 declare <32 x i16> @llvm.ctpop.v32i16(<32 x i16>) #0 118 declare <32 x i16> @llvm.ctlz.v32i16(<32 x i16>) #0 122 declare <32 x i16> @llvm.cttz.v32i16(<32 x i16>) #0`
D	bswap.ll	`8 %v0 = call <32 x i16> @llvm.bswap.v32i16(<32 x i16> %a0) 39 declare <32 x i16> @llvm.bswap.v32i16(<32 x i16>) #0`
D	widen-ext.ll	`3 ; v32i8 -> v32i16 70 ; v32i16 -> v32i32`
D	widen-trunc.ll	`5 ; v32i16 -> v32i8 76 ; v32i32 -> v32i16`
/external/llvm-project/llvm/lib/Target/X86/
D	X86TargetTransformInfo.cpp	390 { ISD::SDIV, MVT::v32i16, 6 }, // vpmulhw sequence in getArithmeticInstrCost() 391 { ISD::SREM, MVT::v32i16, 8 }, // vpmulhw+mul+sub sequence in getArithmeticInstrCost() 392 { ISD::UDIV, MVT::v32i16, 6 }, // vpmulhuw sequence in getArithmeticInstrCost() 393 { ISD::UREM, MVT::v32i16, 8 }, // vpmulhuw+mul+sub sequence in getArithmeticInstrCost() 413 { ISD::SDIV, MVT::v32i16, 12 }, // 2vpmulhw sequence in getArithmeticInstrCost() 414 { ISD::SREM, MVT::v32i16, 16 }, // 2vpmulhw+mul+sub sequence in getArithmeticInstrCost() 415 { ISD::UDIV, MVT::v32i16, 12 }, // 2vpmulhuw sequence in getArithmeticInstrCost() 416 { ISD::UREM, MVT::v32i16, 16 }, // 2vpmulhuw+mul+sub sequence in getArithmeticInstrCost() 502 { ISD::SHL, MVT::v32i16, 1 }, // vpsllvw in getArithmeticInstrCost() 503 { ISD::SRL, MVT::v32i16, 1 }, // vpsrlvw in getArithmeticInstrCost() [all …]
D	X86InstrVecCompiler.td	`86 defm : subvector_subreg_lowering<VR128, v8i16, VR512, v32i16, sub_xmm>; 97 defm : subvector_subreg_lowering<VR256, v16i16, VR512, v32i16, sub_ymm>; 135 defm : subvec_zero_lowering<"DQA64Z128", VR128X, v32i16, v8i16, v16i32, sub_xmm>; 142 defm : subvec_zero_lowering<"DQA64Z256", VR256X, v32i16, v16i16, v16i32, sub_ymm>; 151 defm : subvec_zero_lowering<"DQA", VR128, v32i16, v8i16, v16i32, sub_xmm>; 158 defm : subvec_zero_lowering<"DQAY", VR256, v32i16, v16i16, v16i32, sub_ymm>;`
/external/llvm/include/llvm/CodeGen/
D	MachineValueType.h	`83 v32i16 = 35, // 32 x i16 enumerator 266 SimpleTy == MVT::v32i16 \|\| SimpleTy == MVT::v16i32 \|\| in is512BitVector() 339 case v32i16: in getVectorElementType() 386 case v32i16: in getVectorNumElements() 498 case v32i16: in getSizeInBits() 619 if (NumElements == 32) return MVT::v32i16; in getVectorVT()`
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
D	HexagonCallingConv.td	`85 CCIfType<[v16i32,v32i16,v64i8], 91 CCIfType<[v16i32,v32i16,v64i8], 117 CCIfType<[v16i32,v32i16,v64i8],`
/external/llvm-project/llvm/lib/Target/Hexagon/
D	HexagonCallingConv.td	`115 CCIfType<[v16i32,v32i16,v64i8], 121 CCIfType<[v16i32,v32i16,v64i8], 147 CCIfType<[v16i32,v32i16,v64i8],`
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
D	MachineValueType.h	`88 v32i16 = 40, // 32 x i16 enumerator 369 SimpleTy == MVT::v64i8 \|\| SimpleTy == MVT::v32i16 \|\| in is512BitVector() 466 case v32i16: in getVectorElementType() 575 case v32i16: in getVectorNumElements() 792 case v32i16: in getSizeInBits() 953 if (NumElements == 32) return MVT::v32i16; in getVectorVT()`
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
D	arith-uminmax.ll	24 declare <32 x i16> @llvm.umax.v32i16(<32 x i16>, <32 x i16>) 44 …stimated cost of 8 for instruction: %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, … 63 …stimated cost of 8 for instruction: %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, … 82 …stimated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, … 101 …stimated cost of 8 for instruction: %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, … 120 …stimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, … 139 …stimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, … 158 …stimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, … 177 …stimated cost of 1 for instruction: %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, … 197 %V32I16 = call <32 x i16> @llvm.umax.v32i16(<32 x i16> undef, <32 x i16> undef) [all …]
D	arith-sminmax.ll	24 declare <32 x i16> @llvm.smax.v32i16(<32 x i16>, <32 x i16>) 44 …stimated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, … 63 …stimated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, … 82 …stimated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, … 101 …stimated cost of 8 for instruction: %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, … 120 …stimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, … 139 …stimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, … 158 …stimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, … 177 …stimated cost of 1 for instruction: %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, … 197 %V32I16 = call <32 x i16> @llvm.smax.v32i16(<32 x i16> undef, <32 x i16> undef) [all …]
D	arith-usat.ll	31 declare <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16>, <32 x i16>) 51 …ated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 70 …ated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 89 …ated cost of 8 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 108 …ated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 127 …ated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 146 …ated cost of 1 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 165 …ated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 184 …ated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 203 …ated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … [all …]
D	arith-ssat.ll	30 declare <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16>, <32 x i16>) 50 …ated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 69 …ated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 88 …ated cost of 8 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 107 …ated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 126 …ated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 145 …ated cost of 1 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 164 …ated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 183 …ated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 202 …ated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … [all …]
D	abs.ll	120 …estimated cost of 8 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … 127 …estimated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … 134 …estimated cost of 4 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … 141 …estimated cost of 6 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … 148 …estimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … 155 …estimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … 162 …estimated cost of 2 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … 169 …estimated cost of 1 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … 175 %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, i1 0) 352 …estimated cost of 8 for instruction: %V32I16 = call <32 x i16> @llvm.abs.v32i16(<32 x i16> %a512, … [all …]
D	arith-fix.ll	27 declare <32 x i16> @llvm.smul.fix.v32i16(<32 x i16>, <32 x i16>, i32) 47 …ed cost of 132 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … 66 …ted cost of 68 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … 85 …ted cost of 74 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … 104 …ted cost of 50 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … 123 …ted cost of 23 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … 142 …ted cost of 21 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … 161 …ted cost of 23 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … 180 …ed cost of 140 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … 199 …ted cost of 68 for instruction: %V32I16 = call <32 x i16> @llvm.smul.fix.v32i16(<32 x i16> undef, … [all …]
/external/llvm-project/llvm/include/llvm/Support/
D	MachineValueType.h	`89 v32i16 = 41, // 32 x i16 enumerator 402 SimpleTy == MVT::v32i16 \|\| SimpleTy == MVT::v16i32 \|\| in is512BitVector() 535 case v32i16: in getVectorElementType() 680 case v32i16: in getVectorNumElements() 928 case v32i16: in getSizeInBits() 1140 if (NumElements == 32) return MVT::v32i16; in getVectorVT()`
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
D	X86TargetTransformInfo.cpp	354 { ISD::SDIV, MVT::v32i16, 6 }, // vpmulhw sequence in getArithmeticInstrCost() 355 { ISD::SREM, MVT::v32i16, 8 }, // vpmulhw+mul+sub sequence in getArithmeticInstrCost() 356 { ISD::UDIV, MVT::v32i16, 6 }, // vpmulhuw sequence in getArithmeticInstrCost() 357 { ISD::UREM, MVT::v32i16, 8 }, // vpmulhuw+mul+sub sequence in getArithmeticInstrCost() 506 { ISD::SHL, MVT::v32i16, 1 }, // vpsllvw in getArithmeticInstrCost() 507 { ISD::SRL, MVT::v32i16, 1 }, // vpsrlvw in getArithmeticInstrCost() 508 { ISD::SRA, MVT::v32i16, 1 }, // vpsravw in getArithmeticInstrCost() 1006 {TTI::SK_Broadcast, MVT::v32i16, 1}, // vpbroadcastw in getShuffleCost() 1009 {TTI::SK_Reverse, MVT::v32i16, 1}, // vpermw in getShuffleCost() 1013 {TTI::SK_PermuteSingleSrc, MVT::v32i16, 1}, // vpermw in getShuffleCost() [all …]
D	X86InstrVecCompiler.td	`86 defm : subvector_subreg_lowering<VR128, v8i16, VR512, v32i16, sub_xmm>; 97 defm : subvector_subreg_lowering<VR256, v16i16, VR512, v32i16, sub_ymm>; 135 defm : subvec_zero_lowering<"DQA64Z128", VR128X, v32i16, v8i16, v16i32, sub_xmm>; 142 defm : subvec_zero_lowering<"DQA64Z256", VR256X, v32i16, v16i16, v16i32, sub_ymm>; 151 defm : subvec_zero_lowering<"DQA", VR128, v32i16, v8i16, v16i32, sub_xmm>; 158 defm : subvec_zero_lowering<"DQAY", VR256, v32i16, v16i16, v16i32, sub_ymm>;`
/external/llvm-project/llvm/test/Analysis/CostModel/ARM/
D	arith-usat.ll	22 declare <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16>, <32 x i16>) 42 …ed cost of 160 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 61 …ted cost of 12 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 80 …ted cost of 24 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 99 …ted cost of 34 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 118 …ated cost of 6 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 137 …ated cost of 6 for instruction: %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, … 157 %V32I16 = call <32 x i16> @llvm.uadd.sat.v32i16(<32 x i16> undef, <32 x i16> undef) 180 declare <32 x i16> @llvm.usub.sat.v32i16(<32 x i16>, <32 x i16>) 200 …ed cost of 160 for instruction: %V32I16 = call <32 x i16> @llvm.usub.sat.v32i16(<32 x i16> undef, … [all …]
D	arith-ssat.ll	22 declare <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16>, <32 x i16>) 42 …ed cost of 576 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 61 …ted cost of 34 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 80 …ted cost of 68 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 99 …ted cost of 72 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 118 …ted cost of 18 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 137 …ted cost of 14 for instruction: %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, … 157 %V32I16 = call <32 x i16> @llvm.sadd.sat.v32i16(<32 x i16> undef, <32 x i16> undef) 180 declare <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16>, <32 x i16>) 200 …ed cost of 576 for instruction: %V32I16 = call <32 x i16> @llvm.ssub.sat.v32i16(<32 x i16> undef, … [all …]
D	arith-overflow.ll	22 declare {<32 x i16>, <32 x i1>} @llvm.sadd.with.overflow.v32i16(<32 x i16>, <32 x i16>) 42 …ction: %V32I16 = call { <32 x i16>, <32 x i1> } @llvm.sadd.with.overflow.v32i16(<32 x i16> undef, … 61 …ction: %V32I16 = call { <32 x i16>, <32 x i1> } @llvm.sadd.with.overflow.v32i16(<32 x i16> undef, … 80 …ction: %V32I16 = call { <32 x i16>, <32 x i1> } @llvm.sadd.with.overflow.v32i16(<32 x i16> undef, … 99 …ction: %V32I16 = call { <32 x i16>, <32 x i1> } @llvm.sadd.with.overflow.v32i16(<32 x i16> undef, … 118 …ction: %V32I16 = call { <32 x i16>, <32 x i1> } @llvm.sadd.with.overflow.v32i16(<32 x i16> undef, … 137 …ction: %V32I16 = call { <32 x i16>, <32 x i1> } @llvm.sadd.with.overflow.v32i16(<32 x i16> undef, … 157 …%V32I16 = call {<32 x i16>, <32 x i1>} @llvm.sadd.with.overflow.v32i16(<32 x i16> undef, <32 x i16… 180 declare {<32 x i16>, <32 x i1>} @llvm.uadd.with.overflow.v32i16(<32 x i16>, <32 x i16>) 200 …ction: %V32I16 = call { <32 x i16>, <32 x i1> } @llvm.uadd.with.overflow.v32i16(<32 x i16> undef, … [all …]

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