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/external/llvm-project/clang/test/CodeGen/RISCV/
Driscv64-lp64-lp64f-abi.c15 typedef unsigned char v32i8 __attribute__((vector_size(32))); typedef
21 int f_scalar_stack_1(int32_t a, __int128_t b, double c, long double d, v32i8 e, in f_scalar_stack_1()
31 struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d, in f_scalar_stack_2()
Driscv64-lp64-abi.c13 typedef unsigned char v32i8 __attribute__((vector_size(32))); typedef
19 int f_scalar_stack_1(int32_t a, __int128_t b, float c, long double d, v32i8 e, in f_scalar_stack_1()
29 struct large f_scalar_stack_2(double a, __int128_t b, long double c, v32i8 d, in f_scalar_stack_2()
Driscv64-lp64-lp64f-lp64d-abi.c174 typedef unsigned char v32i8 __attribute__((vector_size(32))); typedef
177 void f_vec_large_v32i8(v32i8 x) { in f_vec_large_v32i8()
182 v32i8 f_vec_large_v32i8_ret() { in f_vec_large_v32i8_ret()
183 return (v32i8){1, 2, 3, 4, 5, 6, 7, 8}; in f_vec_large_v32i8_ret()
196 int f_scalar_stack_2(int32_t a, __int128_t b, int64_t c, long double d, v32i8 e, in f_scalar_stack_2()
206 struct large f_scalar_stack_3(uint32_t a, __int128_t b, long double c, v32i8 d, in f_scalar_stack_3()
/external/clang/test/CodeGen/
Dsystemz-abi-vector.c36 typedef __attribute__((vector_size(32))) char v32i8; typedef
62 v32i8 pass_v32i8(v32i8 arg) { return arg; } in pass_v32i8()
158 struct agg_v32i8 { v32i8 a; };
349 v32i8 va_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, v32i8); } in va_v32i8()
/external/llvm-project/clang/test/CodeGen/SystemZ/
Dsystemz-abi-vector.c46 typedef __attribute__((vector_size(32))) char v32i8; typedef
72 v32i8 pass_v32i8(v32i8 arg) { return arg; } in pass_v32i8()
168 struct agg_v32i8 { v32i8 a; };
359 v32i8 va_v32i8(__builtin_va_list l) { return __builtin_va_arg(l, v32i8); } in va_v32i8()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp317 { ISD::SHL, MVT::v32i8, 2 }, // psllw + pand. in getArithmeticInstrCost()
318 { ISD::SRL, MVT::v32i8, 2 }, // psrlw + pand. in getArithmeticInstrCost()
319 { ISD::SRA, MVT::v32i8, 4 }, // psrlw, pand, pxor, psubb. in getArithmeticInstrCost()
336 { ISD::SHL, MVT::v32i8, 4+2 }, // 2*(psllw + pand) + split. in getArithmeticInstrCost()
337 { ISD::SRL, MVT::v32i8, 4+2 }, // 2*(psrlw + pand) + split. in getArithmeticInstrCost()
338 { ISD::SRA, MVT::v32i8, 8+2 }, // 2*(psrlw, pand, pxor, psubb) + split. in getArithmeticInstrCost()
384 { ISD::SDIV, MVT::v32i8, 14 }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
385 { ISD::SREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence in getArithmeticInstrCost()
386 { ISD::UDIV, MVT::v32i8, 14 }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
387 { ISD::UREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence in getArithmeticInstrCost()
[all …]
/external/llvm-project/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp339 { ISD::SHL, MVT::v32i8, 2 }, // psllw + pand. in getArithmeticInstrCost()
340 { ISD::SRL, MVT::v32i8, 2 }, // psrlw + pand. in getArithmeticInstrCost()
341 { ISD::SRA, MVT::v32i8, 4 }, // psrlw, pand, pxor, psubb. in getArithmeticInstrCost()
363 { ISD::SHL, MVT::v32i8, 4+2 }, // 2*(psllw + pand) + split. in getArithmeticInstrCost()
364 { ISD::SRL, MVT::v32i8, 4+2 }, // 2*(psrlw + pand) + split. in getArithmeticInstrCost()
365 { ISD::SRA, MVT::v32i8, 8+2 }, // 2*(psrlw, pand, pxor, psubb) + split. in getArithmeticInstrCost()
428 { ISD::SDIV, MVT::v32i8, 14 }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
429 { ISD::SREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence in getArithmeticInstrCost()
430 { ISD::UDIV, MVT::v32i8, 14 }, // 2*ext+2*pmulhw sequence in getArithmeticInstrCost()
431 { ISD::UREM, MVT::v32i8, 16 }, // 2*ext+2*pmulhw+mul+sub sequence in getArithmeticInstrCost()
[all …]
/external/llvm/include/llvm/CodeGen/
DMachineValueType.h73 v32i8 = 26, // 32 x i8 enumerator
258 SimpleTy == MVT::v32i8 || SimpleTy == MVT::v16i16 || in is256BitVector()
330 case v32i8: in getVectorElementType()
385 case v32i8: in getVectorNumElements()
490 case v32i8: in getSizeInBits()
608 if (NumElements == 32) return MVT::v32i8; in getVectorVT()
/external/llvm/lib/Target/X86/
DX86TargetTransformInfo.cpp191 { ISD::SHL, MVT::v32i8, 2 }, in getArithmeticInstrCost()
192 { ISD::SRL, MVT::v32i8, 4 }, in getArithmeticInstrCost()
193 { ISD::SRA, MVT::v32i8, 4 }, in getArithmeticInstrCost()
212 { ISD::SHL, MVT::v32i8, 11 }, // vpblendvb sequence. in getArithmeticInstrCost()
215 { ISD::SRL, MVT::v32i8, 11 }, // vpblendvb sequence. in getArithmeticInstrCost()
218 { ISD::SRA, MVT::v32i8, 24 }, // vpblendvb sequence. in getArithmeticInstrCost()
224 { ISD::SDIV, MVT::v32i8, 32*20 }, in getArithmeticInstrCost()
228 { ISD::UDIV, MVT::v32i8, 32*20 }, in getArithmeticInstrCost()
247 { ISD::SHL, MVT::v32i8, 2 }, // psllw. in getArithmeticInstrCost()
256 { ISD::SRL, MVT::v32i8, 2 }, // psrlw. in getArithmeticInstrCost()
[all …]
DX86CallingConv.td50 CCIfType<[v32i1], CCPromoteToType<v32i8>>,
62 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
145 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
327 CCIfType<[v32i1], CCPromoteToType<v32i8>>,
340 CCIfNotVarArg<CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
362 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
403 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64], CCPassIndirect<i64>>,
445 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
520 CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
536 CCIfNotVarArg<CCIfType<[v32i8, v16i16, v8i32, v4i64, v8f32, v4f64],
[all …]
/external/llvm/test/CodeGen/X86/
Davx2-cmp.ll25 define <32 x i8> @v32i8-cmp(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
53 define <32 x i8> @v32i8-cmpeq(<32 x i8> %i, <32 x i8> %j) nounwind readnone {
Davx512bw-mov.ll125 …%res = call <32 x i8> @llvm.masked.load.v32i8(<32 x i8>* %addr, i32 4, <32 x i1>%mask, <32 x i8> z…
128 declare <32 x i8> @llvm.masked.load.v32i8(<32 x i8>*, i32, <32 x i1>, <32 x i8>)
185 call void @llvm.masked.store.v32i8(<32 x i8> %val, <32 x i8>* %addr, i32 4, <32 x i1>%mask)
188 declare void @llvm.masked.store.v32i8(<32 x i8>, <32 x i8>*, i32, <32 x i1>)
/external/llvm-project/llvm/test/CodeGen/X86/
Davx512bwvl-intrinsics-canonical.ll376 %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
379 declare <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8>, <32 x i8>)
388 %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
400 %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
412 %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
424 %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
437 %1 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
520 %sub = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
523 declare <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8>, <32 x i8>)
532 %sub = call <32 x i8> @llvm.ssub.sat.v32i8(<32 x i8> %a, <32 x i8> %b)
[all …]
Davx512bw-mov.ll119 …%res = call <32 x i8> @llvm.masked.load.v32i8(<32 x i8>* %addr, i32 4, <32 x i1>%mask, <32 x i8> z…
122 declare <32 x i8> @llvm.masked.load.v32i8(<32 x i8>*, i32, <32 x i1>, <32 x i8>)
176 call void @llvm.masked.store.v32i8(<32 x i8> %val, <32 x i8>* %addr, i32 4, <32 x i1>%mask)
179 declare void @llvm.masked.store.v32i8(<32 x i8>, <32 x i8>*, i32, <32 x i1>)
Dbitcast-setcc-256.ll153 define i32 @v32i8(<32 x i8> %a, <32 x i8> %b) {
154 ; SSE2-SSSE3-LABEL: v32i8:
164 ; AVX1-LABEL: v32i8:
177 ; AVX2-LABEL: v32i8:
184 ; AVX512F-LABEL: v32i8:
191 ; AVX512BW-LABEL: v32i8:
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h77 v32i8 = 30, // 32 x i8 enumerator
360 SimpleTy == MVT::v4f64 || SimpleTy == MVT::v32i8 || in is256BitVector()
450 case v32i8: in getVectorElementType()
574 case v32i8: in getVectorNumElements()
777 case v32i8: in getSizeInBits()
941 if (NumElements == 32) return MVT::v32i8; in getVectorVT()
/external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/
Disel-widen-truncate-pair.ll3 ; This has a v32i8 = truncate v16i32 (64b mode), which was legalized to
/external/llvm-project/llvm/test/Instrumentation/MemorySanitizer/
Dabs-vector.ll18 ; CHECK-NEXT: [[TMP4:%.*]] = tail call <32 x i8> @llvm.abs.v32i8(<32 x i8> [[TMP3]], i1 false)
27 %1 = tail call <32 x i8> @llvm.abs.v32i8(<32 x i8> %0, i1 false)
92 declare <32 x i8> @llvm.abs.v32i8(<32 x i8>, i1 immarg) #1
/external/llvm-project/llvm/test/Analysis/CostModel/ARM/
Dreduce-add.ll54 …estimated cost of 94 for instruction: %V32 = call i8 @llvm.vector.reduce.add.v32i8(<32 x i8> undef)
64 …stimated cost of 488 for instruction: %V32 = call i8 @llvm.vector.reduce.add.v32i8(<32 x i8> undef)
74 …estimated cost of 94 for instruction: %V32 = call i8 @llvm.vector.reduce.add.v32i8(<32 x i8> undef)
84 …stimated cost of 488 for instruction: %V32 = call i8 @llvm.vector.reduce.add.v32i8(<32 x i8> undef)
93 %V32 = call i8 @llvm.vector.reduce.add.v32i8(<32 x i8> undef)
122 declare i8 @llvm.vector.reduce.add.v32i8(<32 x i8>)
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dmve-vaddv.ll10 declare i8 @llvm.vector.reduce.add.i8.v32i8(<32 x i8>)
86 %r = call i8 @llvm.vector.reduce.add.i8.v32i8(<32 x i8> %s1)
174 %t = call i8 @llvm.vector.reduce.add.i8.v32i8(<32 x i8> %s1)
/external/llvm-project/llvm/test/Analysis/CostModel/X86/
Darith-uminmax.ll28 declare <32 x i8> @llvm.umax.v32i8(<32 x i8>, <32 x i8>)
47 …n estimated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <…
66 …n estimated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <…
85 …n estimated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <…
104 …n estimated cost of 4 for instruction: %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <…
123 …n estimated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <…
142 …n estimated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <…
161 …n estimated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <…
180 …n estimated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <…
201 %V32I8 = call <32 x i8> @llvm.umax.v32i8(<32 x i8> undef, <32 x i8> undef)
[all …]
Darith-sminmax.ll28 declare <32 x i8> @llvm.smax.v32i8(<32 x i8>, <32 x i8>)
47 …n estimated cost of 8 for instruction: %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <…
66 …n estimated cost of 8 for instruction: %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <…
85 …n estimated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <…
104 …n estimated cost of 4 for instruction: %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <…
123 …n estimated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <…
142 …n estimated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <…
161 …n estimated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <…
180 …n estimated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <…
201 %V32I8 = call <32 x i8> @llvm.smax.v32i8(<32 x i8> undef, <32 x i8> undef)
[all …]
Darith-usat.ll35 declare <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8>, <32 x i8>)
54 …timated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
73 …timated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
92 …timated cost of 4 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
111 …timated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
130 …timated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
149 …timated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
168 …timated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
187 …timated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
206 …timated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.uadd.sat.v32i8(<32 x i8> undef, <…
[all …]
Darith-ssat.ll34 declare <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8>, <32 x i8>)
53 …timated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
72 …timated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
91 …timated cost of 4 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
110 …timated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
129 …timated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
148 …timated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
167 …timated cost of 1 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
186 …timated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
205 …timated cost of 2 for instruction: %V32I8 = call <32 x i8> @llvm.sadd.sat.v32i8(<32 x i8> undef, <…
[all …]
/external/llvm/test/Analysis/CostModel/X86/
Dctbits-cost.ll18 declare <32 x i8> @llvm.ctpop.v32i8(<32 x i8>)
88 %ctpop = call <32 x i8> @llvm.ctpop.v32i8(<32 x i8> %a)
102 declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1)
235 %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 0)
244 %ctlz = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %a, i1 1)
258 declare <32 x i8> @llvm.cttz.v32i8(<32 x i8>, i1)
391 %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 0)
400 %cttz = call <32 x i8> @llvm.cttz.v32i8(<32 x i8> %a, i1 1)

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