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/external/llvm/test/Transforms/InstCombine/
Ddemand_shrink_nsw.ll3 ; The constant at %v35 should be shrunk, but this must lead to the nsw flag of
6 ; CHECK: %v35 = add nuw i32 %v34, 1362915575
15 %v35 = add nuw i32 %v34, 3510399223
21 %v42 = sub i32 %v35, %v41
/external/llvm-project/llvm/test/Transforms/InstCombine/
Ddemand_shrink_nsw.ll4 ; The constant at %v35 should be shrunk, but this must lead to the nsw flag of
21 %v35 = add nuw i32 %v34, 3510399223
27 %v42 = sub i32 %v35, %v41
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dswp-phi-dep1.ll57 %v35 = phi i8* [ %v79, %b4 ], [ %v11, %b3 ]
65 %v43 = load i8, i8* %v35, align 1, !tbaa !0
66 %v44 = getelementptr i8, i8* %v35, i32 %a3
68 %v46 = getelementptr i8, i8* %v35, i32 %v3
102 %v79 = getelementptr i8, i8* %v35, i32 1
Dswp-epilog-reuse4.ll43 %v8 = phi i32 [ %v4, %b4 ], [ %v35, %b5 ]
71 %v35 = add i32 %v8, 1
72 %v36 = icmp eq i32 %v35, 164
Dconstext-replace.ll104 %v35 = load i32, i32* %v34, align 4
105 %v36 = getelementptr inbounds [13595 x i32], [13595 x i32]* @g1, i32 0, i32 %v35
122 store i32 %v35, i32* %v42, align 4
126 %v44 = getelementptr inbounds [13595 x i32], [13595 x i32]* @g2, i32 0, i32 %v35
Dregscav-wrong-super-sub-regs.ll75 %v33 = phi i32 [ undef, %b2 ], [ %v35, %b3 ], [ %v35, %b13 ]
77 %v35 = phi i32 [ undef, %b2 ], [ %v94, %b3 ], [ %v65, %b13 ]
131 %v58 = shl i32 %v35, 2
139 %v65 = add i32 %v35, -1
Dassert-postinc-ptr-not-value.ll67 %v35 = lshr i32 %v32, 2
68 %v36 = add i32 %v35, -1
71 %v39 = shl nuw i32 %v35, 2
151 %v35 = load i32, i32* %v34, align 4
152 %v36 = and i32 %v35, 3
Dtfr-cleanup.ll75 %v35 = shl nuw nsw i64 %v34, 32
77 %v37 = or i64 %v36, %v35
Dvect-set_cc_v2i32.ll74 %v35 = phi i16 [ 0, %b4 ], [ 1, %b12 ]
135 %v69 = zext i16 %v35 to i32
140 %v73 = add i16 %v35, 1
144 %v74 = phi i16 [ %v35, %b5 ], [ %v73, %b13 ]
Dv60-haar-postinc.ll60 %v35 = load <16 x i32>, <16 x i32>* %v28, align 64, !tbaa !0
67 %v42 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v35, <16 x i32> %v37)
68 %v43 = tail call <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32> %v35, <16 x i32> %v37)
Dswp-resmii-1.ll58 %v35 = load <16 x i32>, <16 x i32>* %v28, align 64
65 %v42 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v35, <16 x i32> %v37)
66 %v43 = tail call <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32> %v35, <16 x i32> %v37)
Dvect_setcc.ll69 %v21 = phi i16* [ %v2, %b0 ], [ %v35, %b12 ]
83 %v35 = getelementptr i16, i16* %v21, i32 4
Dremove_lsr.ll33 %v8 = phi %s.1* [ %v35, %b1 ], [ %v2, %b0 ]
62 %v35 = getelementptr %s.1, %s.1* %v8, i32 1
Dupper-mpy.ll62 %v35 = load i32, i32* %v9, align 4
63 %v36 = sext i32 %v35 to i64
Dmulti-cycle.ll51 %v35 = phi <16 x i32>* [ %v28, %b18 ], [ %v46, %b32 ]
62 %v46 = getelementptr inbounds <16 x i32>, <16 x i32>* %v35, i32 1
63 %v47 = load <16 x i32>, <16 x i32>* %v35, align 64, !tbaa !1
Dswp-stages.ll70 %v35 = icmp slt i32 %v34, 33
71 br i1 %v35, label %b3, label %b4
Dfp_latency.ll64 %v35 = icmp eq i32 %v34, 25
65 br i1 %v35, label %b4, label %b1
/external/jackson-databind/src/test/java/com/fasterxml/jackson/databind/deser/creators/
DBigCreatorTest.java33 @JsonProperty("v35") int v35, @JsonProperty("v36") int v36, in Biggie() argument
41 v31, v32, v33, v34, v35, v36, v37, v38, v39, v40, in Biggie()
/external/llvm-project/llvm/test/CodeGen/Hexagon/loop-idiom/
Dpmpy-long-loop.ll53 %v35 = add nsw i32 %v34, 32768
54 %v36 = icmp ult i32 %v35, 65536
Dpmpy-mod.ll62 %v35 = zext i16 %v32 to i32
63 %v36 = or i32 %v35, 32768
/external/llvm/utils/unittest/googletest/include/gtest/
Dgtest-param-test.h801 T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35) { in Values() argument
806 v22, v23, v24, v25, v26, v27, v28, v29, v30, v31, v32, v33, v34, v35); in Values()
823 T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36) { in Values() argument
829 v34, v35, v36); in Values()
846 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
853 v34, v35, v36, v37); in Values()
870 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
877 v33, v34, v35, v36, v37, v38); in Values()
894 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
901 v32, v33, v34, v35, v36, v37, v38, v39); in Values()
[all …]
/external/libvpx/libvpx/third_party/googletest/src/include/gtest/
Dgtest-param-test.h790 T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35) { in Values() argument
795 v22, v23, v24, v25, v26, v27, v28, v29, v30, v31, v32, v33, v34, v35); in Values()
812 T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36) { in Values() argument
818 v34, v35, v36); in Values()
835 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
842 v34, v35, v36, v37); in Values()
859 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
866 v33, v34, v35, v36, v37, v38); in Values()
883 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
890 v32, v33, v34, v35, v36, v37, v38, v39); in Values()
[all …]
/external/llvm-project/llvm/utils/unittest/googletest/include/gtest/
Dgtest-param-test.h796 T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35) { in Values() argument
801 v22, v23, v24, v25, v26, v27, v28, v29, v30, v31, v32, v33, v34, v35); in Values()
818 T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36) { in Values() argument
824 v34, v35, v36); in Values()
841 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
848 v34, v35, v36, v37); in Values()
865 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
872 v33, v34, v35, v36, v37, v38); in Values()
889 T29 v29, T30 v30, T31 v31, T32 v32, T33 v33, T34 v34, T35 v35, T36 v36, in Values() argument
896 v32, v33, v34, v35, v36, v37, v38, v39); in Values()
[all …]
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
DPR40310.ll55 %v35 = add i32 %local_4_, 12
58 %v38 = and i32 %v35, %v36
/external/llvm-project/llvm/test/Transforms/LoopVectorize/Hexagon/
Dminimum-vf.ll60 %v35 = zext i8 %v34 to i32
61 %v36 = mul nuw nsw i32 %v35, 20
83 %v57 = mul nsw i32 %v35, -5
99 %v72 = add nsw i32 %v71, %v35

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