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/external/llvm/test/Transforms/InstCombine/
Ddemand_shrink_nsw.ll17 %v38 = and i32 %v34, 221
18 %v39 = xor i32 %v38, 1874836915
/external/llvm-project/llvm/test/Transforms/InstCombine/
Ddemand_shrink_nsw.ll23 %v38 = and i32 %v34, 221
24 %v39 = xor i32 %v38, 1874836915
/external/jackson-databind/src/test/java/com/fasterxml/jackson/databind/deser/creators/
DBigCreatorTest.java34 @JsonProperty("v37") int v37, @JsonProperty("v38") int v38, in Biggie() argument
41 v31, v32, v33, v34, v35, v36, v37, v38, v39, v40, in Biggie()
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dhexagon_vector_loop_carried_reuse_commutative.ll41 %v22 = phi i32 [ 0, %b1 ], [ %v38, %b2 ]
58 %v38 = add nuw nsw i32 %v22, 128
59 %v39 = icmp slt i32 %v38, %v3
Dhwloop-phi-subreg.ll60 %v38 = icmp slt i32 undef, undef
61 br i1 %v38, label %b4, label %b5
Dbkfir.ll36 %v17 = phi i32 [ %v38, %b3 ], [ 0, %b2 ]
57 %v38 = trunc i64 %v37 to i32
71 %v49 = ashr i32 %v38, 18
Dswp-phi-def-use.ll91 %v33 = phi i32 [ %v29, %b9 ], [ %v38, %b10 ]
96 %v38 = select i1 false, i32 0, i32 %v33
103 %v41 = phi i32 [ %v29, %b8 ], [ %v29, %b7 ], [ %v38, %b10 ]
Dtfr-cleanup.ll78 %v38 = or i64 %v37, %v29
79 %v39 = or i64 %v38, %v32
Dswp-const-tc3.ll30 %v8 = phi i16* [ %a2, %b1 ], [ %v38, %b6 ]
44 %v19 = phi i16* [ %v17, %b2 ], [ %v38, %b3 ]
63 %v38 = getelementptr inbounds i16, i16* %v18, i32 2
Dremove_lsr.ll30 %v5 = phi i32 [ %v38, %b1 ], [ 2, %b0 ]
65 %v38 = add i32 %v5, 1
Dupper-mpy.ll65 %v38 = lshr i64 %v37, 32
66 %v39 = trunc i64 %v38 to i32
Dswp-reuse-phi-4.ll89 %v38 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v23) #3
91 %v40 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v38, <16 x i32> %v39, i32 2) #3
93 %v42 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v41, <16 x i32> %v38, i32 2) #3
97 …%v46 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb.acc(<16 x i32> %v45, <16 x i32> %v38, i32 101…
Dassert-postinc-ptr-not-value.ll70 %v38 = load i32, i32* %v37, align 4
72 %v40 = and i32 %v38, 3
155 %v38 = load i32, i32* %v10, align 4
157 %v40 = and i32 %v38, 3
Dswp-bad-sched.ll72 %v38 = add nsw i32 %v5, 3
73 %v39 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 0, i32 %v38
75 %v41 = getelementptr inbounds [576 x i32], [576 x i32]* %a0, i32 1, i32 %v38
Dbug6757-endloop.ll86 %v38 = icmp ugt i32 %v37, 3
87 br i1 %v38, label %b10, label %b6
Dswp-order-carried.ll58 %v38 = getelementptr inbounds i8, i8* null, i32 8
59 %v39 = bitcast i8* %v38 to i32*
Dbug-allocframe-size.ll77 %v38 = fdiv float %v37, %v34
78 %v39 = fadd float %v36, %v38
Dswp-phi.ll52 %v38 = phi float [ undef, %b0 ], [ %v37, %b1 ]
53 %v39 = phi float [ undef, %b0 ], [ %v38, %b1 ]
105 %v91 = fmul float %v49, %v38
Dswp-phi-chains.ll53 %v12 = phi i32 [ %v3, %b0 ], [ %v38, %b1 ]
79 %v38 = tail call i32 @llvm.hexagon.M2.mpy.nac.sat.ll.s1(i32 %v35, i32 %v37, i32 %v37)
80 store i32 %v38, i32* @g0, align 4
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
DPR40310.ll58 %v38 = and i32 %v35, %v36
60 %v40 = and i32 %v37, %v38
/external/llvm-project/llvm/test/CodeGen/Hexagon/autohvx/
Disel-shuffle-gather.ll92 %v38 = or i32 %v37, 1
93 %v39 = getelementptr inbounds i32, i32* %a1, i32 %v38
101 %v46 = getelementptr inbounds i32, i32* %a0, i32 %v38
Dfloat-cost.ll59 %v38 = add nsw i32 %v31, %v28
60 %v39 = getelementptr inbounds i8, i8* %a0, i32 %v38
/external/llvm/test/CodeGen/X86/
Dmmx-coalescing.ll56 %v38 = bitcast <4 x i16> %v37 to <1 x i64>
60 %vx = phi <1 x i64> [ %v21, %if.A ], [ %v38, %if.B ]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dreserve-vgpr-for-sgpr-spill.ll27 ,~{v30},~{v31},~{v32},~{v33},~{v34},~{v35},~{v36},~{v37},~{v38},~{v39}
72 ,~{v30},~{v31},~{v32},~{v33},~{v34},~{v35},~{v36},~{v37},~{v38},~{v39}
114 ,~{v30},~{v31},~{v32},~{v33},~{v34},~{v35},~{v36},~{v37},~{v38},~{v39}
163 ,~{v30},~{v31},~{v32},~{v33},~{v34},~{v35},~{v36},~{v37},~{v38},~{v39}
/external/llvm/utils/unittest/googletest/include/gtest/
Dgtest-param-test.h871 T37 v37, T38 v38) { in Values() argument
877 v33, v34, v35, v36, v37, v38); in Values()
895 T37 v37, T38 v38, T39 v39) { in Values() argument
901 v32, v33, v34, v35, v36, v37, v38, v39); in Values()
919 T36 v36, T37 v37, T38 v38, T39 v39, T40 v40) { in Values() argument
925 v30, v31, v32, v33, v34, v35, v36, v37, v38, v39, v40); in Values()
944 T34 v34, T35 v35, T36 v36, T37 v37, T38 v38, T39 v39, T40 v40, T41 v41) { in Values() argument
950 v29, v30, v31, v32, v33, v34, v35, v36, v37, v38, v39, v40, v41); in Values()
969 T34 v34, T35 v35, T36 v36, T37 v37, T38 v38, T39 v39, T40 v40, T41 v41, in Values() argument
976 v28, v29, v30, v31, v32, v33, v34, v35, v36, v37, v38, v39, v40, v41, in Values()
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