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/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dllvm.amdgcn.image.load.a16.d16.ll24 ; GCN-LABEL: {{^}}load.v3f16.1d:
27 define amdgpu_ps <4 x half> @load.v3f16.1d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
66 ; GCN-LABEL: {{^}}load.v3f16.2d:
69 define amdgpu_ps <4 x half> @load.v3f16.2d(<8 x i32> inreg %rsrc, <2 x i16> %coords) {
112 ; GCN-LABEL: {{^}}load.v3f16.3d:
115 define amdgpu_ps <4 x half> @load.v3f16.3d(<8 x i32> inreg %rsrc, <2 x i16> %coords_lo, <2 x i16> %…
Dllvm.amdgcn.image.d16.dim.ll33 …%tex = call <3 x half> @llvm.amdgcn.image.load.2d.v3f16.i32(i32 7, i32 %s, i32 %t, <8 x i32> %rsrc…
83 …%tex = call <3 x half> @llvm.amdgcn.image.load.3d.v3f16.i32(i32 7, i32 %s, i32 %t, i32 %r, <8 x i3…
121 …call void @llvm.amdgcn.image.store.2d.v3f16.i32(<3 x half> %data, i32 7, i32 %s, i32 %t, <8 x i32>…
159 declare <3 x half> @llvm.amdgcn.image.load.2d.v3f16.i32(i32, i32, i32, <8 x i32>, i32, i32) #1
163 declare <3 x half> @llvm.amdgcn.image.load.3d.v3f16.i32(i32, i32, i32, i32, <8 x i32>, i32, i32) #1
167 declare void @llvm.amdgcn.image.store.2d.v3f16.i32(<3 x half>, i32, i32, i32, <8 x i32>, i32, i32) …
171 declare void @llvm.amdgcn.image.store.3d.v3f16.i32(<3 x half>, i32, i32, i32, i32, <8 x i32>, i32, …
Dllvm.amdgcn.buffer.load.format.d16.ll34 …%data = call <3 x half> @llvm.amdgcn.buffer.load.format.v3f16(<4 x i32> %rsrc, i32 0, i32 0, i1 0,…
54 declare <3 x half> @llvm.amdgcn.buffer.load.format.v3f16(<4 x i32>, i32, i32, i1, i1)
Dllvm.amdgcn.raw.buffer.load.format.d16.ll33 …%data = call <3 x half> @llvm.amdgcn.raw.buffer.load.format.v3f16(<4 x i32> %rsrc, i32 0, i32 0, i…
53 declare <3 x half> @llvm.amdgcn.raw.buffer.load.format.v3f16(<4 x i32>, i32, i32, i32)
Dllvm.amdgcn.tbuffer.load.d16.ll34 …%data = call <3 x half> @llvm.amdgcn.tbuffer.load.v3f16(<4 x i32> %rsrc, i32 0, i32 0, i32 0, i32 …
54 declare <3 x half> @llvm.amdgcn.tbuffer.load.v3f16(<4 x i32>, i32, i32, i32, i32, i32, i32, i1, i1)
Dllvm.amdgcn.buffer.store.format.d16.ll33 …call void @llvm.amdgcn.buffer.store.format.v3f16(<3 x half> %data, <4 x i32> %rsrc, i32 %index, i3…
63 declare void @llvm.amdgcn.buffer.store.format.v3f16(<3 x half>, <4 x i32>, i32, i32, i1, i1)
Dllvm.amdgcn.struct.buffer.load.format.d16.ll34 …%data = call <3 x half> @llvm.amdgcn.struct.buffer.load.format.v3f16(<4 x i32> %rsrc, i32 0, i32 0…
63 declare <3 x half> @llvm.amdgcn.struct.buffer.load.format.v3f16(<4 x i32>, i32, i32, i32, i32)
Dllvm.amdgcn.raw.tbuffer.load.d16.ll39 …%data = call <3 x half> @llvm.amdgcn.raw.tbuffer.load.v3f16(<4 x i32> %rsrc, i32 0, i32 0, i32 22,…
61 declare <3 x half> @llvm.amdgcn.raw.tbuffer.load.v3f16(<4 x i32>, i32, i32, i32, i32)
Dllvm.amdgcn.struct.tbuffer.load.d16.ll41 …%data = call <3 x half> @llvm.amdgcn.struct.tbuffer.load.v3f16(<4 x i32> %rsrc, i32 0, i32 0, i32 …
63 declare <3 x half> @llvm.amdgcn.struct.tbuffer.load.v3f16(<4 x i32>, i32, i32, i32, i32, i32)
Dllvm.amdgcn.raw.buffer.store.format.d16.ll52 …call void @llvm.amdgcn.raw.buffer.store.format.v3f16(<3 x half> %data_subvec, <4 x i32> %rsrc, i32…
82 declare void @llvm.amdgcn.raw.buffer.store.format.v3f16(<3 x half>, <4 x i32>, i32, i32, i32)
Dllvm.amdgcn.tbuffer.store.d16.ll49 …call void @llvm.amdgcn.tbuffer.store.v3f16(<3 x half> %data, <4 x i32> %rsrc, i32 %vindex, i32 0, …
77 declare void @llvm.amdgcn.tbuffer.store.v3f16(<3 x half>, <4 x i32>, i32, i32, i32, i32, i32, i32, …
Dllvm.amdgcn.struct.buffer.store.format.d16.ll52 …call void @llvm.amdgcn.struct.buffer.store.format.v3f16(<3 x half> %data_subvec, <4 x i32> %rsrc, …
92 declare void @llvm.amdgcn.struct.buffer.store.format.v3f16(<3 x half>, <4 x i32>, i32, i32, i32, i3…
Dllvm.amdgcn.raw.tbuffer.store.d16.ll56 …call void @llvm.amdgcn.raw.tbuffer.store.v3f16(<3 x half> %data_subvec, <4 x i32> %rsrc, i32 0, i3…
86 declare void @llvm.amdgcn.raw.tbuffer.store.v3f16(<3 x half>, <4 x i32>, i32, i32, i32, i32)
Dllvm.amdgcn.struct.tbuffer.store.d16.ll55 …call void @llvm.amdgcn.struct.tbuffer.store.v3f16(<3 x half> %data_subvec, <4 x i32> %rsrc, i32 %v…
84 declare void @llvm.amdgcn.struct.tbuffer.store.v3f16(<3 x half>, <4 x i32>, i32, i32, i32, i32, i32)
Dmad-mix-lo.ll161 %max = call <3 x half> @llvm.maxnum.v3f16(<3 x half> %cvt.result, <3 x half> zeroinitializer)
162 …%clamp = call <3 x half> @llvm.minnum.v3f16(<3 x half> %max, <3 x half> <half 1.0, half 1.0, half …
290 declare <3 x half> @llvm.minnum.v3f16(<3 x half>, <3 x half>) #1
295 declare <3 x half> @llvm.maxnum.v3f16(<3 x half>, <3 x half>) #1
Dstrict_fma.f16.ll57 …%val = call <3 x half> @llvm.experimental.constrained.fma.v3f16(<3 x half> %x, <3 x half> %y, <3 x…
166 declare <3 x half> @llvm.experimental.constrained.fma.v3f16(<3 x half>, <3 x half>, <3 x half>, met…
/external/llvm-project/llvm/test/Analysis/CostModel/AMDGPU/
Dfma.ll107 ; SLOWF16: estimated cost of 16 for {{.*}} call <3 x half> @llvm.fma.v3f16
108 ; FASTF16: estimated cost of 4 for {{.*}} call <3 x half> @llvm.fma.v3f16
109 ; SIZEF16: estimated cost of 4 for {{.*}} call <3 x half> @llvm.fma.v3f16
110 ; SIZENOF16: estimated cost of 8 for {{.*}} call <3 x half> @llvm.fma.v3f16
113 %fma = call <3 x half> @llvm.fma.v3f16(<3 x half> %vec, <3 x half> %vec, <3 x half> %vec) #1
129 declare <3 x half> @llvm.fma.v3f16(<3 x half>, <3 x half>, <3 x half>) #1
Dfabs.ll86 ; CHECK: estimated cost of 0 for {{.*}} call <3 x half> @llvm.fabs.v3f16
89 %fabs = call <3 x half> @llvm.fabs.v3f16(<3 x half> %vec) #1
105 declare <3 x half> @llvm.fabs.v3f16(<3 x half>) #1
/external/llvm/test/Analysis/CostModel/AMDGPU/
Dfabs.ll76 ; CHECK: estimated cost of 0 for {{.*}} call <3 x half> @llvm.fabs.v3f16
79 %fabs = call <3 x half> @llvm.fabs.v3f16(<3 x half> %vec) #1
94 declare <3 x half> @llvm.fabs.v3f16(<3 x half>) #1
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h120 v3f16 = 65, // 3 x f16 enumerator
509 case v3f16: in getVectorElementType()
634 case v3f16: in getVectorNumElements()
733 case v3f16: return TypeSize::Fixed(48); in getSizeInBits()
986 if (NumElements == 3) return MVT::v3f16; in getVectorVT()
/external/llvm-project/libclc/generic/include/math/
Dunary_intrin.inc22 _CLC_OVERLOAD half3 __CLC_FUNCTION(half3 d) __asm(__CLC_INTRINSIC ".v3f16");
Dbinary_intrin.inc22 _CLC_OVERLOAD half3 __CLC_FUNCTION(half3, half3) __asm(__CLC_INTRINSIC ".v3f16");
Dternary_intrin.inc22 _CLC_OVERLOAD half3 __CLC_FUNCTION(half3, half3, half3) __asm(__CLC_INTRINSIC ".v3f16");
/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h124 v3f16 = 69, // 3 x f16 enumerator
581 case v3f16: in getVectorElementType()
749 case v3f16: in getVectorNumElements()
861 case v3f16: in getSizeInBits()
1176 if (NumElements == 3) return MVT::v3f16; in getVectorVT()
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dllvm.amdgcn.image.store.2d.d16.ll103 …call void @llvm.amdgcn.image.store.2d.v3f16.i32(<3 x half> %in, i32 7, i32 %s, i32 %t, <8 x i32> %…
144 declare void @llvm.amdgcn.image.store.2d.v3f16.i32(<3 x half>, i32 immarg, i32, i32, <8 x i32>, i32…

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