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/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td274 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
275 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
276 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>;
282 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
283 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
284 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>;
290 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
291 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
293 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>;
297 : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
[all …]
DPPCInstrPrefix.td318 : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vDi, gprc:$rA, vrrc:$vB),
319 !strconcat(opc, " $vD, $rA, $vB"), IIC_VecGeneral, pattern>,
1923 defm VSTRIBR : VXForm_VTB5_RCr<13, 1, (outs vrrc:$vT), (ins vrrc:$vB),
1924 "vstribr", "$vT, $vB", IIC_VecGeneral,
1926 (int_ppc_altivec_vstribr v16i8:$vB))]>;
1927 defm VSTRIBL : VXForm_VTB5_RCr<13, 0, (outs vrrc:$vT), (ins vrrc:$vB),
1928 "vstribl", "$vT, $vB", IIC_VecGeneral,
1930 (int_ppc_altivec_vstribl v16i8:$vB))]>;
1931 defm VSTRIHR : VXForm_VTB5_RCr<13, 3, (outs vrrc:$vT), (ins vrrc:$vB),
1932 "vstrihr", "$vT, $vB", IIC_VecGeneral,
[all …]
DREADME_P9.txt23 (set i64:$rD, (int_ppc_altivec_vextublx i64:$rA, v16i8:$vB))
24 (set i64:$rD, (int_ppc_altivec_vextuhlx i64:$rA, v8i16:$vB))
25 (set i64:$rD, (int_ppc_altivec_vextuwlx i64:$rA, v4i32:$vB))
28 (set i64:$rD, (int_ppc_altivec_vextubrx i64:$rA, v16i8:$vB))
29 (set i64:$rD, (int_ppc_altivec_vextuhrx i64:$rA, v8i16:$vB))
30 (set i64:$rD, (int_ppc_altivec_vextuwrx i64:$rA, v4i32:$vB))
41 (set i64:$rD, (int_ppc_altivec_vclzlsbb v16i8:$vB))
42 (set i64:$rD, (int_ppc_altivec_vctzlsbb v16i8:$vB))
46 (set v16i8:$vD, (cttz v16i8:$vB)) // vctzb
47 (set v8i16:$vD, (cttz v8i16:$vB)) // vctzh
[all …]
DPPCInstrVSX.td194 : X_RD5_XO5_RS5<opcode, xo2, xo, (outs vrrc:$vT), (ins vrrc:$vB),
195 !strconcat(opc, " $vT, $vB"), IIC_VecFP, pattern>;
206 : X_RD5_XO5_RS5<opcode, xo2, xo, (outs vrrc:$vT), (ins vbtype:$vB),
207 !strconcat(opc, " $vT, $vB"), IIC_VecFP, pattern>;
212 : X_RD5_XO5_RS5<opcode, xo2, xo, (outs vfrc:$vT), (ins vrrc:$vB),
213 !strconcat(opc, " $vT, $vB"), IIC_VecFP, pattern>;
242 : XForm_1<opcode, xo, (outs vrrc:$vT), (ins vrrc:$vA, vrrc:$vB),
243 !strconcat(opc, " $vT, $vA, $vB"), IIC_VecFP, pattern>;
253 : XForm_1<opcode, xo, (outs vrrc:$vT), (ins vrrc:$vTi, vrrc:$vA, vrrc:$vB),
254 !strconcat(opc, " $vT, $vA, $vB"), IIC_VecFP, pattern>,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td274 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
275 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
276 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>;
282 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
283 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
284 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>;
290 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
291 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
293 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>;
297 : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
[all …]
DREADME_P9.txt23 (set i64:$rD, (int_ppc_altivec_vextublx i64:$rA, v16i8:$vB))
24 (set i64:$rD, (int_ppc_altivec_vextuhlx i64:$rA, v8i16:$vB))
25 (set i64:$rD, (int_ppc_altivec_vextuwlx i64:$rA, v4i32:$vB))
28 (set i64:$rD, (int_ppc_altivec_vextubrx i64:$rA, v16i8:$vB))
29 (set i64:$rD, (int_ppc_altivec_vextuhrx i64:$rA, v8i16:$vB))
30 (set i64:$rD, (int_ppc_altivec_vextuwrx i64:$rA, v4i32:$vB))
41 (set i64:$rD, (int_ppc_altivec_vclzlsbb v16i8:$vB))
42 (set i64:$rD, (int_ppc_altivec_vctzlsbb v16i8:$vB))
46 (set v16i8:$vD, (cttz v16i8:$vB)) // vctzb
47 (set v8i16:$vD, (cttz v8i16:$vB)) // vctzh
[all …]
DPPCInstrVSX.td1205 def : Pat<(v16i8 (vselect v16i8:$vA, v16i8:$vB, v16i8:$vC)),
1208 (COPY_TO_REGCLASS $vB, VSRC),
1210 def : Pat<(v8i16 (vselect v8i16:$vA, v8i16:$vB, v8i16:$vC)),
1213 (COPY_TO_REGCLASS $vB, VSRC),
1215 def : Pat<(vselect v4i32:$vA, v4i32:$vB, v4i32:$vC),
1216 (XXSEL $vC, $vB, $vA)>;
1217 def : Pat<(vselect v2i64:$vA, v2i64:$vB, v2i64:$vC),
1218 (XXSEL $vC, $vB, $vA)>;
1219 def : Pat<(vselect v4i32:$vA, v4f32:$vB, v4f32:$vC),
1220 (XXSEL $vC, $vB, $vA)>;
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCInstrAltivec.td269 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
270 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
271 [(set Ty:$vD, (IntID Ty:$vA, Ty:$vB, Ty:$vC))]>;
277 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
278 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
279 [(set OutTy:$vD, (IntID InTy:$vA, InTy:$vB, InTy:$vC))]>;
285 : VAForm_1a<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB, vrrc:$vC),
286 !strconcat(opc, " $vD, $vA, $vB, $vC"), IIC_VecFP,
288 (IntID In1Ty:$vA, In1Ty:$vB, In2Ty:$vC))]>;
292 : VXForm_1<xo, (outs vrrc:$vD), (ins vrrc:$vA, vrrc:$vB),
[all …]
DREADME_P9.txt23 (set i64:$rD, (int_ppc_altivec_vextublx i64:$rA, v16i8:$vB))
24 (set i64:$rD, (int_ppc_altivec_vextuhlx i64:$rA, v8i16:$vB))
25 (set i64:$rD, (int_ppc_altivec_vextuwlx i64:$rA, v4i32:$vB))
28 (set i64:$rD, (int_ppc_altivec_vextubrx i64:$rA, v16i8:$vB))
29 (set i64:$rD, (int_ppc_altivec_vextuhrx i64:$rA, v8i16:$vB))
30 (set i64:$rD, (int_ppc_altivec_vextuwrx i64:$rA, v4i32:$vB))
41 (set i64:$rD, (int_ppc_altivec_vclzlsbb v16i8:$vB))
42 (set i64:$rD, (int_ppc_altivec_vctzlsbb v16i8:$vB))
46 (set v16i8:$vD, (cttz v16i8:$vB)) // vctzb
47 (set v8i16:$vD, (cttz v8i16:$vB)) // vctzh
[all …]
DPPCInstrVSX.td1836 : X_RD5_XO5_RS5<opcode, xo2, xo, (outs vrrc:$vT), (ins vrrc:$vB),
1837 !strconcat(opc, " $vT, $vB"), IIC_VecFP, pattern>;
1848 : X_RD5_XO5_RS5<opcode, xo2, xo, (outs vrrc:$vT), (ins vbtype:$vB),
1849 !strconcat(opc, " $vT, $vB"), IIC_VecFP, pattern>;
1873 : XForm_1<opcode, xo, (outs vrrc:$vT), (ins vrrc:$vA, vrrc:$vB),
1874 !strconcat(opc, " $vT, $vA, $vB"), IIC_VecFP, pattern>;
2006 (outs vrrc:$vT), (ins u1imm:$r, vrrc:$vB, u2imm:$rmc),
2007 !strconcat(opc, " $r, $vT, $vB, $rmc"), IIC_VecFP, pattern> {
2025 // vB NOTE: only vB.dword[0] is used, that's why we don't use
2027 def XSIEXPQP : XForm_18<63, 868, (outs vrrc:$vT), (ins vrrc:$vA, vsfrc:$vB),
[all …]
/external/mesa3d/src/gallium/drivers/swr/rasterizer/core/
Dfrontend.h53 void triangleSetupAB(const __m128 vX, const __m128 vY, __m128& vA, __m128& vB) in triangleSetupAB() argument
68 vB = _mm_sub_ps(vXsub, vX); in triangleSetupAB()
77 void triangleSetupABInt(const __m128i vX, const __m128i vY, __m128i& vA, __m128i& vB) in triangleSetupABInt() argument
87 vB = _mm_sub_epi32(vXsub, vX); in triangleSetupABInt()
94 simdscalari (&vB)[3]) in triangleSetupABIntVertical()
102 vB[0] = _simd_sub_epi32(vX[1], vX[0]); in triangleSetupABIntVertical()
103 vB[1] = _simd_sub_epi32(vX[2], vX[1]); in triangleSetupABIntVertical()
104 vB[2] = _simd_sub_epi32(vX[0], vX[2]); in triangleSetupABIntVertical()
112 simd16scalari (&vB)[3]) in triangleSetupABIntVertical()
120 vB[0] = _simd16_sub_epi32(vX[1], vX[0]); in triangleSetupABIntVertical()
[all …]
Drasterizer_impl.h277 INLINE void adjustTopLeftRuleIntFix16(const __m128i vA, const __m128i vB, __m256d& vEdge) in adjustTopLeftRuleIntFix16() argument
291 msk2 &= _mm_movemask_ps(_mm_castsi128_ps(vB)); in adjustTopLeftRuleIntFix16()
961 __m128 vA, vB;
962 triangleSetupAB(vX, vY, vA, vB);
976 vB = _mm_mul_ps(vB, _mm_set1_ps(-1));
984 triangleSetupC(vX, vY, vA, vB, vC);
1006 _MM_EXTRACT_FLOAT(triDesc.I[1], vB, 1);
1009 _MM_EXTRACT_FLOAT(triDesc.J[1], vB, 2);
/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Dsimdintrin.h197 simdscalar const& vB, in vplaneps() argument
203 vOut = _simd_fmadd_ps(vB, vY, vOut); in vplaneps()
210 simd4scalar const& vB, in vplaneps() argument
216 vOut = _simd128_fmadd_ps(vB, vY, vOut); in vplaneps()
242 simdscalar vB = _simd_broadcast_ss(pInterpB); in InterpolateComponent() local
248 return vplaneps(vA, vB, vC, vI, vJ); in InterpolateComponent()
299 simd4scalar vB = SIMD128::broadcast_ss(pInterpB); in InterpolateComponent() local
305 return vplaneps(vA, vB, vC, vI, vJ); in InterpolateComponent()
Dsimdlib_128_avx2.inl41 static SIMDINLINE Integer SIMDCALL sllv_epi32(Integer vA, Integer vB) // return a << b (uint32) argument
43 return _mm_sllv_epi32(vA, vB);
46 static SIMDINLINE Integer SIMDCALL srlv_epi32(Integer vA, Integer vB) // return a >> b (uint32) argument
48 return _mm_srlv_epi32(vA, vB);
Dsimdlib_128_avx.inl163 static SIMDINLINE Integer SIMDCALL sllv_epi32(Integer vA, Integer vB) // return a << b (uint32) argument
167 count = _mm_extract_epi32(vB, 0);
172 count = _mm_extract_epi32(vB, 1);
177 count = _mm_extract_epi32(vB, 2);
182 count = _mm_extract_epi32(vB, 3);
204 static SIMDINLINE Integer SIMDCALL srlv_epi32(Integer vA, Integer vB) // return a >> b (uint32) argument
208 count = _mm_extract_epi32(vB, 0);
213 count = _mm_extract_epi32(vB, 1);
218 count = _mm_extract_epi32(vB, 2);
223 count = _mm_extract_epi32(vB, 3);
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenDAGISel.inc3113 /* 6620*/ OPC_RecordChild2, // #1 = $vB
3118 // Src: (intrinsic_void 5625:{ *:[iPTR] }, v4i32:{ *:[v4i32] }:$vB) - Complexity = 8
3119 // Dst: (MTVSCR v4i32:{ *:[v4i32] }:$vB)
16169 /* 43066*/ OPC_RecordChild1, // #0 = $vB
16173 …// Src: (intrinsic_wo_chain:{ *:[i32] } 5653:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$vB) - Complexity =…
16174 // Dst: (VCLZLSBB:{ *:[i32] } v16i8:{ *:[v16i8] }:$vB)
16177 /* 43080*/ OPC_RecordChild1, // #0 = $vB
16181 …// Src: (intrinsic_wo_chain:{ *:[i32] } 5700:{ *:[iPTR] }, v16i8:{ *:[v16i8] }:$vB) - Complexity =…
16182 // Dst: (VCTZLSBB:{ *:[i32] } v16i8:{ *:[v16i8] }:$vB)
16213 /* 43143*/ OPC_RecordChild2, // #1 = $vB
[all …]
/external/llvm-project/mlir/include/mlir/Dialect/Linalg/EDSC/
DBuilders.h135 linalg_generic_matmul(Value vA, Value vB, Value vC,
147 linalg_generic_matmul(Value vA, Value vB, Value vC, RankedTensorType tD,
/external/llvm-project/mlir/lib/Dialect/Linalg/EDSC/
DBuilders.cpp175 mlir::edsc::ops::linalg_generic_matmul(Value vA, Value vB, Value vC, in linalg_generic_matmul() argument
180 StructuredIndexed A(vA), B(vB), C(vC); in linalg_generic_matmul()
192 mlir::edsc::ops::linalg_generic_matmul(Value vA, Value vB, Value vC, in linalg_generic_matmul() argument
198 StructuredIndexed A(vA), B(vB), C(vC), D(tD); in linalg_generic_matmul()
/external/python/cryptography/vectors/cryptography_vectors/x509/custom/
Dcrl_idp_relative_user_all_reasons.pem6 2aEC+ErDrrrrigkNb5TqotR/vB+W5bpyDJWeWPMoA36qNE843a6YSfledU0mQaxy
/external/libyuv/files/source/
Drow_neon64.cc79 #define YUVTORGB(vR, vG, vB) \ argument
97 "sqadd " #vB \
103 "sqadd " #vB ".8h, " #vB \
109 "sqshrun " #vB ".8b, " #vB \
/external/libvpx/libvpx/third_party/libyuv/source/
Drow_neon64.cc79 #define YUVTORGB(vR, vG, vB) \ argument
97 "sqadd " #vB \
103 "sqadd " #vB ".8h, " #vB \
109 "sqshrun " #vB ".8b, " #vB \
/external/libaom/libaom/third_party/libyuv/source/
Drow_neon64.cc104 #define YUV422TORGB(vR, vG, vB) \ argument
122 "sqadd " #vB ".8h, v24.8h, v0.8h \n" /* B */ \
125 "sqadd " #vB ".8h, " #vB ".8h, v3.8h \n" /* B */ \
128 "sqshrun " #vB ".8b, " #vB ".8h, #6 \n" /* B */ \
/external/llvm-project/mlir/test/Dialect/Linalg/
Dpromote.mlir45 // CHECK: %[[vB:.*]] = subview {{.*}} : memref<?x?xf32>
67 // CHECK: linalg.copy(%[[vB]], %[[partialB]]) : memref<?x?xf32, #[[$strided2D]]>, mem…
/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/
Dbuilder_misc.h116 Value* VPLANEPS(Value* vA, Value* vB, Value* vC, Value*& vX, Value*& vY);
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_ra.cpp1414 LValue *vB = intf->getValue(); in checkInterference() local
1418 if (vA->compound | vB->compound) { in checkInterference()
1421 for (const ValueDef *d : mergedDefs(vB)) { in checkInterference()
1433 assert(vB->compound); in checkInterference()
1434 mask &= vd->compMask & vB->compMask; in checkInterference()
1445 vB->compMask, intf->reg & ~7, mask); in checkInterference()
1453 vA->id, vB->id, intf->reg, intf->colors); in checkInterference()

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