Searched refs:v_mov (Results 1 – 14 of 14) sorted by relevance
/external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
D | frame-index-elimination.ll | 18 ; MUBUF-NOT: v_mov 32 ; CI-NOT: v_mov 69 ; GCN-NOT: v_mov 89 ; GCN-NOT: v_mov 129 ; GCN-NOT: v_mov
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D | indirect-addressing-si-gfx9.ll | 43 ; Avoid inserting extra v_mov from copies within the vgpr indexing sequence. The
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D | ds_read2_superreg.ll | 153 ; CI-NOT: v_mov {{v[0-9]+}}, {{[sv][0-9]+}} 176 ; CI-NOT: v_mov {{v[0-9]+}}, {{[sv][0-9]+}}
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D | valu-i1.ll | 23 ; v_mov should be after exec modification
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D | wqm.ll | 119 ; WQM was inserting an unecessary v_mov to self after the v_add. Make sure this
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/external/mesa3d/src/panfrost/midgard/ |
D | midgard_ra.c | 281 midgard_instruction m = v_mov(idx, i); in mir_lower_special_reads() 296 midgard_instruction m = v_mov(i, idx); in mir_lower_special_reads() 861 st = v_mov(spill_node, spill_slot); in mir_spill_register() 918 st = v_mov(spill_node, index); in mir_spill_register()
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D | midgard_schedule.c | 881 midgard_instruction mov = v_mov(cond, cond); in mir_schedule_comparison() 1056 *mov = v_mov(src, make_compiler_temp(ctx)); in mir_schedule_zs_write() 1125 *sadd = v_mov(~0, make_compiler_temp(ctx)); in mir_schedule_alu() 1152 *vadd = v_mov(~0, make_compiler_temp(ctx)); in mir_schedule_alu() 1268 *vmul = v_mov(src, temp); in mir_schedule_alu()
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D | mir_promote_uniforms.c | 196 midgard_instruction mov = v_mov(promoted, ins->dest); in midgard_promote_uniforms()
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D | midgard_compile.c | 400 midgard_instruction ins = v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), to); in emit_explicit_constant() 1553 emit_mir_instruction(ctx, v_mov(*input, reg)); in emit_intrinsic() 1632 midgard_instruction ins = v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), reg); in emit_intrinsic() 1664 midgard_instruction ins = v_mov(reg, out); in emit_intrinsic() 1994 midgard_instruction mov = v_mov(index, coords); in emit_texop_native() 2016 v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), coords); in emit_texop_native() 2084 midgard_instruction mov = v_mov(index, coords); in emit_texop_native() 2221 … midgard_instruction ins = v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), scratch); in inline_alu_constants()
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D | compiler.h | 536 v_mov(unsigned src, unsigned dest) in v_mov() function
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/external/mesa3d/src/amd/compiler/ |
D | aco_insert_NOPs.cpp | 644 …aco_ptr<VOP1_instruction> v_mov{create_instruction<VOP1_instruction>(aco_opcode::v_mov_b32, Format… in handle_instruction_gfx10() local 645 v_mov->definitions[0] = Definition(instr->operands[0].physReg(), v1); in handle_instruction_gfx10() 646 v_mov->operands[0] = Operand(instr->operands[0].physReg(), v1); in handle_instruction_gfx10() 647 new_instructions.emplace_back(std::move(v_mov)); in handle_instruction_gfx10()
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/external/llvm/test/CodeGen/AMDGPU/ |
D | ds_read2_superreg.ll | 153 ; CI-NOT: v_mov 176 ; CI-NOT: v_mov
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/external/mesa3d/docs/relnotes/ |
D | 20.1.0.rst | 780 - pan/mdg: Track v_mov type (force uint32 for now?)
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D | 20.3.0.rst | 1180 - aco/isel: refactor code and remove unnecessary v_mov
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