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Searched refs:v_mov (Results 1 – 14 of 14) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dframe-index-elimination.ll18 ; MUBUF-NOT: v_mov
32 ; CI-NOT: v_mov
69 ; GCN-NOT: v_mov
89 ; GCN-NOT: v_mov
129 ; GCN-NOT: v_mov
Dindirect-addressing-si-gfx9.ll43 ; Avoid inserting extra v_mov from copies within the vgpr indexing sequence. The
Dds_read2_superreg.ll153 ; CI-NOT: v_mov {{v[0-9]+}}, {{[sv][0-9]+}}
176 ; CI-NOT: v_mov {{v[0-9]+}}, {{[sv][0-9]+}}
Dvalu-i1.ll23 ; v_mov should be after exec modification
Dwqm.ll119 ; WQM was inserting an unecessary v_mov to self after the v_add. Make sure this
/external/mesa3d/src/panfrost/midgard/
Dmidgard_ra.c281 midgard_instruction m = v_mov(idx, i); in mir_lower_special_reads()
296 midgard_instruction m = v_mov(i, idx); in mir_lower_special_reads()
861 st = v_mov(spill_node, spill_slot); in mir_spill_register()
918 st = v_mov(spill_node, index); in mir_spill_register()
Dmidgard_schedule.c881 midgard_instruction mov = v_mov(cond, cond); in mir_schedule_comparison()
1056 *mov = v_mov(src, make_compiler_temp(ctx)); in mir_schedule_zs_write()
1125 *sadd = v_mov(~0, make_compiler_temp(ctx)); in mir_schedule_alu()
1152 *vadd = v_mov(~0, make_compiler_temp(ctx)); in mir_schedule_alu()
1268 *vmul = v_mov(src, temp); in mir_schedule_alu()
Dmir_promote_uniforms.c196 midgard_instruction mov = v_mov(promoted, ins->dest); in midgard_promote_uniforms()
Dmidgard_compile.c400 midgard_instruction ins = v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), to); in emit_explicit_constant()
1553 emit_mir_instruction(ctx, v_mov(*input, reg)); in emit_intrinsic()
1632 midgard_instruction ins = v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), reg); in emit_intrinsic()
1664 midgard_instruction ins = v_mov(reg, out); in emit_intrinsic()
1994 midgard_instruction mov = v_mov(index, coords); in emit_texop_native()
2016 v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), coords); in emit_texop_native()
2084 midgard_instruction mov = v_mov(index, coords); in emit_texop_native()
2221 … midgard_instruction ins = v_mov(SSA_FIXED_REGISTER(REGISTER_CONSTANT), scratch); in inline_alu_constants()
Dcompiler.h536 v_mov(unsigned src, unsigned dest) in v_mov() function
/external/mesa3d/src/amd/compiler/
Daco_insert_NOPs.cpp644 …aco_ptr<VOP1_instruction> v_mov{create_instruction<VOP1_instruction>(aco_opcode::v_mov_b32, Format… in handle_instruction_gfx10() local
645 v_mov->definitions[0] = Definition(instr->operands[0].physReg(), v1); in handle_instruction_gfx10()
646 v_mov->operands[0] = Operand(instr->operands[0].physReg(), v1); in handle_instruction_gfx10()
647 new_instructions.emplace_back(std::move(v_mov)); in handle_instruction_gfx10()
/external/llvm/test/CodeGen/AMDGPU/
Dds_read2_superreg.ll153 ; CI-NOT: v_mov
176 ; CI-NOT: v_mov
/external/mesa3d/docs/relnotes/
D20.1.0.rst780 - pan/mdg: Track v_mov type (force uint32 for now?)
D20.3.0.rst1180 - aco/isel: refactor code and remove unnecessary v_mov