| /external/boringssl/src/crypto/hrss/ |
| D | hrss.c | 71 typedef __m128i vec_t; typedef
77 static inline vec_t vec_add(vec_t a, vec_t b) { return _mm_add_epi16(a, b); } in vec_add()
80 static inline vec_t vec_sub(vec_t a, vec_t b) { return _mm_sub_epi16(a, b); } in vec_sub()
84 static inline vec_t vec_mul(vec_t a, uint16_t b) { in vec_mul()
90 static inline vec_t vec_fma(vec_t a, vec_t b, uint16_t c) { in vec_fma()
95 static inline void vec3_rshift_word(vec_t v[3]) { in vec3_rshift_word()
112 static inline void vec4_rshift_word(vec_t v[4]) { in vec4_rshift_word()
134 static inline vec_t vec_merge_3_5(vec_t left, vec_t right) { in vec_merge_3_5()
140 static inline void poly3_vec_lshift1(vec_t a_s[6], vec_t a_a[6]) { in poly3_vec_lshift1()
141 vec_t carry_s = {0}; in poly3_vec_lshift1()
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| /external/rust/crates/quiche/deps/boringssl/src/crypto/hrss/ |
| D | hrss.c | 71 typedef __m128i vec_t; typedef
77 static inline vec_t vec_add(vec_t a, vec_t b) { return _mm_add_epi16(a, b); } in vec_add()
80 static inline vec_t vec_sub(vec_t a, vec_t b) { return _mm_sub_epi16(a, b); } in vec_sub()
84 static inline vec_t vec_mul(vec_t a, uint16_t b) { in vec_mul()
90 static inline vec_t vec_fma(vec_t a, vec_t b, uint16_t c) { in vec_fma()
95 static inline void vec3_rshift_word(vec_t v[3]) { in vec3_rshift_word()
112 static inline void vec4_rshift_word(vec_t v[4]) { in vec4_rshift_word()
134 static inline vec_t vec_merge_3_5(vec_t left, vec_t right) { in vec_merge_3_5()
140 static inline void poly3_vec_lshift1(vec_t a_s[6], vec_t a_a[6]) { in poly3_vec_lshift1()
141 vec_t carry_s = {0}; in poly3_vec_lshift1()
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| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrSIMD.td | 59 foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
60 defm : LoadPatNoOffset<vec_t, load, "LOAD_V128">;
61 defm : LoadPatImmOff<vec_t, load, regPlusImm, "LOAD_V128">;
62 defm : LoadPatImmOff<vec_t, load, or_is_add, "LOAD_V128">;
63 defm : LoadPatOffsetOnly<vec_t, load, "LOAD_V128">;
64 defm : LoadPatGlobalAddrOffOnly<vec_t, load, "LOAD_V128">;
119 multiclass SIMDLoadExtend<ValueType vec_t, string name, bits<32> simdop> {
121 defm LOAD_EXTEND_S_#vec_t#_A32 :
127 defm LOAD_EXTEND_U_#vec_t#_A32 :
133 defm LOAD_EXTEND_S_#vec_t#_A64 :
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrSIMD.td | 51 foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
52 def : LoadPatNoOffset<vec_t, load, LOAD_V128>;
53 def : LoadPatImmOff<vec_t, load, regPlusImm, LOAD_V128>;
54 def : LoadPatImmOff<vec_t, load, or_is_add, LOAD_V128>;
55 def : LoadPatOffsetOnly<vec_t, load, LOAD_V128>;
56 def : LoadPatGlobalAddrOffOnly<vec_t, load, LOAD_V128>;
103 multiclass SIMDLoadExtend<ValueType vec_t, string name, bits<32> simdop> {
106 defm LOAD_EXTEND_S_#vec_t :
111 defm LOAD_EXTEND_U_#vec_t :
149 foreach vec_t = [v16i8, v8i16, v4i32, v2i64, v4f32, v2f64] in {
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| /external/llvm-project/lldb/test/Shell/Register/Inputs/ |
| D | arm-gp-read.cpp | 3 struct alignas(16) vec_t { struct
19 constexpr vec_t vecs[] = { in main() argument
25 const vec_t *vec_ptr = vecs; in main()
|
| D | aarch64-gp-read.cpp | 3 struct alignas(16) vec_t { struct
19 constexpr vec_t vecs[] = { in main() argument
|
| /external/clang/test/CodeGenCXX/ |
| D | 2012-02-06-VecInitialization.cpp | 4 typedef char vec_t __attribute__ ((__ext_vector_type__ (8))); typedef
7 vec_t v(0); in h()
|
| /external/llvm-project/clang/test/CodeGenCXX/ |
| D | 2012-02-06-VecInitialization.cpp | 4 typedef char vec_t __attribute__ ((__ext_vector_type__ (8))); typedef
7 vec_t v(0); in h()
|