/external/llvm-project/llvm/test/MC/ARM/ |
D | mve-qdest-rsrc.s | 319 # CHECK: vmlas.s8 q0, q0, r6 @ encoding: [0x01,0xee,0x46,0x1e] 320 # CHECK-NOFP: vmlas.s8 q0, q0, r6 @ encoding: [0x01,0xee,0x46,0x1e] 321 vmlas.s8 q0, q0, r6 323 # CHECK: vmlas.s16 q0, q2, r9 @ encoding: [0x15,0xee,0x49,0x1e] 324 # CHECK-NOFP: vmlas.s16 q0, q2, r9 @ encoding: [0x15,0xee,0x49,0x1e] 325 vmlas.s16 q0, q2, r9 327 # CHECK: vmlas.s32 q0, q7, r6 @ encoding: [0x2f,0xee,0x46,0x1e] 328 # CHECK-NOFP: vmlas.s32 q0, q7, r6 @ encoding: [0x2f,0xee,0x46,0x1e] 329 vmlas.s32 q0, q7, r6 331 # CHECK: vmlas.u8 q0, q5, lr @ encoding: [0x0b,0xfe,0x4e,0x1e] [all …]
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/external/llvm-project/llvm/test/CodeGen/Thumb2/ |
D | mve-vmla.ll | 200 ; CHECK-NEXT: vmlas.u32 q0, q1, r0 213 ; CHECK-NEXT: vmlas.u32 q0, q1, r0 226 ; CHECK-NEXT: vmlas.u16 q0, q1, r0 239 ; CHECK-NEXT: vmlas.u16 q0, q1, r0 252 ; CHECK-NEXT: vmlas.u8 q0, q1, r0 265 ; CHECK-NEXT: vmlas.u8 q0, q1, r0 283 ; CHECK-NEXT: vmlas.u32 q1, q0, r1 321 ; CHECK-NEXT: vmlas.u16 q1, q0, r1 359 ; CHECK-NEXT: vmlas.u8 q1, q0, r1
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D | mve-gather-scatter-optimisation.ll | 343 ; CHECK-NEXT: vmlas.u32 q2, q1, r0 396 ; CHECK-NEXT: vmlas.u32 q2, q1, r0 482 ; CHECK-NEXT: vmlas.u32 q6, q2, r5 689 ; CHECK-NEXT: vmlas.u32 q1, q5, r1
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/external/llvm-project/llvm/test/CodeGen/Thumb2/mve-intrinsics/ |
D | ternary.ll | 185 ; CHECK-NEXT: vmlas.u8 q1, q0, r0 199 ; CHECK-NEXT: vmlas.u16 q1, q0, r0 213 ; CHECK-NEXT: vmlas.u32 q1, q0, r0 227 ; CHECK-NEXT: vmlas.u8 q1, q0, r0 241 ; CHECK-NEXT: vmlas.u16 q1, q0, r0 255 ; CHECK-NEXT: vmlas.u32 q1, q0, r0 625 …%3 = tail call <16 x i8> @llvm.arm.mve.vmlas.n.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, … 640 …%3 = tail call <8 x i16> @llvm.arm.mve.vmlas.n.predicated.v8i16.v8i1(<8 x i16> %a, <8 x i16> %b, i… 654 …%2 = tail call <4 x i32> @llvm.arm.mve.vmlas.n.predicated.v4i32.v4i1(<4 x i32> %a, <4 x i32> %b, i… 669 …%3 = tail call <16 x i8> @llvm.arm.mve.vmlas.n.predicated.v16i8.v16i1(<16 x i8> %a, <16 x i8> %b, … [all …]
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/external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
D | mve-qdest-rsrc.txt | 318 # CHECK: vmlas.s8 q0, q0, r6 @ encoding: [0x01,0xee,0x46,0x1e] 322 # CHECK: vmlas.s16 q0, q2, r9 @ encoding: [0x15,0xee,0x49,0x1e] 326 # CHECK: vmlas.s32 q0, q7, r6 @ encoding: [0x2f,0xee,0x46,0x1e] 330 # CHECK: vmlas.u8 q0, q5, lr @ encoding: [0x0b,0xfe,0x4e,0x1e] 334 # CHECK: vmlas.u16 q0, q3, r12 @ encoding: [0x17,0xfe,0x4c,0x1e] 338 # CHECK: vmlas.u32 q1, q1, r11 @ encoding: [0x23,0xfe,0x4b,0x3e]
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/external/llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/ |
D | mve-tail-data-types.ll | 423 ; CHECK-NEXT: vmlas.u32 q1, q0, r2 634 ; CHECK-NEXT: vmlas.u32 q1, q0, r2 725 ; CHECK-NEXT: vmlas.u32 q1, q0, r2 936 ; CHECK-NEXT: vmlas.u32 q1, q0, r2 1027 ; CHECK-NEXT: vmlas.u32 q1, q0, r2
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.h | 522 void vmlas(const Operand *OpSd, const Operand *OpSn, const Operand *OpSm,
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D | IceInstARM32.cpp | 851 Asm->vmlas(getDest(), getSrc(1), getSrc(2), CondARM32::AL); in emitIAS()
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D | IceAssemblerARM32.cpp | 3250 void AssemblerARM32::vmlas(const Operand *OpSd, const Operand *OpSn, in vmlas() function in Ice::ARM32::AssemblerARM32
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/external/swiftshader/third_party/subzero/src/DartARM32/ |
D | assembler_arm.h | 688 void vmlas(SRegister sd, SRegister sn, SRegister sm, Condition cond = AL);
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D | assembler_arm.cc | 962 void Assembler::vmlas(SRegister sd, SRegister sn, SRegister sm,
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMInstrMVE.td | 4680 def MVE_VMLAS_qr_s8 : MVE_VFMAMLA_qr<"vmlas", "s8", 0b0, 0b00, 0b1>; 4681 def MVE_VMLAS_qr_s16 : MVE_VFMAMLA_qr<"vmlas", "s16", 0b0, 0b01, 0b1>; 4682 def MVE_VMLAS_qr_s32 : MVE_VFMAMLA_qr<"vmlas", "s32", 0b0, 0b10, 0b1>; 4683 def MVE_VMLAS_qr_u8 : MVE_VFMAMLA_qr<"vmlas", "u8", 0b1, 0b00, 0b1>; 4684 def MVE_VMLAS_qr_u16 : MVE_VFMAMLA_qr<"vmlas", "u16", 0b1, 0b01, 0b1>; 4685 def MVE_VMLAS_qr_u32 : MVE_VFMAMLA_qr<"vmlas", "u32", 0b1, 0b10, 0b1>;
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMInstrMVE.td | 5576 defm MVE_VMLAS_qr_s8 : MVE_VMLA_qr_multi<"vmlas", MVE_v16s8, 0b1>; 5577 defm MVE_VMLAS_qr_s16 : MVE_VMLA_qr_multi<"vmlas", MVE_v8s16, 0b1>; 5578 defm MVE_VMLAS_qr_s32 : MVE_VMLA_qr_multi<"vmlas", MVE_v4s32, 0b1>; 5579 defm MVE_VMLAS_qr_u8 : MVE_VMLA_qr_multi<"vmlas", MVE_v16u8, 0b1>; 5580 defm MVE_VMLAS_qr_u16 : MVE_VMLA_qr_multi<"vmlas", MVE_v8u16, 0b1>; 5581 defm MVE_VMLAS_qr_u32 : MVE_VMLA_qr_multi<"vmlas", MVE_v4u32, 0b1>;
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 9933 "davx\006vmlalv\007vmlalva\005vmlas\005vmlav\006vmlava\004vmls\007vmlsda" 13175 …{ 2673 /* vmlas */, ARM::MVE_VMLAS_qr_s16, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0,… 13176 …{ 2673 /* vmlas */, ARM::MVE_VMLAS_qr_s32, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0,… 13177 …{ 2673 /* vmlas */, ARM::MVE_VMLAS_qr_s8, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0, … 13178 …{ 2673 /* vmlas */, ARM::MVE_VMLAS_qr_u16, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0,… 13179 …{ 2673 /* vmlas */, ARM::MVE_VMLAS_qr_u32, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0,… 13180 …{ 2673 /* vmlas */, ARM::MVE_VMLAS_qr_u8, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VPTPredN2_0, …
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