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Searched refs:AddRegFrm (Results 1 – 24 of 24) sorted by relevance

/external/llvm-project/llvm/test/TableGen/
DTargetInstrInfo.td49 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
93 "mov $dst, $src", 0xB0, AddRegFrm,
/external/llvm/test/TableGen/
DTargetInstrInfo.td49 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
93 "mov $dst, $src", 0xB0, AddRegFrm,
/external/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h235 AddRegFrm = 2, enumerator
668 case X86II::AddRegFrm: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp987 case X86II::AddRegFrm: in DetermineREXPrefix()
1271 case X86II::AddRegFrm: in encodeInstruction()
/external/llvm-project/llvm/utils/TableGen/
DX86RecognizableInstr.h97 AddRegFrm = 2, enumerator
DX86RecognizableInstr.cpp487 case X86Local::AddRegFrm: in emitInstructionSpecifier()
763 case X86Local::AddRegFrm: in emitDecodePath()
832 if (Form == X86Local::AddRegFrm || Form == X86Local::MRMSrcRegCC || in emitDecodePath()
835 unsigned Count = Form == X86Local::AddRegFrm ? 8 : 16; in emitDecodePath()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h550 AddRegFrm = 2, enumerator
1023 case X86II::AddRegFrm: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp1199 case X86II::AddRegFrm: in determineREXPrefix()
1469 case X86II::AddRegFrm: in encodeInstruction()
/external/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
DX86BaseInfo.h588 AddRegFrm = 2, enumerator
1092 case X86II::AddRegFrm: in getMemoryOperandNo()
DX86MCCodeEmitter.cpp1236 case X86II::AddRegFrm: in emitREXPrefix()
1486 case X86II::AddRegFrm: in encodeInstruction()
/external/llvm/utils/TableGen/
DX86RecognizableInstr.cpp96 AddRegFrm = 2, enumerator
596 case X86Local::AddRegFrm: in emitInstructionSpecifier()
884 if (Form == X86Local::AddRegFrm) { in emitDecodePath()
/external/llvm/lib/Target/X86/
DX86InstrInfo.td1094 def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", [],
1096 def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", [],
1109 def PUSH16r : I<0x50, AddRegFrm, (outs), (ins GR16:$reg), "push{w}\t$reg",[],
1111 def PUSH32r : I<0x50, AddRegFrm, (outs), (ins GR32:$reg), "push{l}\t$reg",[],
1184 def POP64r : I<0x58, AddRegFrm, (outs GR64:$reg), (ins), "pop{q}\t$reg", [],
1192 def PUSH64r : I<0x50, AddRegFrm, (outs), (ins GR64:$reg), "push{q}\t$reg", [],
1237 def BSWAP32r : I<0xC8, AddRegFrm,
1242 def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src),
1370 def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src),
1373 def MOV16ri : Ii16<0xB8, AddRegFrm, (outs GR16:$dst), (ins i16imm:$src),
[all …]
DX86InstrArithmetic.td475 def INC16r_alt : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
478 def INC32r_alt : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
521 def DEC16r_alt : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
524 def DEC32r_alt : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
DX86RegisterInfo.td398 // GR32_NOAX - GR32 registers except EAX. Used by AddRegFrm of XCHG32 in 64-bit
DX86InstrFormats.td22 def AddRegFrm : Format<2>; def MRMDestReg : Format<3>;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.td1251 def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
1253 def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>,
1271 def PUSH16r : I<0x50, AddRegFrm, (outs), (ins GR16:$reg), "push{w}\t$reg",[]>,
1273 def PUSH32r : I<0x50, AddRegFrm, (outs), (ins GR32:$reg), "push{l}\t$reg",[]>,
1347 def POP64r : I<0x58, AddRegFrm, (outs GR64:$reg), (ins), "pop{q}\t$reg", []>,
1359 def PUSH64r : I<0x50, AddRegFrm, (outs), (ins GR64:$reg), "push{q}\t$reg", []>,
1409 def BSWAP16r_BAD : I<0xC8, AddRegFrm, (outs GR16:$dst), (ins GR16:$src),
1412 def BSWAP32r : I<0xC8, AddRegFrm, (outs GR32:$dst), (ins GR32:$src),
1417 def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src),
1545 def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src),
[all …]
DX86InstrArithmetic.td459 def INC16r_alt : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
462 def INC32r_alt : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
506 def DEC16r_alt : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
509 def DEC32r_alt : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
DX86InstrFormats.td22 def AddRegFrm : Format<2>;
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrInfo.td1306 def POP16r : I<0x58, AddRegFrm, (outs GR16:$reg), (ins), "pop{w}\t$reg", []>,
1308 def POP32r : I<0x58, AddRegFrm, (outs GR32:$reg), (ins), "pop{l}\t$reg", []>,
1326 def PUSH16r : I<0x50, AddRegFrm, (outs), (ins GR16:$reg), "push{w}\t$reg",[]>,
1328 def PUSH32r : I<0x50, AddRegFrm, (outs), (ins GR32:$reg), "push{l}\t$reg",[]>,
1402 def POP64r : I<0x58, AddRegFrm, (outs GR64:$reg), (ins), "pop{q}\t$reg", []>,
1414 def PUSH64r : I<0x50, AddRegFrm, (outs), (ins GR64:$reg), "push{q}\t$reg", []>,
1464 def BSWAP16r_BAD : I<0xC8, AddRegFrm, (outs GR16:$dst), (ins GR16:$src),
1467 def BSWAP32r : I<0xC8, AddRegFrm, (outs GR32:$dst), (ins GR32:$src),
1472 def BSWAP64r : RI<0xC8, AddRegFrm, (outs GR64:$dst), (ins GR64:$src),
1600 def MOV8ri : Ii8 <0xB0, AddRegFrm, (outs GR8 :$dst), (ins i8imm :$src),
[all …]
DX86InstrArithmetic.td459 def INC16r_alt : I<0x40, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
462 def INC32r_alt : I<0x40, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
506 def DEC16r_alt : I<0x48, AddRegFrm, (outs GR16:$dst), (ins GR16:$src1),
509 def DEC32r_alt : I<0x48, AddRegFrm, (outs GR32:$dst), (ins GR32:$src1),
DX86InstrFormats.td22 def AddRegFrm : Format<2>;
/external/llvm-project/llvm/tools/llvm-exegesis/lib/X86/
DTarget.cpp156 case X86II::AddRegFrm: in isInvalidMemoryInstr()
/external/llvm/docs/
DWritingAnLLVMBackend.rst1803 case X86II::AddRegFrm: // for instructions that have one register operand
1838 for the ``X86II::AddRegFrm`` case, the first data emitted (by ``emitByte``) is
1849 case X86II::AddRegFrm:
/external/llvm-project/llvm/docs/
DWritingAnLLVMBackend.rst1843 case X86II::AddRegFrm: // for instructions that have one register operand
1878 for the ``X86II::AddRegFrm`` case, the first data emitted (by ``emitByte``) is
1889 case X86II::AddRegFrm: