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Searched refs:BL32_BASE (Results 1 – 25 of 78) sorted by relevance

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/external/arm-trusted-firmware/plat/rpi/rpi3/aarch64/
Drpi3_bl2_mem_params_desc.c42 # ifdef BL32_BASE
49 # ifdef BL32_BASE
57 .ep_info.pc = BL32_BASE,
61 .image_info.image_base = BL32_BASE,
62 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
82 .image_info.image_base = BL32_BASE,
83 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/plat/hisilicon/poplar/
Dbl2_plat_mem_params_desc.c79 # ifdef BL32_BASE
86 # ifdef BL32_BASE
93 .ep_info.pc = BL32_BASE,
97 .image_info.image_base = BL32_BASE,
98 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
115 .image_info.image_base = BL32_BASE,
116 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_bl2_mem_params_desc.c79 # ifdef BL32_BASE
86 # ifdef BL32_BASE
93 .ep_info.pc = BL32_BASE,
97 .image_info.image_base = BL32_BASE,
98 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
115 .image_info.image_base = BL32_BASE,
116 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_bl2_mem_params_desc.c79 # ifdef BL32_BASE
86 # ifdef BL32_BASE
93 .ep_info.pc = BL32_BASE,
97 .image_info.image_base = BL32_BASE,
98 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
115 .image_info.image_base = BL32_BASE,
116 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/plat/marvell/armada/common/aarch64/
Dmarvell_bl2_mem_params_desc.c80 # ifdef BL32_BASE
87 # ifdef BL32_BASE
94 .ep_info.pc = BL32_BASE,
98 .image_info.image_base = BL32_BASE,
99 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
117 .image_info.image_base = BL32_BASE,
118 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/include/plat/arm/common/
Darm_def.h142 BL32_BASE, \
143 BL32_LIMIT - BL32_BASE, \
472 # define BL32_BASE ARM_FW_CONFIGS_LIMIT macro
476 # define BL32_BASE ((ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)\ macro
494 # define BL32_BASE (ARM_AP_TZC_DRAM1_BASE + ULL(0x200000)) macro
500 # define BL32_BASE PLAT_ARM_SPMC_BASE macro
508 # define BL32_BASE (ARM_AP_TZC_DRAM1_BASE + \ macro
516 # define BL32_BASE ARM_FW_CONFIGS_LIMIT macro
521 # define BL32_BASE PLAT_ARM_TRUSTED_DRAM_BASE macro
527 # define BL32_BASE ARM_AP_TZC_DRAM1_BASE macro
[all …]
/external/arm-trusted-firmware/plat/arm/common/aarch64/
Darm_bl2_mem_params_desc.c78 # ifdef BL32_BASE
102 # ifdef BL32_BASE
109 .ep_info.pc = BL32_BASE,
113 .image_info.image_base = BL32_BASE,
114 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
131 .image_info.image_base = BL32_BASE,
132 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/include/plat/marvell/armada/a8k/common/
Dmarvell_def.h106 BL32_BASE, \
107 BL32_LIMIT - BL32_BASE, \
215 #define BL32_BASE PLAT_MARVELL_TRUSTED_RAM_BASE macro
216 #define BL32_LIMIT (BL32_BASE + PLAT_MARVELL_TRUSTED_RAM_SIZE)
219 #undef BL32_BASE
/external/arm-trusted-firmware/plat/brcm/common/
Dbrcm_bl2_mem_params_desc.c58 #ifdef BL32_BASE
65 #ifdef BL32_BASE
72 .ep_info.pc = BL32_BASE,
76 .image_info.image_base = BL32_BASE,
77 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/plat/renesas/common/
Dbl2_plat_mem_params_desc.c42 # ifdef BL32_BASE
48 # ifdef BL32_BASE
54 .ep_info.pc = BL32_BASE,
60 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
61 .image_info.image_base = BL32_BASE,
/external/arm-trusted-firmware/plat/xilinx/versal/include/
Dplatform_def.h48 # define BL32_BASE 0x60000000 macro
51 # define BL32_BASE (VERSAL_BL32_MEM_BASE) macro
67 #define TSP_SEC_MEM_BASE BL32_BASE
68 #define TSP_SEC_MEM_SIZE (BL32_LIMIT - BL32_BASE + 1)
/external/arm-trusted-firmware/plat/layerscape/common/aarch64/
Dls_bl2_mem_params_desc.c66 # ifdef BL32_BASE
72 # ifdef BL32_BASE
79 .ep_info.pc = BL32_BASE,
83 .image_info.image_base = BL32_BASE,
84 .image_info.image_max_size = (BL32_LIMIT - BL32_BASE),
/external/arm-trusted-firmware/plat/socionext/uniphier/include/
Dplatform_def.h59 #define BL32_BASE (UNIPHIER_MEM_BASE + UNIPHIER_BL32_OFFSET) macro
60 #define BL32_LIMIT (BL32_BASE + UNIPHIER_BL32_MAX_SIZE)
72 #define TSP_SEC_MEM_BASE (BL32_BASE)
73 #define TSP_SEC_MEM_SIZE ((BL32_LIMIT) - (BL32_BASE))
/external/arm-trusted-firmware/plat/qemu/common/
Dqemu_bl2_mem_params_desc.c78 .ep_info.pc = BL32_BASE,
83 .image_info.image_base = BL32_BASE,
84 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
101 .image_info.image_base = BL32_BASE,
102 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/plat/socionext/synquacer/include/
Dplatform_def.h51 #define BL32_BASE 0xfc000000 macro
53 #define BL32_LIMIT (BL32_BASE + BL32_SIZE)
117 #define PLAT_SQ_SP_IMAGE_MMAP MAP_REGION2(BL32_BASE, BL32_BASE, \
122 #define PLAT_SQ_SP_HEAP_BASE (BL32_BASE + PLAT_SQ_SP_IMAGE_SIZE)
/external/arm-trusted-firmware/plat/xilinx/zynqmp/include/
Dplatform_def.h58 # define BL32_BASE 0x60000000 macro
61 # define BL32_BASE (ZYNQMP_BL32_MEM_BASE) macro
77 #define TSP_SEC_MEM_BASE BL32_BASE
78 #define TSP_SEC_MEM_SIZE (BL32_LIMIT - BL32_BASE + 1)
/external/arm-trusted-firmware/plat/hisilicon/hikey/include/
Dhikey_layout.h104 #define BL32_BASE BL32_DRAM_BASE macro
109 #define BL32_BASE BL32_SRAM_BASE macro
118 #undef BL32_BASE
/external/arm-trusted-firmware/plat/brcm/board/stingray/include/
Dplatform_def.h194 #define BL32_BASE (0x8E000000) macro
195 #define BL32_LIMIT (BL32_BASE + BL32_VA_SIZE)
196 #define TSP_SEC_MEM_BASE BL32_BASE
201 #define SECURE_DDR_BASE_ADDRESS BL32_BASE
/external/arm-trusted-firmware/include/plat/marvell/armada/a3k/common/
Dmarvell_def.h181 #define BL32_BASE PLAT_MARVELL_TRUSTED_RAM_BASE macro
182 #define BL32_LIMIT (BL32_BASE + PLAT_MARVELL_TRUSTED_RAM_SIZE)
185 #undef BL32_BASE
/external/arm-trusted-firmware/plat/rpi/rpi3/include/
Dplatform_def.h220 # define BL32_BASE BL32_SRAM_BASE macro
225 # define BL32_BASE BL32_DRAM_BASE macro
230 #define BL32_SIZE (BL32_LIMIT - BL32_BASE)
233 #undef BL32_BASE
/external/arm-trusted-firmware/plat/arm/common/aarch32/
Darm_bl2_mem_params_desc.c45 .ep_info.pc = BL32_BASE,
51 .image_info.image_base = BL32_BASE,
52 .image_info.image_max_size = BL32_LIMIT - BL32_BASE,
/external/arm-trusted-firmware/bl32/sp_min/
Dsp_min.ld.S15 RAM (rwx): ORIGIN = BL32_BASE, LENGTH = BL32_LIMIT - BL32_BASE
24 . = BL32_BASE;
/external/arm-trusted-firmware/plat/ti/k3/board/lite/
Dboard.mk7 BL32_BASE ?= 0x9e800000
8 $(eval $(call add_define,BL32_BASE))
/external/arm-trusted-firmware/plat/ti/k3/board/generic/
Dboard.mk7 BL32_BASE ?= 0x9e800000
8 $(eval $(call add_define,BL32_BASE))
/external/arm-trusted-firmware/plat/layerscape/board/ls1043/include/
Dplatform_def.h132 #define BL32_BASE LS_SECURE_DRAM_BASE macro
147 #define TSP_SEC_MEM_BASE BL32_BASE
148 #define TSP_SEC_MEM_SIZE (BL32_LIMIT - BL32_BASE)

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