/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.h | 78 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const; 138 DAGCombinerInfo &DCI) const; 142 DAGCombinerInfo &DCI) const; 144 SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const; 146 SDValue splitBinaryBitConstantOp(DAGCombinerInfo &DCI, const SDLoc &SL, 150 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; 151 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const; 152 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const; 153 SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const; 154 SDValue performSignExtendInRegCombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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D | AMDGPUISelLowering.h | 79 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; 80 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; 81 SDValue performAssertSZExtCombine(SDNode *N, DAGCombinerInfo &DCI) const; 82 SDValue performIntrinsicWOChainCombine(SDNode *N, DAGCombinerInfo &DCI) const; 84 SDValue splitBinaryBitConstantOpImpl(DAGCombinerInfo &DCI, const SDLoc &SL, 87 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 88 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const; 89 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 90 SDValue performTruncateCombine(SDNode *N, DAGCombinerInfo &DCI) const; 91 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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D | AMDGPUISelLowering.cpp | 1260 DAGCombinerInfo &DCI) const { in combineFMinMaxLegacy() 1264 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacy() 1294 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in combineFMinMaxLegacy() 1295 !DCI.isCalledByLegalizer()) in combineFMinMaxLegacy() 1315 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in combineFMinMaxLegacy() 1316 !DCI.isCalledByLegalizer()) in combineFMinMaxLegacy() 2794 TargetLowering::DAGCombinerInfo &DCI) { in simplifyI24() argument 2795 SelectionDAG &DAG = DCI.DAG; in simplifyI24() 2822 if (TLI.SimplifyDemandedBits(LHS, Demanded, DCI)) in simplifyI24() 2824 if (TLI.SimplifyDemandedBits(RHS, Demanded, DCI)) in simplifyI24() [all …]
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D | SIISelLowering.cpp | 4892 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); in lowerEXTRACT_VECTOR_ELT() local 4898 if (SDValue Combined = performExtractVectorEltCombine(Op.getNode(), DCI)) in lowerEXTRACT_VECTOR_ELT() 7274 SDValue SITargetLowering::widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const { in widenLoad() 7275 SelectionDAG &DAG = DCI.DAG; in widenLoad() 7290 if ((MemVT.isSimple() && !DCI.isAfterLegalizeDAG()) || in widenLoad() 7331 DCI.AddToWorklist(Cvt.getNode()); in widenLoad() 7336 DCI.AddToWorklist(Cvt.getNode()); in widenLoad() 8032 DAGCombinerInfo &DCI) const { in performUCharToFloatCombine() 8038 SelectionDAG &DAG = DCI.DAG; in performUCharToFloatCombine() 8048 if (DCI.isAfterLegalizeDAG() && SrcVT == MVT::i32) { in performUCharToFloatCombine() [all …]
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.h | 84 SDValue widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const; 145 DAGCombinerInfo &DCI) const; 149 DAGCombinerInfo &DCI) const; 151 SDValue performMemSDNodeCombine(MemSDNode *N, DAGCombinerInfo &DCI) const; 153 SDValue splitBinaryBitConstantOp(DAGCombinerInfo &DCI, const SDLoc &SL, 157 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; 158 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const; 159 SDValue performXorCombine(SDNode *N, DAGCombinerInfo &DCI) const; 160 SDValue performZeroExtendCombine(SDNode *N, DAGCombinerInfo &DCI) const; 161 SDValue performSignExtendInRegCombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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D | AMDGPUISelLowering.h | 78 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; 79 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; 80 SDValue performAssertSZExtCombine(SDNode *N, DAGCombinerInfo &DCI) const; 81 SDValue performIntrinsicWOChainCombine(SDNode *N, DAGCombinerInfo &DCI) const; 83 SDValue splitBinaryBitConstantOpImpl(DAGCombinerInfo &DCI, const SDLoc &SL, 86 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 87 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const; 88 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 89 SDValue performTruncateCombine(SDNode *N, DAGCombinerInfo &DCI) const; 90 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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D | AMDGPUISelLowering.cpp | 1379 DAGCombinerInfo &DCI) const { in combineFMinMaxLegacy() 1383 SelectionDAG &DAG = DCI.DAG; in combineFMinMaxLegacy() 1413 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in combineFMinMaxLegacy() 1414 !DCI.isCalledByLegalizer()) in combineFMinMaxLegacy() 1434 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in combineFMinMaxLegacy() 1435 !DCI.isCalledByLegalizer()) in combineFMinMaxLegacy() 2788 TargetLowering::DAGCombinerInfo &DCI) { in simplifyI24() argument 2789 SelectionDAG &DAG = DCI.DAG; in simplifyI24() 2816 if (TLI.SimplifyDemandedBits(LHS, Demanded, DCI)) in simplifyI24() 2818 if (TLI.SimplifyDemandedBits(RHS, Demanded, DCI)) in simplifyI24() [all …]
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D | SIISelLowering.cpp | 5479 DAGCombinerInfo DCI(DAG, AfterLegalizeVectorOps, true, nullptr); in lowerEXTRACT_VECTOR_ELT() local 5485 if (SDValue Combined = performExtractVectorEltCombine(Op.getNode(), DCI)) in lowerEXTRACT_VECTOR_ELT() 7936 SDValue SITargetLowering::widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const { in widenLoad() 7937 SelectionDAG &DAG = DCI.DAG; in widenLoad() 7952 if ((MemVT.isSimple() && !DCI.isAfterLegalizeDAG()) || in widenLoad() 7993 DCI.AddToWorklist(Cvt.getNode()); in widenLoad() 7998 DCI.AddToWorklist(Cvt.getNode()); in widenLoad() 8724 DAGCombinerInfo &DCI) const { in performUCharToFloatCombine() 8730 SelectionDAG &DAG = DCI.DAG; in performUCharToFloatCombine() 8740 if (DCI.isAfterLegalizeDAG() && SrcVT == MVT::i32) { in performUCharToFloatCombine() [all …]
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/external/llvm-project/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 537 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 633 unsigned Index, DAGCombinerInfo &DCI, 636 DAGCombinerInfo &DCI) const; 637 SDValue combineZERO_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 638 SDValue combineSIGN_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 639 SDValue combineSIGN_EXTEND_INREG(SDNode *N, DAGCombinerInfo &DCI) const; 640 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const; 642 SDValue combineLOAD(SDNode *N, DAGCombinerInfo &DCI) const; 643 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const; 644 SDValue combineVECTOR_SHUFFLE(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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D | SystemZISelLowering.cpp | 5704 DAGCombinerInfo &DCI, in combineExtract() argument 5706 SelectionDAG &DAG = DCI.DAG; in combineExtract() 5757 DCI.AddToWorklist(Op.getNode()); in combineExtract() 5762 DCI.AddToWorklist(Op.getNode()); in combineExtract() 5797 DCI.AddToWorklist(Op.getNode()); in combineExtract() 5808 const SDLoc &DL, EVT TruncVT, SDValue Op, DAGCombinerInfo &DCI) const { in combineTruncateExtract() 5834 return combineExtract(DL, ResVT, VecVT, Vec, NewIndex, DCI, true); in combineTruncateExtract() 5843 SDNode *N, DAGCombinerInfo &DCI) const { in combineZERO_EXTEND() 5845 SelectionDAG &DAG = DCI.DAG; in combineZERO_EXTEND() 5861 DCI.CombineTo(N0.getNode(), TruncSelect); in combineZERO_EXTEND() [all …]
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.h | 70 SDValue performLoadCombine(SDNode *N, DAGCombinerInfo &DCI) const; 71 SDValue performStoreCombine(SDNode *N, DAGCombinerInfo &DCI) const; 72 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; 73 SDValue performShlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 74 SDValue performSraCombine(SDNode *N, DAGCombinerInfo &DCI) const; 75 SDValue performSrlCombine(SDNode *N, DAGCombinerInfo &DCI) const; 76 SDValue performMulCombine(SDNode *N, DAGCombinerInfo &DCI) const; 78 SDValue RHS, DAGCombinerInfo &DCI) const; 79 SDValue performSelectCombine(SDNode *N, DAGCombinerInfo &DCI) const; 163 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; [all …]
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D | SIISelLowering.h | 56 DAGCombinerInfo &DCI) const; 59 DAGCombinerInfo &DCI) const; 60 SDValue performAndCombine(SDNode *N, DAGCombinerInfo &DCI) const; 61 SDValue performOrCombine(SDNode *N, DAGCombinerInfo &DCI) const; 62 SDValue performClassCombine(SDNode *N, DAGCombinerInfo &DCI) const; 63 SDValue performFCanonicalizeCombine(SDNode *N, DAGCombinerInfo &DCI) const; 65 SDValue performMinMaxCombine(SDNode *N, DAGCombinerInfo &DCI) const; 67 SDValue performSetCCCombine(SDNode *N, DAGCombinerInfo &DCI) const; 138 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override;
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D | AMDGPUISelLowering.cpp | 955 DAGCombinerInfo &DCI) const { in CombineFMinMaxLegacy() 962 SelectionDAG &DAG = DCI.DAG; in CombineFMinMaxLegacy() 992 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in CombineFMinMaxLegacy() 993 !DCI.isCalledByLegalizer()) in CombineFMinMaxLegacy() 1013 if (DCI.getDAGCombineLevel() < AfterLegalizeDAG && in CombineFMinMaxLegacy() 1014 !DCI.isCalledByLegalizer()) in CombineFMinMaxLegacy() 2136 static void simplifyI24(SDValue Op, TargetLowering::DAGCombinerInfo &DCI) { in simplifyI24() argument 2138 SelectionDAG &DAG = DCI.DAG; in simplifyI24() 2146 DCI.CommitTargetLoweringOpt(TLO); in simplifyI24() 2194 DAGCombinerInfo &DCI) const { in performLoadCombine() [all …]
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D | SIISelLowering.cpp | 2414 DAGCombinerInfo &DCI) const { in performUCharToFloatCombine() 2420 SelectionDAG &DAG = DCI.DAG; in performUCharToFloatCombine() 2430 if (DCI.isAfterLegalizeVectorOps() && SrcVT == MVT::i32) { in performUCharToFloatCombine() 2433 DCI.AddToWorklist(Cvt.getNode()); in performUCharToFloatCombine() 2486 DAGCombinerInfo &DCI) const { in performSHLPtrCombine() 2507 SelectionDAG &DAG = DCI.DAG; in performSHLPtrCombine() 2518 DAGCombinerInfo &DCI) const { in performAndCombine() 2519 if (DCI.isBeforeLegalize()) in performAndCombine() 2522 if (SDValue Base = AMDGPUTargetLowering::performAndCombine(N, DCI)) in performAndCombine() 2525 SelectionDAG &DAG = DCI.DAG; in performAndCombine() [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 522 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 616 unsigned Index, DAGCombinerInfo &DCI, 619 DAGCombinerInfo &DCI) const; 620 SDValue combineZERO_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 621 SDValue combineSIGN_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 622 SDValue combineSIGN_EXTEND_INREG(SDNode *N, DAGCombinerInfo &DCI) const; 623 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const; 625 SDValue combineLOAD(SDNode *N, DAGCombinerInfo &DCI) const; 626 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const; 627 SDValue combineVECTOR_SHUFFLE(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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D | SystemZISelLowering.cpp | 5448 DAGCombinerInfo &DCI, in combineExtract() argument 5450 SelectionDAG &DAG = DCI.DAG; in combineExtract() 5501 DCI.AddToWorklist(Op.getNode()); in combineExtract() 5506 DCI.AddToWorklist(Op.getNode()); in combineExtract() 5541 DCI.AddToWorklist(Op.getNode()); in combineExtract() 5552 const SDLoc &DL, EVT TruncVT, SDValue Op, DAGCombinerInfo &DCI) const { in combineTruncateExtract() 5578 return combineExtract(DL, ResVT, VecVT, Vec, NewIndex, DCI, true); in combineTruncateExtract() 5587 SDNode *N, DAGCombinerInfo &DCI) const { in combineZERO_EXTEND() 5589 SelectionDAG &DAG = DCI.DAG; in combineZERO_EXTEND() 5605 DCI.CombineTo(N0.getNode(), TruncSelect); in combineZERO_EXTEND() [all …]
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/external/llvm-project/clang/lib/AST/ |
D | ASTImporterLookupTable.cpp | 122 auto DCI = LookupTable.find(DC->getPrimaryContext()); in lookup() local 123 if (DCI == LookupTable.end()) in lookup() 126 const auto &FoundNameMap = DCI->second; in lookup() 135 auto DCI = LookupTable.find(DC->getPrimaryContext()); in dump() local 136 if (DCI == LookupTable.end()) in dump() 138 const auto &FoundNameMap = DCI->second; in dump()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 479 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 544 unsigned Index, DAGCombinerInfo &DCI, 547 DAGCombinerInfo &DCI) const; 548 SDValue combineSIGN_EXTEND(SDNode *N, DAGCombinerInfo &DCI) const; 549 SDValue combineMERGE(SDNode *N, DAGCombinerInfo &DCI) const; 550 SDValue combineSTORE(SDNode *N, DAGCombinerInfo &DCI) const; 551 SDValue combineEXTRACT_VECTOR_ELT(SDNode *N, DAGCombinerInfo &DCI) const; 552 SDValue combineJOIN_DWORDS(SDNode *N, DAGCombinerInfo &DCI) const; 553 SDValue combineFP_ROUND(SDNode *N, DAGCombinerInfo &DCI) const; 554 SDValue combineBSWAP(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 747 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const; 748 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const; 750 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 1199 SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const; 1200 SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const; 1201 SDValue DAGCombineTruncBoolExt(SDNode *N, DAGCombinerInfo &DCI) const; 1202 SDValue combineStoreFPToInt(SDNode *N, DAGCombinerInfo &DCI) const; 1203 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const; 1204 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const; 1205 SDValue combineSRA(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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/external/llvm-project/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 803 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const; 804 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const; 806 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 1261 SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const; 1262 SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const; 1263 SDValue DAGCombineTruncBoolExt(SDNode *N, DAGCombinerInfo &DCI) const; 1264 SDValue combineStoreFPToInt(SDNode *N, DAGCombinerInfo &DCI) const; 1265 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const; 1266 SDValue combineSHL(SDNode *N, DAGCombinerInfo &DCI) const; 1267 SDValue combineSRA(SDNode *N, DAGCombinerInfo &DCI) const; [all …]
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/external/OpenCSD/decoder/tests/snapshots/juno_r1_1/ds-5-dumps/ |
D | Trace_Report_0x10_cpu_0_2015Sep17_104900.txt | 6986 EL1N:0xFFFFFFC000089670 00000000 DCI 0x00000000 ; ? Undefined 6987 EL1N:0xFFFFFFC000089674 00000000 DCI 0x00000000 ; ? Undefined 6988 EL1N:0xFFFFFFC000089678 00000000 DCI 0x00000000 ; ? Undefined 6989 EL1N:0xFFFFFFC00008967C 00000000 DCI 0x00000000 ; ? Undefined 6990 EL1N:0xFFFFFFC000089680 00000000 DCI 0x00000000 ; ? Undefined 6991 EL1N:0xFFFFFFC000089684 00000000 DCI 0x00000000 ; ? Undefined 6992 EL1N:0xFFFFFFC000089688 00000000 DCI 0x00000000 ; ? Undefined 6993 EL1N:0xFFFFFFC00008968C 00000000 DCI 0x00000000 ; ? Undefined 6994 EL1N:0xFFFFFFC000089690 00000000 DCI 0x00000000 ; ? Undefined 6995 EL1N:0xFFFFFFC000089694 00000000 DCI 0x00000000 ; ? Undefined [all …]
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 11501 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument 11503 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse() 11527 TargetLowering::DAGCombinerInfo &DCI) { in combineSelectAndUseCommutative() argument 11531 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative() 11534 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) in combineSelectAndUseCommutative() 11552 TargetLowering::DAGCombinerInfo &DCI, in AddCombineToVPADD() argument 11564 SelectionDAG &DAG = DCI.DAG; in AddCombineToVPADD() 11580 TargetLowering::DAGCombinerInfo &DCI, in AddCombineVUZPToVPADDL() argument 11604 SelectionDAG &DAG = DCI.DAG; in AddCombineVUZPToVPADDL() 11633 TargetLowering::DAGCombinerInfo &DCI, in AddCombineBUILD_VECTORToVPADDL() argument [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.h | 554 SDValue expandVSXLoadForLE(SDNode *N, DAGCombinerInfo &DCI) const; 555 SDValue expandVSXStoreForLE(SDNode *N, DAGCombinerInfo &DCI) const; 557 SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; 925 SDValue DAGCombineExtBoolTrunc(SDNode *N, DAGCombinerInfo &DCI) const; 926 SDValue DAGCombineBuildVector(SDNode *N, DAGCombinerInfo &DCI) const; 927 SDValue DAGCombineTruncBoolExt(SDNode *N, DAGCombinerInfo &DCI) const; 928 SDValue combineFPToIntToFP(SDNode *N, DAGCombinerInfo &DCI) const; 930 SDValue getRsqrtEstimate(SDValue Operand, DAGCombinerInfo &DCI, 933 SDValue getRecipEstimate(SDValue Operand, DAGCombinerInfo &DCI,
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 11054 TargetLowering::DAGCombinerInfo &DCI, in combineSelectAndUse() argument 11056 SelectionDAG &DAG = DCI.DAG; in combineSelectAndUse() 11080 TargetLowering::DAGCombinerInfo &DCI) { in combineSelectAndUseCommutative() argument 11084 if (SDValue Result = combineSelectAndUse(N, N0, N1, DCI, AllOnes)) in combineSelectAndUseCommutative() 11087 if (SDValue Result = combineSelectAndUse(N, N1, N0, DCI, AllOnes)) in combineSelectAndUseCommutative() 11105 TargetLowering::DAGCombinerInfo &DCI, in AddCombineToVPADD() argument 11117 SelectionDAG &DAG = DCI.DAG; in AddCombineToVPADD() 11133 TargetLowering::DAGCombinerInfo &DCI, in AddCombineVUZPToVPADDL() argument 11157 SelectionDAG &DAG = DCI.DAG; in AddCombineVUZPToVPADDL() 11186 TargetLowering::DAGCombinerInfo &DCI, in AddCombineBUILD_VECTORToVPADDL() argument [all …]
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/external/llvm-project/clang/lib/StaticAnalyzer/Core/ |
D | DynamicType.cpp | 218 static raw_ostream &printJson(const DynamicCastInfo &DCI, raw_ostream &Out, in printJson() argument 220 return Out << "\"from\": \"" << DCI.from().getAsString() << "\", \"to\": \"" in printJson() 221 << DCI.to().getAsString() << "\", \"kind\": \"" in printJson() 222 << (DCI.succeeds() ? "success" : "fail") << "\""; in printJson()
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