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Searched refs:FinalReg (Results 1 – 8 of 8) sorted by relevance

/external/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1079 unsigned FinalReg = FinalOp.Mem.BaseReg; in VerifyAndAdjustOperands() local
1100 bool IsSI = IsSIReg(FinalReg); in VerifyAndAdjustOperands()
1101 FinalReg = GetSIDIForRegClass(RegClassID, FinalReg, IsSI); in VerifyAndAdjustOperands()
1103 if (FinalReg != OrigReg) { in VerifyAndAdjustOperands()
1113 FinalOp.Mem.BaseReg = FinalReg; in VerifyAndAdjustOperands()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1347 unsigned FinalReg = FinalOp.Mem.BaseReg; in VerifyAndAdjustOperands() local
1368 bool IsSI = IsSIReg(FinalReg); in VerifyAndAdjustOperands()
1369 FinalReg = GetSIDIForRegClass(RegClassID, FinalReg, IsSI); in VerifyAndAdjustOperands()
1371 if (FinalReg != OrigReg) { in VerifyAndAdjustOperands()
1381 FinalOp.Mem.BaseReg = FinalReg; in VerifyAndAdjustOperands()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86FrameLowering.cpp595 FinalReg = InProlog ? X86::RDX in emitStackProbeInline() local
656 BuildMI(&MBB, DL, TII.get(X86::CMOV64rr), FinalReg) in emitStackProbeInline()
674 BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg); in emitStackProbeInline()
679 RoundMBB->addLiveIn(FinalReg); in emitStackProbeInline()
681 .addReg(FinalReg) in emitStackProbeInline()
/external/llvm/lib/Target/X86/
DX86FrameLowering.cpp558 FinalReg = InProlog ? (unsigned)X86::RDX in emitStackProbeInline() local
605 BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg) in emitStackProbeInline()
622 BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg); in emitStackProbeInline()
628 .addReg(FinalReg) in emitStackProbeInline()
/external/llvm-project/llvm/lib/Target/X86/
DX86FrameLowering.cpp787 FinalReg = InProlog ? X86::RDX in emitStackProbeInlineWindowsCoreCLR64() local
848 BuildMI(&MBB, DL, TII.get(X86::CMOV64rr), FinalReg) in emitStackProbeInlineWindowsCoreCLR64()
866 BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg); in emitStackProbeInlineWindowsCoreCLR64()
871 RoundMBB->addLiveIn(FinalReg); in emitStackProbeInlineWindowsCoreCLR64()
873 .addReg(FinalReg) in emitStackProbeInlineWindowsCoreCLR64()
/external/llvm-project/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp1664 unsigned FinalReg = FinalOp.Mem.BaseReg; in VerifyAndAdjustOperands() local
1685 bool IsSI = IsSIReg(FinalReg); in VerifyAndAdjustOperands()
1686 FinalReg = GetSIDIForRegClass(RegClassID, FinalReg, IsSI); in VerifyAndAdjustOperands()
1688 if (FinalReg != OrigReg) { in VerifyAndAdjustOperands()
1698 FinalOp.Mem.BaseReg = FinalReg; in VerifyAndAdjustOperands()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.cpp702 unsigned FinalReg = SubReg; in buildSpillLoadStore() local
729 FinalReg) in buildSpillLoadStore()
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIRegisterInfo.cpp865 unsigned FinalReg = SubReg; in buildSpillLoadStore() local
917 FinalReg) in buildSpillLoadStore()