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Searched refs:OUT_PKT4 (Results 1 – 23 of 23) sorted by relevance

/external/mesa3d/src/gallium/drivers/freedreno/a5xx/
Dfd5_emit.c332 OUT_PKT4(ring, REG_A5XX_TPL1_TP_BORDER_COLOR_BASE_ADDR_LO, 2); in emit_border_color()
494 OUT_PKT4(ring, REG_A5XX_VFD_FETCH(j), 4); in fd5_emit_vertex_bufs()
499 OUT_PKT4(ring, REG_A5XX_VFD_DECODE(j), 2); in fd5_emit_vertex_bufs()
508 OUT_PKT4(ring, REG_A5XX_VFD_DEST_CNTL(j), 1); in fd5_emit_vertex_bufs()
516 OUT_PKT4(ring, REG_A5XX_VFD_CONTROL_0, 1); in fd5_emit_vertex_bufs()
539 OUT_PKT4(ring, REG_A5XX_RB_RENDER_COMPONENTS, 1); in fd5_emit_state()
557 OUT_PKT4(ring, REG_A5XX_RB_ALPHA_CONTROL, 1); in fd5_emit_state()
560 OUT_PKT4(ring, REG_A5XX_RB_STENCIL_CONTROL, 1); in fd5_emit_state()
577 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_CNTL, 1); in fd5_emit_state()
586 OUT_PKT4(ring, REG_A5XX_RB_STENCILREFMASK, 2); in fd5_emit_state()
[all …]
Dfd5_gmem.c99 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(i), 5); in emit_mrt()
115 OUT_PKT4(ring, REG_A5XX_SP_FS_MRT_REG(i), 1); in emit_mrt()
124 OUT_PKT4(ring, REG_A5XX_RB_MRT_FLAG_BUFFER(i), 4); in emit_mrt()
151 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_BUFFER_INFO, 5); in emit_zs()
162 OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_BUFFER_INFO, 1); in emit_zs()
165 OUT_PKT4(ring, REG_A5XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3); in emit_zs()
171 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_BUFFER_BASE_LO, 3); in emit_zs()
175 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_LO, 2); in emit_zs()
178 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_BUFFER_BASE_LO, 3); in emit_zs()
183 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE_LO, 2); in emit_zs()
[all …]
Dfd5_draw.c55 OUT_PKT4(ring, REG_A5XX_VFD_INDEX_OFFSET, 2); in draw_impl()
59 OUT_PKT4(ring, REG_A5XX_PC_RESTART_INDEX, 1); in draw_impl()
197 OUT_PKT4(ring, REG_A5XX_RB_CCU_CNTL, 1); in fd5_clear_lrz()
200 OUT_PKT4(ring, REG_A5XX_HLSQ_UPDATE_CNTL, 1); in fd5_clear_lrz()
203 OUT_PKT4(ring, REG_A5XX_GRAS_SU_CNTL, 1); in fd5_clear_lrz()
207 OUT_PKT4(ring, REG_A5XX_GRAS_CNTL, 1); in fd5_clear_lrz()
210 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in fd5_clear_lrz()
213 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_CNTL, 1); in fd5_clear_lrz()
216 OUT_PKT4(ring, REG_A5XX_RB_MRT_BUF_INFO(0), 5); in fd5_clear_lrz()
224 OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1); in fd5_clear_lrz()
[all …]
Dfd5_compute.c96 OUT_PKT4(ring, REG_A5XX_SP_SP_CNTL, 1); in cs_program_emit()
99 OUT_PKT4(ring, REG_A5XX_HLSQ_CONTROL_0_REG, 1); in cs_program_emit()
104 OUT_PKT4(ring, REG_A5XX_SP_CS_CTRL_REG0, 1); in cs_program_emit()
111 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CONFIG, 1); in cs_program_emit()
116 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CNTL, 1); in cs_program_emit()
120 OUT_PKT4(ring, REG_A5XX_SP_CS_CONFIG, 1); in cs_program_emit()
127 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CONSTLEN, 2); in cs_program_emit()
131 OUT_PKT4(ring, REG_A5XX_SP_CS_OBJ_START_LO, 2); in cs_program_emit()
134 OUT_PKT4(ring, REG_A5XX_HLSQ_UPDATE_CNTL, 1); in cs_program_emit()
141 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CNTL_0, 2); in cs_program_emit()
[all …]
Dfd5_program.c331 OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CONFIG, 5); in fd5_program_emit()
348 OUT_PKT4(ring, REG_A5XX_HLSQ_CS_CONFIG, 1); in fd5_program_emit()
351 OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CNTL, 5); in fd5_program_emit()
363 OUT_PKT4(ring, REG_A5XX_SP_VS_CONFIG, 5); in fd5_program_emit()
380 OUT_PKT4(ring, REG_A5XX_SP_CS_CONFIG, 1); in fd5_program_emit()
383 OUT_PKT4(ring, REG_A5XX_HLSQ_VS_CONSTLEN, 2); in fd5_program_emit()
387 OUT_PKT4(ring, REG_A5XX_HLSQ_FS_CONSTLEN, 2); in fd5_program_emit()
391 OUT_PKT4(ring, REG_A5XX_HLSQ_HS_CONSTLEN, 2); in fd5_program_emit()
395 OUT_PKT4(ring, REG_A5XX_HLSQ_DS_CONSTLEN, 2); in fd5_program_emit()
399 OUT_PKT4(ring, REG_A5XX_HLSQ_GS_CONSTLEN, 2); in fd5_program_emit()
[all …]
Dfd5_blitter.c156 OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1); in emit_setup()
159 OUT_PKT4(ring, REG_A5XX_UNKNOWN_2100, 1); in emit_setup()
162 OUT_PKT4(ring, REG_A5XX_UNKNOWN_2180, 1); in emit_setup()
165 OUT_PKT4(ring, REG_A5XX_UNKNOWN_2184, 1); in emit_setup()
168 OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1); in emit_setup()
171 OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1); in emit_setup()
174 OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1); in emit_setup()
177 OUT_PKT4(ring, REG_A5XX_TPL1_MODE_CNTL, 1); in emit_setup()
180 OUT_PKT4(ring, REG_A5XX_HLSQ_MODE_CNTL, 1); in emit_setup()
183 OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1); in emit_setup()
[all …]
Dfd5_emit.h108 OUT_PKT4(ring, REG_A5XX_UCHE_CACHE_INVALIDATE_MIN_LO, 5); in fd5_cache_flush()
162 OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1); in fd5_emit_render_cntl()
169 OUT_PKT4(ring, REG_A5XX_GRAS_SC_CNTL, 1); in fd5_emit_render_cntl()
181 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_CNTL, 1); in fd5_emit_lrz_flush()
187 OUT_PKT4(ring, REG_A5XX_GRAS_LRZ_CNTL, 1); in fd5_emit_lrz_flush()
Dfd5_query.c65 OUT_PKT4(ring, REG_A5XX_RB_SAMPLE_COUNT_CONTROL, 1); in occlusion_resume()
68 OUT_PKT4(ring, REG_A5XX_RB_SAMPLE_COUNT_ADDR_LO, 2); in occlusion_resume()
90 OUT_PKT4(ring, REG_A5XX_RB_SAMPLE_COUNT_CONTROL, 1); in occlusion_pause()
93 OUT_PKT4(ring, REG_A5XX_RB_SAMPLE_COUNT_ADDR_LO, 2); in occlusion_pause()
292 OUT_PKT4(ring, g->counters[counter_idx].select_reg, 1); in perfcntr_resume()
Dfd5_screen.h43 OUT_PKT4(ring, reg, 1); in emit_marker5()
/external/mesa3d/src/gallium/drivers/freedreno/a6xx/
Dfd6_program.c98 OUT_PKT4(ring, instrlen, 1); in fd6_emit_shader()
101 OUT_PKT4(ring, obj_start, 2); in fd6_emit_shader()
251 OUT_PKT4(ring, REG_A6XX_HLSQ_VS_CNTL, 4); in setup_config_stateobj()
263 OUT_PKT4(ring, REG_A6XX_HLSQ_FS_CNTL, 1); in setup_config_stateobj()
267 OUT_PKT4(ring, REG_A6XX_SP_VS_CONFIG, 1); in setup_config_stateobj()
273 OUT_PKT4(ring, REG_A6XX_SP_HS_CONFIG, 1); in setup_config_stateobj()
280 OUT_PKT4(ring, REG_A6XX_SP_DS_CONFIG, 1); in setup_config_stateobj()
287 OUT_PKT4(ring, REG_A6XX_SP_GS_CONFIG, 1); in setup_config_stateobj()
294 OUT_PKT4(ring, REG_A6XX_SP_FS_CONFIG, 1); in setup_config_stateobj()
300 OUT_PKT4(ring, REG_A6XX_SP_IBO_COUNT, 1); in setup_config_stateobj()
[all …]
Dfd6_blitter.c247 OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1); in emit_setup()
273 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1); in emit_blit_setup()
276 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1); in emit_blit_setup()
286 OUT_PKT4(ring, REG_A6XX_SP_2D_DST_FORMAT, 1); in emit_blit_setup()
302 OUT_PKT4(ring, REG_A6XX_RB_2D_UNKNOWN_8C01, 1); in emit_blit_setup()
375 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 10); in emit_blit_buffer()
394 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9); in emit_blit_buffer()
409 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4); in emit_blit_buffer()
415 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2); in emit_blit_buffer()
423 OUT_PKT4(ring, REG_A6XX_RB_UNKNOWN_8E04, 1); in emit_blit_buffer()
[all …]
Dfd6_gmem.c137 OUT_PKT4(ring, REG_A6XX_RB_MRT_FLAG_BUFFER(i), 3); in emit_mrt()
190 OUT_PKT4(ring, REG_A6XX_RB_DEPTH_FLAG_BUFFER_BASE_LO, 3); in emit_zs()
202 OUT_PKT4(ring, REG_A6XX_GRAS_LRZ_BUFFER_BASE_LO, 5); in emit_zs()
231 OUT_PKT4(ring, REG_A6XX_RB_DEPTH_BUFFER_INFO, 6); in emit_zs()
241 OUT_PKT4(ring, REG_A6XX_GRAS_LRZ_BUFFER_BASE_LO, 5); in emit_zs()
371 OUT_PKT4(ring, REG_A6XX_VSC_PIPE_CONFIG_REG(0), 32); in update_vsc_pipe()
584 OUT_PKT4(ring, REG_A6XX_PC_UNKNOWN_9805, 1); in emit_binning_pass()
587 OUT_PKT4(ring, REG_A6XX_SP_UNKNOWN_A0F8, 1); in emit_binning_pass()
593 OUT_PKT4(ring, REG_A6XX_RB_WINDOW_OFFSET, 1); in emit_binning_pass()
597 OUT_PKT4(ring, REG_A6XX_SP_TP_WINDOW_OFFSET, 1); in emit_binning_pass()
[all …]
Dfd6_compute.c93 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_CNTL, 1); in cs_program_emit()
97 OUT_PKT4(ring, REG_A6XX_SP_CS_CONFIG, 2); in cs_program_emit()
105 OUT_PKT4(ring, REG_A6XX_SP_CS_CTRL_REG0, 1); in cs_program_emit()
113 OUT_PKT4(ring, REG_A6XX_SP_CS_UNKNOWN_A9B1, 1); in cs_program_emit()
120 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_CNTL_0, 2); in cs_program_emit()
127 OUT_PKT4(ring, REG_A6XX_SP_CS_OBJ_START_LO, 2); in cs_program_emit()
177 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_NDRANGE_0, 7); in fd6_launch_grid()
189 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_KERNEL_GROUP_X, 3); in fd6_launch_grid()
Dfd6_draw.c290 OUT_PKT4(ring, REG_A6XX_VFD_INDEX_OFFSET, 1); in fd6_draw_vbo()
296 OUT_PKT4(ring, REG_A6XX_VFD_INSTANCE_START_OFFSET, 1); in fd6_draw_vbo()
303 OUT_PKT4(ring, REG_A6XX_PC_RESTART_INDEX, 1); in fd6_draw_vbo()
378 OUT_PKT4(ring, REG_A6XX_RB_2D_UNKNOWN_8C01, 1); in fd6_clear_lrz()
381 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 13); in fd6_clear_lrz()
396 OUT_PKT4(ring, REG_A6XX_SP_2D_DST_FORMAT, 1); in fd6_clear_lrz()
399 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1); in fd6_clear_lrz()
403 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1); in fd6_clear_lrz()
410 OUT_PKT4(ring, REG_A6XX_RB_2D_SRC_SOLID_C0, 4); in fd6_clear_lrz()
416 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9); in fd6_clear_lrz()
[all …]
Dfd6_emit.c239 OUT_PKT4(ring, REG_A6XX_SP_TP_BORDER_COLOR_BASE_ADDR_LO, 2); in emit_border_color()
364 OUT_PKT4(ring, tex_samp_reg, 2); in fd6_emit_textures()
454 OUT_PKT4(ring, tex_const_reg, 2); in fd6_emit_textures()
460 OUT_PKT4(ring, tex_count_reg, 1); in fd6_emit_textures()
557 OUT_PKT4(ring, REG_A6XX_VFD_FETCH(0), 4 * vtx->vertexbuf.count); in build_vbo_state()
737 OUT_PKT4(ring, REG_A6XX_VPC_SO_BUFFER_BASE_LO(i), 3); in fd6_emit_streamout()
744 OUT_PKT4(ring, REG_A6XX_VPC_SO_BUFFER_OFFSET(i), 1); in fd6_emit_streamout()
754 OUT_PKT4(ring, REG_A6XX_VPC_SO_FLUSH_BASE_LO(i), 2); in fd6_emit_streamout()
848 OUT_PKT4(ring, REG_A6XX_RB_STENCILREF, 1); in fd6_emit_state()
965 OUT_PKT4(ring, REG_A6XX_RB_FS_OUTPUT_CNTL0, 2); in fd6_emit_state()
[all …]
Dfd6_zsa.c207 OUT_PKT4(ring, REG_A6XX_RB_ALPHA_CONTROL, 1); in fd6_zsa_state_create()
211 OUT_PKT4(ring, REG_A6XX_RB_STENCIL_CONTROL, 1); in fd6_zsa_state_create()
214 OUT_PKT4(ring, REG_A6XX_RB_DEPTH_CNTL, 1); in fd6_zsa_state_create()
218 OUT_PKT4(ring, REG_A6XX_RB_STENCILMASK, 2); in fd6_zsa_state_create()
Dfd6_query.c67 OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_COUNT_CONTROL, 1); in occlusion_resume()
70 OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_COUNT_ADDR_LO, 2); in occlusion_resume()
90 OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_COUNT_CONTROL, 1); in occlusion_pause()
93 OUT_PKT4(ring, REG_A6XX_RB_SAMPLE_COUNT_ADDR_LO, 2); in occlusion_pause()
397 OUT_PKT4(ring, REG_A6XX_VPC_SO_STREAM_COUNTS_LO, 2); in primitives_emitted_resume()
410 OUT_PKT4(ring, REG_A6XX_VPC_SO_STREAM_COUNTS_LO, 2); in primitives_emitted_pause()
485 OUT_PKT4(ring, g->counters[counter_idx].select_reg, 1); in perfcntr_resume()
Dfd6_context.h157 OUT_PKT4(ring, reg, 1); in emit_marker6()
Dfd6_context.c98 OUT_PKT4(ring, REG_A6XX_VFD_DECODE(0), 2 * num_elements); in fd6_vertex_state_create()
Dfd6_emit.h296 OUT_PKT4(ring, reg, 1); \
/external/mesa3d/src/freedreno/computerator/
Da6xx.c120 OUT_PKT4(ring, REG_A6XX_SP_MODE_CONTROL, 1); in cs_program_emit()
123 OUT_PKT4(ring, REG_A6XX_HLSQ_INVALIDATE_CMD, 1); in cs_program_emit()
134 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_CNTL, 1); in cs_program_emit()
138 OUT_PKT4(ring, REG_A6XX_SP_CS_CONFIG, 2); in cs_program_emit()
145 OUT_PKT4(ring, REG_A6XX_SP_CS_CTRL_REG0, 1); in cs_program_emit()
153 OUT_PKT4(ring, REG_A6XX_SP_CS_UNKNOWN_A9B1, 1); in cs_program_emit()
160 OUT_PKT4(ring, REG_A6XX_HLSQ_CS_CNTL_0, 2); in cs_program_emit()
167 OUT_PKT4(ring, REG_A6XX_SP_CS_OBJ_START_LO, 2); in cs_program_emit()
170 OUT_PKT4(ring, REG_A6XX_SP_CS_INSTRLEN, 1); in cs_program_emit()
173 OUT_PKT4(ring, REG_A6XX_SP_CS_OBJ_START_LO, 2); in cs_program_emit()
[all …]
/external/mesa3d/src/freedreno/perfcntrs/
Dfdperf.c450 OUT_PKT4(ring, group->group->counters[ctr].enable, 1); in select_counter()
455 OUT_PKT4(ring, group->group->counters[ctr].clear, 1); in select_counter()
458 OUT_PKT4(ring, group->group->counters[ctr].clear, 1); in select_counter()
462 OUT_PKT4(ring, group->group->counters[ctr].select_reg, 1); in select_counter()
466 OUT_PKT4(ring, group->group->counters[ctr].enable, 1); in select_counter()
/external/mesa3d/src/freedreno/drm/
Dfreedreno_ringbuffer.h309 OUT_PKT4(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt) in OUT_PKT4() function