| /external/llvm-project/llvm/test/CodeGen/Hexagon/ |
| D | isel-splat-vector-dag-crash.ll | 4 ; for ISD::SPLAT_VECTOR.
|
| /external/llvm-project/llvm/unittests/CodeGen/ |
| D | AArch64SelectionDAGTest.cpp | 358 EXPECT_EQ(Op->getOpcode(), ISD::SPLAT_VECTOR); in TEST_F()
383 EXPECT_EQ(Val1->getOpcode(), ISD::SPLAT_VECTOR); in TEST_F()
447 EXPECT_EQ(Op->getOpcode(), ISD::SPLAT_VECTOR); in TEST_F()
467 EXPECT_EQ(Val1->getOpcode(), ISD::SPLAT_VECTOR); in TEST_F()
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 98 setOperationAction(ISD::SPLAT_VECTOR, T, Legal); in initializeHVXLowering()
165 setOperationAction(ISD::SPLAT_VECTOR, T, Custom); in initializeHVXLowering()
265 setTargetDAGCombine(ISD::SPLAT_VECTOR); in initializeHVXLowering()
519 SDValue S = DAG.getNode(ISD::SPLAT_VECTOR, dl, WordTy, SplatV); in buildHvxVectorReg()
1150 SDValue True = DAG.getNode(ISD::SPLAT_VECTOR, dl, ResTy, in extendHvxVectorPred()
1446 SDValue Vec1 = DAG.getNode(ISD::SPLAT_VECTOR, dl, ResTy, in LowerHvxCttz()
1448 SDValue VecW = DAG.getNode(ISD::SPLAT_VECTOR, dl, ResTy, in LowerHvxCttz()
1450 SDValue VecN1 = DAG.getNode(ISD::SPLAT_VECTOR, dl, ResTy, in LowerHvxCttz()
2055 case ISD::SPLAT_VECTOR: in LowerHvxOperation()
2201 if (Ops[0].getOpcode() == ISD::SPLAT_VECTOR) { in PerformHvxDAGCombine()
[all …]
|
| D | HexagonISelLowering.cpp | 1627 ISD::SPLAT_VECTOR, in HexagonTargetLowering()
1686 setOperationAction(ISD::SPLAT_VECTOR, NativeVT, Legal); in HexagonTargetLowering()
2260 case ISD::SPLAT_VECTOR: in getVectorShiftByInt()
2383 return DAG.getNode(ISD::SPLAT_VECTOR, dl, VecTy, Ext); in buildVector32()
2444 return DAG.getNode(ISD::SPLAT_VECTOR, dl, VecTy, Ext); in buildVector64()
2662 return DAG.getNode(ISD::SPLAT_VECTOR, dl, Ty, getZero(dl, MVT::i32, DAG)); in getZero()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 436 SPLAT_VECTOR, enumerator
|
| D | SelectionDAG.h | 801 return getNode(ISD::SPLAT_VECTOR, DL, VT, Op);
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 565 SPLAT_VECTOR, enumerator
|
| D | SelectionDAG.h | 840 return getNode(ISD::SPLAT_VECTOR, DL, VT, Op);
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 287 case ISD::SPLAT_VECTOR: return "splat_vector"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 105 case ISD::SPLAT_VECTOR: in PromoteIntegerResult()
1264 case ISD::SPLAT_VECTOR: in PromoteIntegerOperand()
4299 return DAG.getNode(ISD::SPLAT_VECTOR, dl, NOutVT, Op); in PromoteIntRes_SPLAT_VECTOR()
|
| D | LegalizeDAG.cpp | 3769 case ISD::SPLAT_VECTOR: in ExpandNode()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 291 case ISD::SPLAT_VECTOR: return "splat_vector"; in getOperationName()
|
| D | SelectionDAG.cpp | 142 if (N->getOpcode() == ISD::SPLAT_VECTOR) { in isConstantSplatVector()
2368 case ISD::SPLAT_VECTOR: in isSplatValue()
2500 case ISD::SPLAT_VECTOR: in getSplatSourceVector()
5433 N1.getOpcode() == ISD::SPLAT_VECTOR)) { in getNode()
9121 if (N.getOpcode() == ISD::SPLAT_VECTOR) in isConstOrConstSplatFP()
10006 if ((N.getOpcode() == ISD::SPLAT_VECTOR) && in isConstantIntBuildVectorOrConstantInt()
|
| D | LegalizeVectorTypes.cpp | 894 case ISD::SPLAT_VECTOR: in SplitVectorResult()
1601 assert(N->getOpcode() == ISD::SPLAT_VECTOR && "Unexpected opcode"); in SplitVecRes_ScalarOp()
2848 case ISD::SPLAT_VECTOR: in WidenVectorResult()
|
| D | LegalizeIntegerTypes.cpp | 107 case ISD::SPLAT_VECTOR: in PromoteIntegerResult()
1464 case ISD::SPLAT_VECTOR: in PromoteIntegerOperand()
4705 return DAG.getNode(ISD::SPLAT_VECTOR, dl, NOutVT, Op); in PromoteIntRes_SPLAT_VECTOR()
|
| D | LegalizeDAG.cpp | 3909 case ISD::SPLAT_VECTOR: in ExpandNode()
|
| D | DAGCombiner.cpp | 18231 VecOp.getOpcode() == ISD::SPLAT_VECTOR) && in visitEXTRACT_VECTOR_ELT()
19187 if (TLI.getOperationAction(ISD::SPLAT_VECTOR, VT) != TargetLowering::Expand) in visitBUILD_VECTOR()
19190 return DAG.getNode(ISD::SPLAT_VECTOR, SDLoc(N), VT, V); in visitBUILD_VECTOR()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1076 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in AArch64TargetLowering()
1107 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in AArch64TargetLowering()
1128 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in AArch64TargetLowering()
1154 setOperationAction(ISD::SPLAT_VECTOR, MVT::nxv8bf16, Custom); in AArch64TargetLowering()
1353 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in addTypeForFixedLengthSVE()
3866 if (Splat.getOpcode() != ISD::SPLAT_VECTOR) in getGatherScatterIndexIsExtended()
4216 case ISD::SPLAT_VECTOR: in LowerOperation()
6758 SDValue SplatPred = DAG.getNode(ISD::SPLAT_VECTOR, DL, PredVT, TruncCC); in LowerSELECT()
8878 SDValue SplatOne = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, One); in LowerDUPQLane()
8888 SDValue SplatIdx64 = DAG.getNode(ISD::SPLAT_VECTOR, DL, MVT::nxv2i64, Idx64); in LowerDUPQLane()
[all …]
|
| D | AArch64ISelDAGToDAG.cpp | 149 case ISD::SPLAT_VECTOR: { in SelectDupZeroOrUndef()
169 case ISD::SPLAT_VECTOR: { in SelectDupZero()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 700 setOperationAction(ISD::SPLAT_VECTOR, VT, Expand); in initActions()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 818 setOperationAction(ISD::SPLAT_VECTOR, VT, Expand); in initActions()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 859 setOperationAction(ISD::SPLAT_VECTOR, VT, Custom); in AArch64TargetLowering()
3225 case ISD::SPLAT_VECTOR: in LowerOperation()
10233 if (N->getOpcode() == AArch64ISD::DUP || N->getOpcode() == ISD::SPLAT_VECTOR) in isConstantSplatVectorMaskForType()
10906 Comparator.getOpcode() == ISD::SPLAT_VECTOR) { in tryConvertSVEWideCompare()
10951 SDValue Splat = DAG.getNode(ISD::SPLAT_VECTOR, DL, CmpVT, Imm); in tryConvertSVEWideCompare()
|
| D | AArch64ISelDAGToDAG.cpp | 145 case ISD::SPLAT_VECTOR: { in SelectDupZeroOrUndef()
|
| /external/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 645 def splat_vector : SDNode<"ISD::SPLAT_VECTOR", SDTypeProfile<1, 1, []>, []>;
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 4478 if (N->getOpcode() == ISD::SPLAT_VECTOR) in isZeroVector()
|