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Searched refs:STRICT_FSUB (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h301 STRICT_FADD, STRICT_FSUB, STRICT_FMUL, STRICT_FDIV, STRICT_FREM, enumerator
/external/llvm-project/llvm/include/llvm/CodeGen/
DISDOpcodes.h382 STRICT_FSUB, enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp251 case ISD::STRICT_FSUB: return "strict_fsub"; in getOperationName()
DLegalizeFloatTypes.cpp120 case ISD::STRICT_FSUB: in SoftenFloatResult()
1177 case ISD::STRICT_FSUB: in ExpandFloatResult()
DLegalizeDAG.cpp2402 Sub = DAG.getNode(ISD::STRICT_FSUB, dl, {MVT::f64, MVT::Other}, in ExpandLegalINT_TO_FP()
4143 case ISD::STRICT_FSUB: in ConvertNodeToLibcall()
DTargetLowering.cpp6165 SDValue Val = DAG.getNode(ISD::STRICT_FSUB, dl, { SrcVT, MVT::Other }, in expandFP_TO_UINT()
6295 DAG.getNode(ISD::STRICT_FSUB, dl, {DstVT, MVT::Other}, in expandUINT_TO_FP()
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp255 case ISD::STRICT_FSUB: return "strict_fsub"; in getOperationName()
DLegalizeDAG.cpp2457 Sub = DAG.getNode(ISD::STRICT_FSUB, dl, {MVT::f64, MVT::Other}, in ExpandLegalINT_TO_FP()
3980 case ISD::STRICT_FSUB: { in ExpandNode()
3982 ISD::STRICT_FSUB, Node->getValueType(0)) == TargetLowering::Legal) in ExpandNode()
4345 case ISD::STRICT_FSUB: in ConvertNodeToLibcall()
DLegalizeFloatTypes.cpp122 case ISD::STRICT_FSUB: in SoftenFloatResult()
1218 case ISD::STRICT_FSUB: in ExpandFloatResult()
DDAGCombiner.cpp13311 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
13314 return DAG.getNode(ISD::STRICT_FSUB, DL, DAG.getVTList(VT, ChainVT), in visitSTRICT_FADD()
13319 if (!LegalOperations || TLI.isOperationLegalOrCustom(ISD::STRICT_FSUB, VT)) in visitSTRICT_FADD()
13322 return DAG.getNode(ISD::STRICT_FSUB, DL, DAG.getVTList(VT, ChainVT), in visitSTRICT_FADD()
DTargetLowering.cpp6511 SDValue Val = DAG.getNode(ISD::STRICT_FSUB, dl, { SrcVT, MVT::Other }, in expandFP_TO_UINT()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp322 setOperationAction(ISD::STRICT_FSUB, MVT::f32, Legal); in PPCTargetLowering()
329 setOperationAction(ISD::STRICT_FSUB, MVT::f64, Legal); in PPCTargetLowering()
1071 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in PPCTargetLowering()
1085 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in PPCTargetLowering()
1156 setOperationAction(ISD::STRICT_FSUB, MVT::f128, Legal); in PPCTargetLowering()
8417 SDValue Val = DAG.getNode(ISD::STRICT_FSUB, dl, in LowerFP_TO_INT()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp465 setOperationAction(ISD::STRICT_FSUB, VT, Legal); in SystemZTargetLowering()
514 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in SystemZTargetLowering()
571 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in SystemZTargetLowering()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td487 def strict_fsub : SDNode<"ISD::STRICT_FSUB",
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp617 setOperationAction(ISD::STRICT_FSUB, MVT::f32, Legal); in X86TargetLowering()
618 setOperationAction(ISD::STRICT_FSUB, MVT::f64, Legal); in X86TargetLowering()
671 setOperationAction(ISD::STRICT_FSUB , MVT::f80, Legal); in X86TargetLowering()
691 setOperationAction(ISD::STRICT_FSUB, MVT::f128, LibCall); in X86TargetLowering()
855 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in X86TargetLowering()
1047 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in X86TargetLowering()
1193 setOperationAction(ISD::STRICT_FSUB, MVT::v8f32, Legal); in X86TargetLowering()
1194 setOperationAction(ISD::STRICT_FSUB, MVT::v4f64, Legal); in X86TargetLowering()
1484 setOperationAction(ISD::STRICT_FSUB, MVT::v16f32, Legal); in X86TargetLowering()
1485 setOperationAction(ISD::STRICT_FSUB, MVT::v8f64, Legal); in X86TargetLowering()
[all …]
/external/llvm-project/llvm/include/llvm/Target/
DTargetSelectionDAG.td494 def strict_fsub : SDNode<"ISD::STRICT_FSUB",
/external/llvm-project/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp470 setOperationAction(ISD::STRICT_FSUB, VT, Legal); in SystemZTargetLowering()
519 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in SystemZTargetLowering()
576 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in SystemZTargetLowering()
/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.cpp626 setOperationAction(ISD::STRICT_FSUB, MVT::f32, Legal); in X86TargetLowering()
627 setOperationAction(ISD::STRICT_FSUB, MVT::f64, Legal); in X86TargetLowering()
680 setOperationAction(ISD::STRICT_FSUB , MVT::f80, Legal); in X86TargetLowering()
700 setOperationAction(ISD::STRICT_FSUB, MVT::f128, LibCall); in X86TargetLowering()
864 setOperationAction(ISD::STRICT_FSUB, MVT::v4f32, Legal); in X86TargetLowering()
1056 setOperationAction(ISD::STRICT_FSUB, MVT::v2f64, Legal); in X86TargetLowering()
1217 setOperationAction(ISD::STRICT_FSUB, MVT::v8f32, Legal); in X86TargetLowering()
1218 setOperationAction(ISD::STRICT_FSUB, MVT::v4f64, Legal); in X86TargetLowering()
1521 setOperationAction(ISD::STRICT_FSUB, MVT::v16f32, Legal); in X86TargetLowering()
1522 setOperationAction(ISD::STRICT_FSUB, MVT::v8f64, Legal); in X86TargetLowering()
[all …]
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenFastISel.inc9500 // FastEmit functions for ISD::STRICT_FSUB.
15138 …case ISD::STRICT_FSUB: return fastEmit_ISD_STRICT_FSUB_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKil…