| /external/llvm-project/openmp/libomptarget/deviceRTLs/nvptx/src/ |
| D | target_impl.h | 151 int32_t SrcLane) { in __kmpc_impl_shfl_sync() argument
153 return __shfl_sync(Mask, Var, SrcLane); in __kmpc_impl_shfl_sync()
155 return __shfl(Var, SrcLane); in __kmpc_impl_shfl_sync()
|
| /external/llvm-project/openmp/libomptarget/deviceRTLs/amdgcn/src/ |
| D | target_impl.h | 101 int32_t SrcLane);
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 4374 unsigned DstLane = 0, SrcLane = 0, DDst, DSrc; in setExecutionDomain() local
4376 DSrc = getCorrespondingDRegAndLane(TRI, SrcReg, SrcLane); in setExecutionDomain()
4379 if (!getImplicitSPRUseForDPRUse(TRI, MI, DSrc, SrcLane, ImplicitSReg)) in setExecutionDomain()
4391 .addImm(SrcLane); in setExecutionDomain()
4422 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
4426 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
4433 if (SrcLane == DstLane) in setExecutionDomain()
4441 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
4445 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
4452 if (SrcLane != DstLane) in setExecutionDomain()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 5026 unsigned DstLane = 0, SrcLane = 0, DDst, DSrc; in setExecutionDomain() local
5028 DSrc = getCorrespondingDRegAndLane(TRI, SrcReg, SrcLane); in setExecutionDomain()
5031 if (!getImplicitSPRUseForDPRUse(TRI, MI, DSrc, SrcLane, ImplicitSReg)) in setExecutionDomain()
5043 .addImm(SrcLane) in setExecutionDomain()
5074 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5078 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5084 if (SrcLane == DstLane) in setExecutionDomain()
5092 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5096 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5102 if (SrcLane != DstLane) in setExecutionDomain()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 5062 unsigned DstLane = 0, SrcLane = 0, DDst, DSrc; in setExecutionDomain() local
5064 DSrc = getCorrespondingDRegAndLane(TRI, SrcReg, SrcLane); in setExecutionDomain()
5067 if (!getImplicitSPRUseForDPRUse(TRI, MI, DSrc, SrcLane, ImplicitSReg)) in setExecutionDomain()
5079 .addImm(SrcLane) in setExecutionDomain()
5110 unsigned CurReg = SrcLane == 1 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5114 CurReg = SrcLane == 0 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5120 if (SrcLane == DstLane) in setExecutionDomain()
5128 CurReg = SrcLane == 1 && DstLane == 0 ? DSrc : DDst; in setExecutionDomain()
5132 CurReg = SrcLane == 0 && DstLane == 1 ? DSrc : DDst; in setExecutionDomain()
5138 if (SrcLane != DstLane) in setExecutionDomain()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 5687 int SrcLane = ShuffleMask[Anomaly]; in LowerVECTOR_SHUFFLE() local
5688 if (SrcLane >= NumInputElements) { in LowerVECTOR_SHUFFLE()
5690 SrcLane -= VT.getVectorNumElements(); in LowerVECTOR_SHUFFLE()
5692 SDValue SrcLaneV = DAG.getConstant(SrcLane, dl, MVT::i64); in LowerVECTOR_SHUFFLE()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 7354 int SrcLane = ShuffleMask[Anomaly]; in LowerVECTOR_SHUFFLE() local
7355 if (SrcLane >= NumInputElements) { in LowerVECTOR_SHUFFLE()
7357 SrcLane -= VT.getVectorNumElements(); in LowerVECTOR_SHUFFLE()
7359 SDValue SrcLaneV = DAG.getConstant(SrcLane, dl, MVT::i64); in LowerVECTOR_SHUFFLE()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 14945 int SrcLane = M / NumEltsPerLane; in lowerShuffleAsLanePermuteAndPermute() local
14947 if (!isUndefOrEqual(SrcLaneMask[DstLane], SrcLane)) in lowerShuffleAsLanePermuteAndPermute()
14949 SrcLaneMask[DstLane] = SrcLane; in lowerShuffleAsLanePermuteAndPermute()
14957 int SrcLane = SrcLaneMask[DstLane]; in lowerShuffleAsLanePermuteAndPermute() local
14958 if (0 <= SrcLane) in lowerShuffleAsLanePermuteAndPermute()
14961 (SrcLane * NumEltsPerLane) + j; in lowerShuffleAsLanePermuteAndPermute()
15621 int SrcLane = -1; in lowerShuffleAsRepeatedMaskAndLanePermute() local
15628 if ((0 <= SrcLane) && (SrcLane != Lane)) in lowerShuffleAsRepeatedMaskAndLanePermute()
15630 SrcLane = Lane; in lowerShuffleAsRepeatedMaskAndLanePermute()
15636 if (SrcLane < 0) in lowerShuffleAsRepeatedMaskAndLanePermute()
[all …]
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 8753 int SrcLane = ShuffleMask[Anomaly]; in LowerVECTOR_SHUFFLE() local
8754 if (SrcLane >= NumInputElements) { in LowerVECTOR_SHUFFLE()
8756 SrcLane -= VT.getVectorNumElements(); in LowerVECTOR_SHUFFLE()
8758 SDValue SrcLaneV = DAG.getConstant(SrcLane, dl, MVT::i64); in LowerVECTOR_SHUFFLE()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 10726 int SrcLane = -1; in isMultiLaneShuffleMask() local
10732 if (SrcLane >= 0 && SrcLane != Lane) in isMultiLaneShuffleMask()
10734 SrcLane = Lane; in isMultiLaneShuffleMask()
16411 int SrcLane = -1; in lowerShuffleAsRepeatedMaskAndLanePermute() local
16418 if ((0 <= SrcLane) && (SrcLane != Lane)) in lowerShuffleAsRepeatedMaskAndLanePermute()
16420 SrcLane = Lane; in lowerShuffleAsRepeatedMaskAndLanePermute()
16426 if (SrcLane < 0) in lowerShuffleAsRepeatedMaskAndLanePermute()
16457 int SrcSubLane = (SrcLane * SubLaneScale) + SubLane; in lowerShuffleAsRepeatedMaskAndLanePermute()
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 11081 int SrcLane = (M % NumElts) / NumLaneElts; in lowerShuffleAsRepeatedMaskAndLanePermute() local
11082 int SrcSubLane = (SrcLane * SubLaneScale) + in lowerShuffleAsRepeatedMaskAndLanePermute()
|