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Searched refs:_reg_PI_WDQLVL_INTERVAL (Results 1 – 4 of 4) sorted by relevance

/external/arm-trusted-firmware/drivers/renesas/rzg/ddr/ddr_b/
Dddr_regdef.h869 #define _reg_PI_WDQLVL_INTERVAL 0x0000035bU macro
Dboot_init_dram.c2040 ddr_setval_ach(_reg_PI_WDQLVL_INTERVAL, 0x0100U); in dbsc_regset_post()
/external/arm-trusted-firmware/drivers/renesas/rcar/ddr/ddr_b/
Dddr_regdef.h867 #define _reg_PI_WDQLVL_INTERVAL 0x0000035bU macro
Dboot_init_dram.c2503 ddr_setval_ach(_reg_PI_WDQLVL_INTERVAL, 0x0100); in dbsc_regset_post()