Home
last modified time | relevance | path

Searched refs:accesses (Results 1 – 25 of 860) sorted by relevance

12345678910>>...35

/external/python/cryptography/tests/
Dtest_cryptography_utils.py20 accesses = []
25 accesses.append(None)
31 assert len(accesses) == 1
33 assert len(accesses) == 1
37 assert len(accesses) == 2
39 assert len(accesses) == 2
42 accesses = []
47 accesses.append(None)
53 assert len(accesses) == 0
55 assert len(accesses) == 1
[all …]
/external/llvm-project/polly/test/Isl/CodeGen/MemAccess/
Dmap_scalar_access___%outer.for---%return.jscop13 "accesses" : [
24 "accesses" : [
39 "accesses" : [
54 "accesses" : [
69 "accesses" : [
Dmap_scalar_access___%outer.for---%return.jscop.transformed13 "accesses" : [
24 "accesses" : [
39 "accesses" : [
54 "accesses" : [
69 "accesses" : [
Dupdate_access_functions___%loop1---%exit.jscop6 "accesses" : [
17 "accesses" : [
32 "accesses" : [
Dupdate_access_functions___%loop1---%exit.jscop.transformed6 "accesses" : [
17 "accesses" : [
32 "accesses" : [
Dsimple___%for.cond---%for.end14.jscop.transformed6 "accesses" : [
17 "accesses" : [
Dsimple___%for.cond---%for.end14.jscop6 "accesses" : [
17 "accesses" : [
/external/llvm-project/llvm/test/Transforms/LoopVectorize/
Dinterleaved-accesses-masked-group.ll2 …force-vector-width=8 -force-vector-interleave=1 -enable-interleaved-mem-accesses -debug-only=loop-…
3 … -force-vector-interleave=1 -enable-interleaved-mem-accesses -enable-masked-interleaved-mem-access…
8 ; predicated memory accesses only if they are both in the same (predicated)
10 ; If the accesses are not in the same predicated block, an interleave-group
34 ; STRIDED_UNMASKED: LV: Analyzing interleaved accesses...
38 ; STRIDED_MASKED: LV: Analyzing interleaved accesses...
49 ; stores (if masked-interleaved-accesses are enabled) and these are later
51 ; If masked-interleaved-accesses is not enabled we create only one interleave
68 ; STRIDED_UNMASKED: LV: Analyzing interleaved accesses...
74 ; STRIDED_MASKED: LV: Analyzing interleaved accesses...
[all …]
/external/llvm-project/polly/test/Simplify/
Dgemm___%bb3---%bb28.jscop23 "accesses" : [
38 "accesses" : [
57 "accesses" : [
80 "accesses" : [
95 "accesses" : [
Dgemm___%bb3---%bb28.jscop.transformed23 "accesses" : [
38 "accesses" : [
57 "accesses" : [
80 "accesses" : [
95 "accesses" : [
Dredundant_region_scalar___%for---%return.jscop13 "accesses" : [
28 "accesses" : [
47 "accesses" : [
Dredundant_region_scalar___%for---%return.jscop.transformed13 "accesses" : [
28 "accesses" : [
47 "accesses" : [
Ddead_access_phi.ll5 ; (accesses that are effectively not used)
45 ; CHECK: Dead accesses removed: 2
50 ; CHECK: After accesses {
Ddead_access_value.ll5 ; (accesses that are effectively not used)
47 ; CHECK: Dead accesses removed: 2
52 ; CHECK: After accesses {
/external/llvm-project/polly/test/Isl/CodeGen/
Dload_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop.transformed18 "accesses" : [
33 "accesses" : [
44 "accesses" : [
59 "accesses" : [
Dload_subset_with_context___%for.cond7.preheader---%for.cond33.preheader.jscop18 "accesses" : [
33 "accesses" : [
44 "accesses" : [
59 "accesses" : [
Dpartial_write_impossible_restriction___%for.body344---%if.then.i.i1141.loopexit.jscop18 "accesses" : [
29 "accesses" : [
44 "accesses" : [
Dpartial_write_impossible_restriction___%for.body344---%if.then.i.i1141.loopexit.jscop.transformed18 "accesses" : [
29 "accesses" : [
44 "accesses" : [
Dpartial_write_mapped_vector___%for---%return.jscop13 "accesses" : [
24 "accesses" : [
/external/compiler-rt/lib/tsan/rtl/
Dtsan_flags.inc42 "Report races between atomic and plain memory accesses.")
66 "Per-thread history size, controls how many previous memory accesses "
68 "history_size=0 amounts to 32K memory accesses. Each next value doubles "
69 "the amount of memory accesses, up to history_size=7 that amounts to "
70 "4M memory accesses. The default value is 2 (128K memory accesses).")
/external/llvm-project/compiler-rt/lib/tsan/rtl/
Dtsan_flags.inc41 "Report races between atomic and plain memory accesses.")
66 "Per-thread history size, controls how many previous memory accesses "
68 "history_size=0 amounts to 32K memory accesses. Each next value doubles "
69 "the amount of memory accesses, up to history_size=7 that amounts to "
70 "4M memory accesses. The default value is 2 (128K memory accesses).")
/external/llvm-project/llvm/test/CodeGen/SystemZ/
Dunaligned-01.ll1 ; Check that unaligned accesses are allowed in general. We check the
22 ; Check that unaligned 2-byte accesses are allowed.
33 ; Check that unaligned 4-byte accesses are allowed.
47 ; Check that unaligned 8-byte accesses are allowed.
/external/llvm/test/CodeGen/SystemZ/
Dunaligned-01.ll1 ; Check that unaligned accesses are allowed in general. We check the
25 ; Check that unaligned 2-byte accesses are allowed.
36 ; Check that unaligned 4-byte accesses are allowed.
50 ; Check that unaligned 8-byte accesses are allowed.
/external/llvm-project/mlir/test/Dialect/Linalg/
Dfold-unit-trip-loops.mlir3 #accesses = [
10 indexing_maps = #accesses,
83 #accesses = [
89 indexing_maps = #accesses,
Ddrop-unit-extent-dims.mlir3 #accesses = [
10 indexing_maps = #accesses,
39 #accesses = [
46 indexing_maps = #accesses,
135 #accesses = [
141 indexing_maps = #accesses,
163 #accesses = [
170 indexing_maps = #accesses,
201 #accesses = [
207 indexing_maps = #accesses,

12345678910>>...35