/external/arm-trusted-firmware/plat/intel/soc/common/aarch64/ |
D | platform_common.c | 42 unsigned long el_status; in socfpga_get_spsr_for_bl33_entry() local 47 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in socfpga_get_spsr_for_bl33_entry() 48 el_status &= ID_AA64PFR0_ELX_MASK; in socfpga_get_spsr_for_bl33_entry() 50 mode = (el_status) ? MODE_EL2 : MODE_EL1; in socfpga_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/marvell/armada/common/aarch64/ |
D | marvell_common.c | 110 unsigned long el_status; in marvell_get_spsr_for_bl33_entry() local 115 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in marvell_get_spsr_for_bl33_entry() 116 el_status &= ID_AA64PFR0_ELX_MASK; in marvell_get_spsr_for_bl33_entry() 118 mode = (el_status) ? MODE_EL2 : MODE_EL1; in marvell_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/imx/imx8m/imx8mm/ |
D | imx8mm_bl31_setup.c | 63 unsigned long el_status; in get_spsr_for_bl33_entry() local 68 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry() 69 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry() 71 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/imx/imx8m/imx8mp/ |
D | imx8mp_bl31_setup.c | 61 unsigned long el_status; in get_spsr_for_bl33_entry() local 66 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry() 67 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry() 69 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/hisilicon/poplar/ |
D | bl2_plat_setup.c | 60 unsigned long el_status; in poplar_get_spsr_for_bl33_entry() local 65 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in poplar_get_spsr_for_bl33_entry() 66 el_status &= ID_AA64PFR0_ELX_MASK; in poplar_get_spsr_for_bl33_entry() 68 mode = (el_status) ? MODE_EL2 : MODE_EL1; in poplar_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/imx/imx8m/imx8mn/ |
D | imx8mn_bl31_setup.c | 63 unsigned long el_status; in get_spsr_for_bl33_entry() local 68 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry() 69 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry() 71 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/intel/soc/stratix10/ |
D | bl2_plat_setup.c | 136 unsigned long el_status; in get_spsr_for_bl33_entry() local 141 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry() 142 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry() 144 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/intel/soc/agilex/ |
D | bl2_plat_setup.c | 140 unsigned long el_status; in get_spsr_for_bl33_entry() local 145 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry() 146 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry() 148 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/socionext/synquacer/ |
D | sq_bl31_setup.c | 50 unsigned long el_status; in sq_get_spsr_for_bl33_entry() local 55 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in sq_get_spsr_for_bl33_entry() 56 el_status &= ID_AA64PFR0_ELX_MASK; in sq_get_spsr_for_bl33_entry() 58 mode = (el_status) ? MODE_EL2 : MODE_EL1; in sq_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/ti/k3/common/ |
D | k3_bl31_setup.c | 45 unsigned long el_status; in k3_get_spsr_for_bl33_entry() local 50 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in k3_get_spsr_for_bl33_entry() 51 el_status &= ID_AA64PFR0_ELX_MASK; in k3_get_spsr_for_bl33_entry() 53 mode = (el_status) ? MODE_EL2 : MODE_EL1; in k3_get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/imx/imx8m/imx8mq/ |
D | imx8mq_bl31_setup.c | 91 unsigned long el_status; in get_spsr_for_bl33_entry() local 96 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry() 97 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry() 99 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/imx/imx8qx/ |
D | imx8qx_bl31_setup.c | 86 unsigned long el_status; in get_spsr_for_bl33_entry() local 91 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry() 92 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry() 94 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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/external/arm-trusted-firmware/plat/imx/imx8qm/ |
D | imx8qm_bl31_setup.c | 75 unsigned long el_status; in get_spsr_for_bl33_entry() local 80 el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; in get_spsr_for_bl33_entry() 81 el_status &= ID_AA64PFR0_ELX_MASK; in get_spsr_for_bl33_entry() 83 mode = (el_status) ? MODE_EL2 : MODE_EL1; in get_spsr_for_bl33_entry()
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