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Searched refs:is128BitVector (Results 1 – 25 of 40) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DValueTypes.h153 bool is128BitVector() const { in is128BitVector() function
154 return isSimple() ? V.is128BitVector() : isExtended128BitVector(); in is128BitVector()
DMachineValueType.h248 bool is128BitVector() const { in is128BitVector() function
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.h182 bool is128BitVector() const { in is128BitVector() function
183 return isSimple() ? V.is128BitVector() : isExtended128BitVector(); in is128BitVector()
/external/llvm-project/llvm/include/llvm/CodeGen/
DValueTypes.h177 bool is128BitVector() const { in is128BitVector() function
178 return isSimple() ? V.is128BitVector() : isExtended128BitVector(); in is128BitVector()
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.h98 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64CallingConvention.cpp99 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
DAArch64TargetTransformInfo.cpp648 LT.second.is128BitVector() && (!Alignment || *Alignment < Align(16))) { in getMemoryOpCost()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64CallingConvention.cpp146 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
DAArch64TargetTransformInfo.cpp793 LT.second.is128BitVector() && (!Alignment || *Alignment < Align(16))) { in getMemoryOpCost()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp2625 else if (RegVT.is128BitVector()) in LowerFormalArguments()
3116 else if (RegVT.is128BitVector()) { in LowerCall()
4393 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector() || in getZeroVector()
4401 if (!Subtarget.hasSSE2() && VT.is128BitVector()) { in getZeroVector()
4499 assert(Vec.getValueType().is128BitVector() && "Unexpected vector size!"); in insert128BitVector()
4681 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()) && in getOnesVector()
4699 assert(VT.is128BitVector() && "Expected a 128-bit vector type"); in getUnpackl()
4712 assert(VT.is128BitVector() && "Expected a 128-bit vector type"); in getUnpackh()
5389 if (!VT.is128BitVector()) in LowerBuildVectorv4x32()
5473 assert(VT.is128BitVector() && "Unknown type for VShift"); in getVShift()
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/external/llvm-project/llvm/lib/Target/X86/
DX86ISelLowering.cpp3653 else if (RegVT.is128BitVector()) in LowerFormalArguments()
4052 else if (RegVT.is128BitVector()) { in LowerCall()
5787 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector() || in getZeroVector()
5795 if (!Subtarget.hasSSE2() && VT.is128BitVector()) { in getZeroVector()
5887 assert(Vec.getValueType().is128BitVector() && "Unexpected vector size!"); in insert128BitVector()
6251 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()) && in getOnesVector()
8134 if (!VT.is128BitVector()) in LowerBuildVectorv4x32()
8219 assert(VT.is128BitVector() && "Unknown type for VShift"); in getVShift()
8538 ((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()))) { in EltsFromConsecutiveLoads()
8562 (VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector())) { in EltsFromConsecutiveLoads()
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DX86ISelDAGToDAG.cpp540 if (OpVT.is256BitVector() || OpVT.is128BitVector()) in isLegalMaskCompare()
4074 if (NVT.is128BitVector()) in matchVPTERNLOG()
4084 if (NVT.is128BitVector()) in matchVPTERNLOG()
4104 if (NVT.is128BitVector()) in matchVPTERNLOG()
4420 unsigned Scale = CmpVT.is128BitVector() ? 4 : 2; in tryVPTESTM()
4421 unsigned SubReg = CmpVT.is128BitVector() ? X86::sub_xmm : X86::sub_ymm; in tryVPTESTM()
4694 if (NVT.is512BitVector() || NVT.is256BitVector() || NVT.is128BitVector() || in Select()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp3432 else if (RegVT.is128BitVector()) in LowerFormalArguments()
3954 else if (RegVT.is128BitVector()) { in LowerCall()
5596 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector() || in getZeroVector()
5604 if (!Subtarget.hasSSE2() && VT.is128BitVector()) { in getZeroVector()
5696 assert(Vec.getValueType().is128BitVector() && "Unexpected vector size!"); in insert128BitVector()
5992 assert((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()) && in getOnesVector()
7843 if (!VT.is128BitVector()) in LowerBuildVectorv4x32()
7928 assert(VT.is128BitVector() && "Unknown type for VShift"); in getVShift()
8246 ((VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector()))) { in EltsFromConsecutiveLoads()
8268 (VT.is128BitVector() || VT.is256BitVector() || VT.is512BitVector())) { in EltsFromConsecutiveLoads()
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DX86ISelDAGToDAG.cpp551 if (OpVT.is256BitVector() || OpVT.is128BitVector()) in isLegalMaskCompare()
4300 unsigned Scale = CmpVT.is128BitVector() ? 4 : 2; in tryVPTESTM()
4301 unsigned SubReg = CmpVT.is128BitVector() ? X86::sub_xmm : X86::sub_ymm; in tryVPTESTM()
4511 if (NVT.is512BitVector() || NVT.is256BitVector() || NVT.is128BitVector() || in Select()
/external/llvm-project/llvm/lib/Target/Mips/
DMipsSEISelDAGToDAG.cpp877 assert(Node->getValueType(0).is128BitVector()); in trySelect()
1064 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in trySelect()
DMipsSEISelLowering.cpp605 if (!Ty.is128BitVector()) in performORCombine()
1002 if (Subtarget.hasMSA() && Ty.is128BitVector() && Ty.isInteger()) { in performXORCombine()
2416 if (!VecTy.is128BitVector()) in lowerEXTRACT_VECTOR_ELT()
2468 if (!Subtarget.hasMSA() || !ResTy.is128BitVector()) in lowerBUILD_VECTOR()
2989 if (!ResTy.is128BitVector()) in lowerVECTOR_SHUFFLE()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp671 if (!Ty.is128BitVector()) in performORCombine()
987 if (Ty.is128BitVector() && Ty.isInteger()) { in performVSELECTCombine()
1044 if (Subtarget.hasMSA() && Ty.is128BitVector() && Ty.isInteger()) { in performXORCombine()
2303 if (!VecTy.is128BitVector()) in lowerEXTRACT_VECTOR_ELT()
2355 if (!Subtarget.hasMSA() || !ResTy.is128BitVector()) in lowerBUILD_VECTOR()
2876 if (!ResTy.is128BitVector()) in lowerVECTOR_SHUFFLE()
DMipsSEISelDAGToDAG.cpp909 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in trySelect()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h349 bool is128BitVector() const { in is128BitVector() function
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp605 if (!Ty.is128BitVector()) in performORCombine()
1002 if (Subtarget.hasMSA() && Ty.is128BitVector() && Ty.isInteger()) { in performXORCombine()
2417 if (!VecTy.is128BitVector()) in lowerEXTRACT_VECTOR_ELT()
2469 if (!Subtarget.hasMSA() || !ResTy.is128BitVector()) in lowerBUILD_VECTOR()
2990 if (!ResTy.is128BitVector()) in lowerVECTOR_SHUFFLE()
DMipsSEISelDAGToDAG.cpp991 if (!Subtarget->hasMSA() || !BVN->getValueType(0).is128BitVector()) in trySelect()
/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h380 bool is128BitVector() const { in is128BitVector() function
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.cpp1777 assert(VecType.is128BitVector() && "Unexpected shuffle vector type"); in LowerVECTOR_SHUFFLE()
1912 if (!SrcType.is128BitVector() || in performVECTOR_SHUFFLECombine()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp4510 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in getZeroVector()
5662 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
5673 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
6065 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
6416 assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && in LowerCONCAT_VECTORS()
6534 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in AddRequiredExtensionForVMULL()
6639 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
9149 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
9243 DAG, dl, VbicVT, VT.is128BitVector(), in PerformANDCombine()
9285 DAG, dl, VorrVT, VT.is128BitVector(), in PerformORCombine()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp5838 EVT VmovVT = VT.is128BitVector() ? MVT::v4i32 : MVT::v2i32; in getZeroVector()
7171 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
7183 DAG, dl, VmovVT, VT.is128BitVector(), in LowerBUILD_VECTOR()
7331 if (ST->hasNEON() && VT.is128BitVector() && VT != MVT::v2f64 && VT != MVT::v4f32) { in LowerBUILD_VECTOR()
7623 (VT.is128BitVector() || VT.is64BitVector())) { in isShuffleMaskLegal()
8303 assert(Op.getValueType().is128BitVector() && Op.getNumOperands() == 2 && in LowerCONCAT_VECTORS()
8458 assert(ExtTy.is128BitVector() && "Unexpected extension size"); in AddRequiredExtensionForVMULL()
8573 assert(VT.is128BitVector() && VT.isInteger() && in LowerMUL()
11153 !N0.getValueType().is128BitVector()) in AddCombineVUZPToVPADDL()
12001 if (VT.is64BitVector() || VT.is128BitVector()) in PerformMULCombine()
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