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Searched refs:nxv8i32 (Results 1 – 18 of 18) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/AArch64/
Dsve-intrinsics-insert-extract-tuple.ll24 …%tuple = call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 x i32…
25 …%ins = call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32(<vscale x 8 x i32> %tup…
26 %ext = call <vscale x 4 x i32> @llvm.aarch64.sve.tuple.get.nxv8i32(<vscale x 8 x i32> %ins, i32 0)
39 …%tuple = call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 x i32…
40 …%ins = call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32(<vscale x 8 x i32> %tup…
41 %ext = call <vscale x 4 x i32> @llvm.aarch64.sve.tuple.get.nxv8i32(<vscale x 8 x i32> %ins, i32 1)
55 …%tuple = call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 x i32…
56 …%ins = call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32(<vscale x 8 x i32> %tup…
57 %ext = call <vscale x 4 x i32> @llvm.aarch64.sve.tuple.get.nxv8i32(<vscale x 8 x i32> %ins, i32 0)
66 …%ext = call <vscale x 4 x i32> @llvm.aarch64.sve.tuple.get.nxv8i32(<vscale x 8 x i32> %tuple, i32 …
[all …]
Dsve-split-int-reduce.ll29 %res = call i32 @llvm.vector.reduce.and.nxv8i32(<vscale x 8 x i32> %a)
83 %res = call i32 @llvm.vector.reduce.xor.nxv8i32(<vscale x 8 x i32> %a)
178 %res = call i32 @llvm.vector.reduce.smin.nxv8i32(<vscale x 8 x i32> %a)
213 declare i32 @llvm.vector.reduce.and.nxv8i32(<vscale x 8 x i32>)
219 declare i32 @llvm.vector.reduce.xor.nxv8i32(<vscale x 8 x i32>)
229 declare i32 @llvm.vector.reduce.smin.nxv8i32(<vscale x 8 x i32>)
Dsve-split-store.ll108 …call void @llvm.masked.store.nxv8i32(<vscale x 8 x i32> %data, <vscale x 8 x i32> *%a, i32 1, <vsc…
136 declare void @llvm.masked.store.nxv8i32(<vscale x 8 x i32>, <vscale x 8 x i32>*, i32, <vscale x 8 x…
Dsve-intrinsics-ldN-reg+reg-addr-mode.ll46 define <vscale x 8 x i32> @ld2.nxv8i32(<vscale x 4 x i1> %Pg, i32 *%addr, i64 %a) {
47 ; CHECK-LABEL: ld2.nxv8i32:
51 %res = call <vscale x 8 x i32> @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1.p0i32(<vscale x 4 x i1> %Pg, i3…
237 declare <vscale x 8 x i32> @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1.p0i32(<vscale x 4 x i1>, i32*)
Dsve-split-load.ll120 …%load = call <vscale x 8 x i32> @llvm.masked.load.nxv8i32(<vscale x 8 x i32> *%a, i32 1, <vscale x…
148 declare <vscale x 8 x i32> @llvm.masked.load.nxv8i32(<vscale x 8 x i32>*, i32, <vscale x 8 x i1>, <…
Dsve-intrinsics-create-tuple.ll139 …%tuple = tail call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 …
144 …%extract = tail call <vscale x 4 x i32> @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32(<vscale x 8 x …
153 …%tuple = tail call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 …
158 …%extract = tail call <vscale x 4 x i32> @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32(<vscale x 8 x …
760 declare <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 x i32>, <vs…
790 declare <vscale x 4 x i32> @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32(<vscale x 8 x i32>, i32 imma…
Dsve-intrinsics-ldN-reg+imm-addr-mode.ll109 define <vscale x 8 x i32> @ld2.nxv8i32(<vscale x 4 x i1> %Pg, <vscale x 4 x i32>* %addr) {
110 ; CHECK-LABEL: ld2.nxv8i32:
115 %res = call <vscale x 8 x i32> @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1.p0i32(<vscale x 4 x i1> %Pg, i3…
473 declare <vscale x 8 x i32> @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1.p0i32(<vscale x 4 x i1>, i32*)
Dsve-calling-convention-tuple-types.ll62 …%tuple = tail call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 …
71 …%tuple = tail call <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 …
484 declare <vscale x 8 x i32> @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32(<vscale x 4 x i32>, <vsc…
Dsve-intrinsics-loads.ll333 …%res = call <vscale x 8 x i32> @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1.p0i32(<vscale x 4 x i1> %pred,…
546 declare <vscale x 8 x i32> @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1.p0i32(<vscale x 4 x i1>, i32*)
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DMachineValueType.h174 nxv8i32 = 109, // n x 8 x i32 enumerator
492 case nxv8i32: in getVectorElementType()
609 case nxv8i32: in getVectorNumElements()
786 case nxv8i32: in getSizeInBits()
1050 if (NumElements == 8) return MVT::nxv8i32; in getScalableVectorVT()
/external/llvm-project/llvm/include/llvm/Support/
DMachineValueType.h195 nxv8i32 = 130, // n x 8 x i32 enumerator
561 case nxv8i32: in getVectorElementType()
721 case nxv8i32: in getVectorNumElements()
921 case nxv8i32: in getSizeInBits()
1259 if (NumElements == 8) return MVT::nxv8i32; in getScalableVectorVT()
/external/llvm-project/llvm/lib/Target/RISCV/Utils/
DRISCVBaseInfo.h297 constexpr MVT vint32m4_t = MVT::nxv8i32;
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVRegisterInfo.td283 // i32 N/A N/A nxv1i32 nxv2i32 nxv4i32 nxv8i32 nxv16i32
309 defvar vint32m4_t = nxv8i32;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DValueTypes.cpp275 case MVT::nxv8i32: in getTypeForEVT()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DValueTypes.td140 def nxv8i32 : ValueType<256, 109>; // n x 8 x i32 vector value
/external/llvm-project/llvm/include/llvm/CodeGen/
DValueTypes.td162 def nxv8i32 : ValueType<256, 130>; // n x 8 x i32 vector value
/external/llvm-project/llvm/lib/CodeGen/
DValueTypes.cpp428 case MVT::nxv8i32: in getTypeForEVT()
/external/llvm-project/llvm/utils/TableGen/
DCodeGenTarget.cpp196 case MVT::nxv8i32: return "MVT::nxv8i32"; in getEnumName()