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/external/llvm-project/llvm/test/MC/Mips/
Dmips-hwr-register-names.s11 # CHECK-NEXT: rdhwr $4, $hwr_cpunum
13 rdhwr $a0,$hwr_cpunum
16 # CHECK-NEXT: rdhwr $4, $hwr_cpunum
18 rdhwr $a0,$0
22 # CHECK-NEXT: rdhwr $5, $hwr_synci_step
24 rdhwr $a1,$hwr_synci_step
27 # CHECK-NEXT: rdhwr $5, $hwr_synci_step
29 rdhwr $a1,$1
33 # CHECK-NEXT: rdhwr $6, $hwr_cc
35 rdhwr $a2,$hwr_cc
[all …]
Dmicromips-control-instructions.s16 # CHECK-EL: rdhwr $5, $29 # encoding: [0xbd,0x00,0x3c,0x6b]
61 # CHECK-EB: rdhwr $5, $29 # encoding: [0x00,0xbd,0x6b,0x3c]
91 rdhwr $5, $29
Dmips64-alu-instructions.s90 # CHECK: rdhwr $5, $29
113 rdhwr $5, $29
Dmips-alu-instructions.s97 # CHECK: rdhwr $5, $29
120 rdhwr $5, $29
/external/llvm/test/MC/Mips/
Dmips-hwr-register-names.s11 # CHECK-NEXT: rdhwr $4, $hwr_cpunum
13 rdhwr $a0,$hwr_cpunum
16 # CHECK-NEXT: rdhwr $4, $hwr_cpunum
18 rdhwr $a0,$0
22 # CHECK-NEXT: rdhwr $5, $hwr_synci_step
24 rdhwr $a1,$hwr_synci_step
27 # CHECK-NEXT: rdhwr $5, $hwr_synci_step
29 rdhwr $a1,$1
33 # CHECK-NEXT: rdhwr $6, $hwr_cc
35 rdhwr $a2,$hwr_cc
[all …]
Dmicromips-control-instructions.s16 # CHECK-EL: rdhwr $5, $29 # encoding: [0xbd,0x00,0x3c,0x6b]
58 # CHECK-EB: rdhwr $5, $29 # encoding: [0x00,0xbd,0x6b,0x3c]
96 rdhwr $5, $29
Dmips64-alu-instructions.s90 # CHECK: rdhwr $5, $29
113 rdhwr $5, $29
Dmips-alu-instructions.s97 # CHECK: rdhwr $5, $29
120 rdhwr $5, $29
/external/llvm-project/llvm/test/CodeGen/Mips/
Dtls.ll51 ; STATIC32: rdhwr $3, $29{{$}}
58 ; STATIC64: rdhwr $3, $29{{$}}
104 ; STATIC32: rdhwr $3, $29{{$}}
112 ; STATIC64: rdhwr $3, $29{{$}}
Drdhwr-directives.ll9 ; CHECK: rdhwr
Dmicromips-rdhwr-directives.ll10 ; CHECK: rdhwr
Dthread-pointer.ll9 ; CHECK: rdhwr $3, $29
/external/llvm/test/CodeGen/Mips/
Dtls.ll26 ; STATIC: rdhwr $3, $29
54 ; STATIC: rdhwr $3, $29
Drdhwr-directives.ll9 ; CHECK: rdhwr
Dmicromips-rdhwr-directives.ll10 ; CHECK: rdhwr
Dthread-pointer.ll9 ; CHECK: rdhwr $3, $29
/external/llvm-project/llvm/test/MC/Mips/micromips/
Dvalid.s146 rdhwr $5, $29, 2 # CHECK: rdhwr $5, $29, 2 # encoding: [0x00,0xbd,0x6b,0x3c] label
148 rdhwr $5, $29, 0 # CHECK: rdhwr $5, $29 # encoding: [0x00,0xbd,0x6b,0x3c] label
150 rdhwr $5, $29 # CHECK: rdhwr $5, $29 # encoding: [0x00,0xbd,0x6b,0x3c] label
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s125 rdhwr $5, $29, 2 # CHECK: rdhwr $5, $29, 2 # encoding: [0x00,0xbd,0x11,0xc0]
126 rdhwr $5, $29, 0 # CHECK: rdhwr $5, $29 # encoding: [0x00,0xbd,0x01,0xc0]
127 rdhwr $5, $29 # CHECK: rdhwr $5, $29 # encoding: [0x00,0xbd,0x01,0xc0]
/external/llvm-project/llvm/test/MC/Mips/micromips32r6/
Dvalid.s157 rdhwr $5, $29, 2 # CHECK: rdhwr $5, $29, 2 # encoding: [0x00,0xbd,0x11,0xc0]
159 rdhwr $5, $29, 0 # CHECK: rdhwr $5, $29 # encoding: [0x00,0xbd,0x01,0xc0]
161 rdhwr $5, $29 # CHECK: rdhwr $5, $29 # encoding: [0x00,0xbd,0x01,0xc0]
/external/llvm/test/MC/Mips/mips32r5/
Dvalid.s163 rdhwr $sp,$11 # CHECK: .set push
165 # CHECK-NEXT: rdhwr $sp, $11
/external/llvm/test/MC/Mips/mips32r3/
Dvalid.s162 rdhwr $sp,$11 # CHECK: .set push
164 # CHECK-NEXT: rdhwr $sp, $11
/external/llvm/test/MC/Mips/mips32r2/
Dvalid.s162 rdhwr $sp,$11 # CHECK: .set push
164 # CHECK-NEXT: rdhwr $sp, $11
/external/llvm/lib/Target/Mips/
DMipsScheduleP5600.td140 // ehb, rdhwr, rdpgpr, wrpgpr, wsbh
377 // addq.ph, rdhwr, repl.ph, repl.qb, subq.ph, subu_s.qb
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s230 rdhwr $sp,$11 # CHECK: .set push
232 # CHECK-NEXT: rdhwr $sp, $11
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s229 rdhwr $sp,$11 # CHECK: .set push
231 # CHECK-NEXT: rdhwr $sp, $11

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