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Searched refs:shift_imm (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/subzero/src/DartARM32/
Dassembler_arm.h158 Operand(Register rm, Shift shift, uint32_t shift_imm) {
159 ASSERT(shift_imm < (1 << kShiftImmBits));
161 encoding_ = shift_imm << kShiftImmShift |
298 Address(Register rn, Register rm, Shift shift = LSL, uint32_t shift_imm = 0,
300 Operand o(rm, shift, shift_imm);
302 if ((shift == LSL) && (shift_imm == 0)) {
993 void Lsl(Register rd, Register rm, const Operand& shift_imm,
998 void Lsr(Register rd, Register rm, const Operand& shift_imm,
1003 void Asr(Register rd, Register rm, const Operand& shift_imm,
1008 void Asrs(Register rd, Register rm, const Operand &shift_imm,
[all …]
Dassembler_arm.cc2445 void Assembler::Lsl(Register rd, Register rm, const Operand& shift_imm,
2447 ASSERT(shift_imm.type() == 1);
2448 ASSERT(shift_imm.encoding() != 0); // Do not use Lsl if no shift is wanted.
2449 mov(rd, Operand(rm, LSL, shift_imm.encoding()), cond);
2458 void Assembler::Lsr(Register rd, Register rm, const Operand& shift_imm,
2460 ASSERT(shift_imm.type() == 1);
2461 uint32_t shift = shift_imm.encoding();
2475 void Assembler::Asr(Register rd, Register rm, const Operand& shift_imm,
2477 ASSERT(shift_imm.type() == 1);
2478 uint32_t shift = shift_imm.encoding();
[all …]
/external/pcre/dist2/src/sljit/
DsljitNativeARM_32.c1124 if (compiler->shift_imm != 0x20) { \
1128 if (compiler->shift_imm != 0) \
1130 RD(dst) | (compiler->shift_imm << 7) | (opcode << 5) | RM(src2)); \
1844 compiler->shift_imm = src2w & 0x1f; in sljit_emit_op2()
1848 compiler->shift_imm = 0x20; in sljit_emit_op2()
DsljitLir.h442 sljit_uw shift_imm; member
/external/llvm/lib/Target/ARM/
DARMInstrInfo.td526 // shift_imm: An integer that encodes a shift amount and the type of shift
536 def shift_imm : Operand<i32> {
3652 (ins imm1_32:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
3681 (ins imm0_31:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstrInfo.td725 // shift_imm: An integer that encodes a shift amount and the type of shift
735 def shift_imm : Operand<i32> {
4011 (ins imm1_32:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
4042 (ins imm0_31:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstrInfo.td612 // shift_imm: An integer that encodes a shift amount and the type of shift
622 def shift_imm : Operand<i32> {
3878 (ins imm1_32:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
3909 (ins imm0_31:$sat_imm, GPRnopc:$Rn, shift_imm:$sh),
/external/vixl/test/aarch32/
Dtest-assembler-aarch32.cc775 TEST(shift_imm) { in TEST() argument
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenInstrInfo.inc14738 shift_imm = 209,
20859 …OpTypes::GPRnopc, OpTypes::imm1_32, OpTypes::GPRnopc, OpTypes::shift_imm, OpTypes::i32imm, OpTypes…
20970 …OpTypes::GPRnopc, OpTypes::imm0_31, OpTypes::GPRnopc, OpTypes::shift_imm, OpTypes::i32imm, OpTypes…