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/external/llvm-project/llvm/test/MC/VE/
DVBRD.s6 # CHECK-INST: vbrd %v11, 23
8 vbrd %v11, 23
10 # CHECK-INST: vbrd %v11, %s12, %vm15
12 vbrd %v11, %s12, %vm15
18 # CHECK-INST: vbrdl %v11, 23
20 vbrdl %v11, 23
22 # CHECK-INST: vbrdl %v11, %s12, %vm15
24 vbrdl %v11, %s12, %vm15
30 # CHECK-INST: vbrdu %v11, 23
32 vbrdu %v11, 23
[all …]
DVCMS.s6 # CHECK-INST: vmaxs.w.sx %v11, %s20, %v22
8 vmaxs.w.sx %v11, %s20, %v22
22 # CHECK-INST: pvmaxs.lo %v11, 63, %v22, %vm11
24 pvmaxs.lo %v11, 63, %v22, %vm11
26 # CHECK-INST: vmaxs.w.sx %v11, 63, %v22, %vm11
28 pvmaxs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvmaxs.lo %v11, 63, %v22, %vm11
32 pvmaxs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvmaxs.up %v11, %vix, %v22, %vm11
36 pvmaxs.up %v11, %vix, %v22, %vm11
[all …]
DVCMX.s6 # CHECK-INST: vmaxs.l %v11, %s20, %v22
8 vmaxs.l %v11, %s20, %v22
18 # CHECK-INST: vmaxs.l %v11, 63, %v22, %vm11
20 vmaxs.l %v11, 63, %v22, %vm11
22 # CHECK-INST: vmaxs.l %v11, %v23, %v22, %vm11
24 vmaxs.l %v11, %v23, %v22, %vm11
26 # CHECK-INST: vmins.l %v11, %s20, %v22
28 vmins.l %v11, %s20, %v22
38 # CHECK-INST: vmins.l %v11, 63, %v22, %vm11
40 vmins.l %v11, 63, %v22, %vm11
[all …]
DVFCM.s6 # CHECK-INST: vfmax.d %v11, %s20, %v22
8 vfmax.d %v11, %s20, %v22
18 # CHECK-INST: pvfmax.up %v11, 63, %v22, %vm11
20 pvfmax.up %v11, 63, %v22, %vm11
22 # CHECK-INST: pvfmax.up %v11, %vix, %v22, %vm11
24 pvfmax.up %v11, %vix, %v22, %vm11
30 # CHECK-INST: vfmin.d %v11, %s20, %v22
32 vfmin.d %v11, %s20, %v22
42 # CHECK-INST: pvfmin.up %v11, 63, %v22, %vm11
44 pvfmin.up %v11, 63, %v22, %vm11
[all …]
DVST.s6 # CHECK-INST: vst %v11, 23, %s12
8 vst %v11, 23, %s12
22 # CHECK-INST: vst %v11, 23, %s12
24 vst %v11, 23, %s12, %vm0
38 # CHECK-INST: vstu %v11, 23, %s12
40 vstu %v11, 23, %s12
54 # CHECK-INST: vstu %v11, 23, %s12
56 vstu %v11, 23, %s12, %vm0
70 # CHECK-INST: vstl %v11, 23, %s12
72 vstl %v11, 23, %s12
[all …]
DVCPS.s6 # CHECK-INST: vcmps.w.sx %v11, %s20, %v22
8 vcmps.w.sx %v11, %s20, %v22
22 # CHECK-INST: pvcmps.lo %v11, 63, %v22, %vm11
24 pvcmps.lo %v11, 63, %v22, %vm11
26 # CHECK-INST: vcmps.w.sx %v11, 63, %v22, %vm11
28 pvcmps.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvcmps.lo %v11, 63, %v22, %vm11
32 pvcmps.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvcmps.up %v11, %vix, %v22, %vm11
36 pvcmps.up %v11, %vix, %v22, %vm11
DVSBS.s6 # CHECK-INST: vsubs.w.sx %v11, %s20, %v22
8 vsubs.w.sx %v11, %s20, %v22
22 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
24 pvsubs.lo %v11, 63, %v22, %vm11
26 # CHECK-INST: vsubs.w.sx %v11, 63, %v22, %vm11
28 pvsubs.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvsubs.lo %v11, 63, %v22, %vm11
32 pvsubs.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvsubs.up %v11, %vix, %v22, %vm11
36 pvsubs.up %v11, %vix, %v22, %vm11
DVADS.s6 # CHECK-INST: vadds.w.sx %v11, %s20, %v22
8 vadds.w.sx %v11, %s20, %v22
22 # CHECK-INST: pvadds.lo %v11, 63, %v22, %vm11
24 pvadds.lo %v11, 63, %v22, %vm11
26 # CHECK-INST: vadds.w.sx %v11, 63, %v22, %vm11
28 pvadds.lo.sx %v11, 63, %v22, %vm11
30 # CHECK-INST: pvadds.lo %v11, 63, %v22, %vm11
32 pvadds.lo.zx %v11, 63, %v22, %vm11
34 # CHECK-INST: pvadds.up %v11, %vix, %v22, %vm11
36 pvadds.up %v11, %vix, %v22, %vm11
DVMV.s6 # CHECK-INST: vmv %v11, 23, %v11
8 vmv %v11, 23, %v11
10 # CHECK-INST: vmv %v11, %s12, %vix, %vm15
12 vmv %v11, %s12, %vix, %vm15
DVROR.s6 # CHECK-INST: vror %v11, %v22
8 vror %v11, %v22
14 # CHECK-INST: vror %v11, %v22, %vm11
16 vror %v11, %v22, %vm11
18 # CHECK-INST: vror %v11, %vix, %vm15
20 vror %v11, %vix, %vm15
DVRAND.s6 # CHECK-INST: vrand %v11, %v22
8 vrand %v11, %v22
14 # CHECK-INST: vrand %v11, %v22, %vm11
16 vrand %v11, %v22, %vm11
18 # CHECK-INST: vrand %v11, %vix, %vm15
20 vrand %v11, %vix, %vm15
DVRXOR.s6 # CHECK-INST: vrxor %v11, %v22
8 vrxor %v11, %v22
14 # CHECK-INST: vrxor %v11, %v22, %vm11
16 vrxor %v11, %v22, %vm11
18 # CHECK-INST: vrxor %v11, %vix, %vm15
20 vrxor %v11, %vix, %vm15
DLSV.s6 # CHECK-INST: lsv %v11(0), %s12
8 lsv %v11(0), %s12
14 # CHECK-INST: lsv %v11(0), (32)0
16 lsv %v11(0), (32)0
22 # CHECK-INST: lsv %v11(%s22), (1)0
24 lsv %v11(%s22), (1)0
DVSEQ.s6 # CHECK-INST: vseq %v11
8 vseq %v11
18 # CHECK-INST: pvseq.lo %v11, %vm11
20 pvseq.lo %v11, %vm11
22 # CHECK-INST: pvseq.up %v11, %vm11
24 pvseq.up %v11, %vm11
DVSBX.s6 # CHECK-INST: vsubs.l %v11, %s20, %v22
8 vsubs.l %v11, %s20, %v22
18 # CHECK-INST: vsubs.l %v11, 63, %v22, %vm11
20 vsubs.l %v11, 63, %v22, %vm11
22 # CHECK-INST: vsubs.l %v11, %v23, %v22, %vm11
24 vsubs.l %v11, %v23, %v22, %vm11
DVSLAX.s6 # CHECK-INST: vsla.l %v11, %v22, %s20
8 vsla.l %v11, %v22, %s20
18 # CHECK-INST: vsla.l %v11, %v22, 63, %vm11
20 vsla.l %v11, %v22, 63, %vm11
22 # CHECK-INST: vsla.l %v11, %v23, %v22, %vm11
24 vsla.l %v11, %v23, %v22, %vm11
DVMRG.s6 # CHECK-INST: vmrg %v11, %s20, %v22
8 vmrg %v11, %s20, %v22
18 # CHECK-INST: vmrg %v11, 63, %v22, %vm11
20 vmrg.l %v11, 63, %v22, %vm11
22 # CHECK-INST: vmrg.w %v11, %v23, %v22, %vm12
24 vmrg.w %v11, %v23, %v22, %vm12
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dsrem.i64.ll40 ; CHECK-NEXT: v_mul_lo_u32 v11, v10, v4
45 ; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v12
46 ; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v14
48 ; CHECK-NEXT: v_mul_lo_u32 v14, v4, v11
55 ; CHECK-NEXT: v_mul_lo_u32 v15, v8, v11
57 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v11
58 ; CHECK-NEXT: v_mul_hi_u32 v11, v8, v11
67 ; CHECK-NEXT: v_add_i32_e32 v11, vcc, v11, v13
69 ; CHECK-NEXT: v_addc_u32_e64 v12, s[4:5], v8, v11, vcc
74 ; CHECK-NEXT: v_add_i32_e64 v8, s[4:5], v8, v11
[all …]
Durem.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
39 ; CHECK-NEXT: v_add_i32_e32 v8, vcc, v8, v11
40 ; CHECK-NEXT: v_mul_lo_u32 v11, v4, v8
44 ; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v11
45 ; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc
52 ; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10
53 ; CHECK-NEXT: v_add_i32_e32 v11, vcc, v13, v12
56 ; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10
65 ; CHECK-NEXT: v_mul_lo_u32 v11, v9, v8
74 ; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v11, v7
[all …]
Dudiv.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
39 ; CHECK-NEXT: v_add_i32_e32 v8, vcc, v8, v11
40 ; CHECK-NEXT: v_mul_lo_u32 v11, v4, v8
44 ; CHECK-NEXT: v_add_i32_e32 v10, vcc, v10, v11
45 ; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, vcc
52 ; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10
53 ; CHECK-NEXT: v_add_i32_e32 v11, vcc, v13, v12
56 ; CHECK-NEXT: v_add_i32_e32 v10, vcc, v11, v10
65 ; CHECK-NEXT: v_mul_lo_u32 v11, v9, v8
74 ; CHECK-NEXT: v_add_i32_e64 v7, s[4:5], v11, v7
[all …]
Dsdiv.i64.ll38 ; CHECK-NEXT: v_subb_u32_e32 v11, vcc, 0, v3, vcc
40 ; CHECK-NEXT: v_mul_lo_u32 v12, v11, v6
70 ; CHECK-NEXT: v_mul_lo_u32 v11, v11, v6
75 ; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14
77 ; CHECK-NEXT: v_add_i32_e64 v10, s[4:5], v11, v10
78 ; CHECK-NEXT: v_mul_lo_u32 v11, v13, v15
81 ; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v11, v14
83 ; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v11, v12
84 ; CHECK-NEXT: v_cndmask_b32_e64 v11, 0, 1, s[4:5]
86 ; CHECK-NEXT: v_add_i32_e64 v11, s[4:5], v14, v11
[all …]
/external/llvm-project/llvm/test/MC/Hexagon/
Dv60-vmpy1.s11 #CHECK: 1919ccea { v11:10.h = vdmpy(v13:12.ub,{{ *}}r25.b) }
12 v11:10.h=vdmpy(v13:12.ub,r25.b)
38 #CHECK: 19bccb13 { v19.w = vmpyi(v11.w,{{ *}}r28.b) }
39 v19.w=vmpyi(v11.w,r28.b)
41 #CHECK: 19c8cb0a { v11:10.uh = vmpy(v11.ub,{{ *}}r8.ub) }
42 v11:10.uh=vmpy(v11.ub,r8.ub)
47 #CHECK: 1922d1aa { v11:10.h = vmpy(v17.ub,{{ *}}r2.b) }
48 v11:10.h=vmpy(v17.ub,r2.b)
53 #CHECK: 1925d86b { v11.w = vdmpy(v25:24.h,{{ *}}r5.h):sat }
54 v11.w=vdmpy(v25:24.h,r5.h):sat
[all …]
/external/llvm/test/MC/Hexagon/
Dv60-vmpy1.s11 #CHECK: 1919ccea { v11:10.h = vdmpy(v13:12.ub,{{ *}}r25.b) }
12 v11:10.h=vdmpy(v13:12.ub,r25.b)
38 #CHECK: 19bccb13 { v19.w = vmpyi(v11.w,{{ *}}r28.b) }
39 v19.w=vmpyi(v11.w,r28.b)
41 #CHECK: 19c8cb0a { v11:10.uh = vmpy(v11.ub,{{ *}}r8.ub) }
42 v11:10.uh=vmpy(v11.ub,r8.ub)
47 #CHECK: 1922d1aa { v11:10.h = vmpy(v17.ub,{{ *}}r2.b) }
48 v11:10.h=vmpy(v17.ub,r2.b)
53 #CHECK: 1925d86b { v11.w = vdmpy(v25:24.h,{{ *}}r5.h):sat }
54 v11.w=vdmpy(v25:24.h,r5.h):sat
[all …]
/external/XNNPACK/src/qs8-gemm/
D4x16c4-aarch64-neondot-cortex-a55.S27 # B x5 v8 v9 v10 v11
125 INS v11.d[1], x14
132 SDOT v28.4s, v11.16b, v0.4b[0]
134 SDOT v29.4s, v11.16b, v1.4b[0]
136 SDOT v30.4s, v11.16b, v2.4b[0]
138 SDOT v31.4s, v11.16b, v3.4b[0]
163 INS v11.d[1], x14
169 SDOT v28.4s, v11.16b, v0.4b[1]
171 SDOT v29.4s, v11.16b, v1.4b[1]
173 SDOT v30.4s, v11.16b, v2.4b[1]
[all …]
/external/XNNPACK/src/qs8-igemm/
D4x16c4-aarch64-neondot-cortex-a55.S29 # B x5 v8 v9 v10 v11
146 INS v11.d[1], x14
153 SDOT v28.4s, v11.16b, v0.4b[0]
155 SDOT v29.4s, v11.16b, v1.4b[0]
157 SDOT v30.4s, v11.16b, v2.4b[0]
159 SDOT v31.4s, v11.16b, v3.4b[0]
184 INS v11.d[1], x14
190 SDOT v28.4s, v11.16b, v0.4b[1]
192 SDOT v29.4s, v11.16b, v1.4b[1]
194 SDOT v30.4s, v11.16b, v2.4b[1]
[all …]

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