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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=1 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=CHECK,GISEL %s
3; RUN: llc -global-isel -amdgpu-codegenprepare-disable-idiv-expansion=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=hawaii -denormal-fp-math-f32=preserve-sign < %s | FileCheck -check-prefixes=CHECK,CGP %s
4
5; The same 32-bit expansion is implemented in the legalizer and in AMDGPUCodeGenPrepare.
6
7define i64 @v_sdiv_i64(i64 %num, i64 %den) {
8; CHECK-LABEL: v_sdiv_i64:
9; CHECK:       ; %bb.0:
10; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
11; CHECK-NEXT:    v_or_b32_e32 v5, v1, v3
12; CHECK-NEXT:    v_mov_b32_e32 v4, 0
13; CHECK-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[4:5]
14; CHECK-NEXT:    ; implicit-def: $vgpr4_vgpr5
15; CHECK-NEXT:    s_and_saveexec_b64 s[4:5], vcc
16; CHECK-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
17; CHECK-NEXT:    s_cbranch_execz BB0_2
18; CHECK-NEXT:  ; %bb.1:
19; CHECK-NEXT:    v_ashrrev_i32_e32 v4, 31, v3
20; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v2, v4
21; CHECK-NEXT:    v_addc_u32_e32 v3, vcc, v3, v4, vcc
22; CHECK-NEXT:    v_xor_b32_e32 v5, v5, v4
23; CHECK-NEXT:    v_xor_b32_e32 v3, v3, v4
24; CHECK-NEXT:    v_cvt_f32_u32_e32 v6, v5
25; CHECK-NEXT:    v_cvt_f32_u32_e32 v7, v3
26; CHECK-NEXT:    v_ashrrev_i32_e32 v8, 31, v1
27; CHECK-NEXT:    v_mac_f32_e32 v6, 0x4f800000, v7
28; CHECK-NEXT:    v_rcp_iflag_f32_e32 v6, v6
29; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v0, v8
30; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, v1, v8, vcc
31; CHECK-NEXT:    v_sub_i32_e32 v10, vcc, 0, v5
32; CHECK-NEXT:    v_mul_f32_e32 v6, 0x5f7ffffc, v6
33; CHECK-NEXT:    v_mul_f32_e32 v9, 0x2f800000, v6
34; CHECK-NEXT:    v_trunc_f32_e32 v9, v9
35; CHECK-NEXT:    v_mac_f32_e32 v6, 0xcf800000, v9
36; CHECK-NEXT:    v_cvt_u32_f32_e32 v6, v6
37; CHECK-NEXT:    v_cvt_u32_f32_e32 v9, v9
38; CHECK-NEXT:    v_subb_u32_e32 v11, vcc, 0, v3, vcc
39; CHECK-NEXT:    v_xor_b32_e32 v7, v7, v8
40; CHECK-NEXT:    v_mul_lo_u32 v12, v11, v6
41; CHECK-NEXT:    v_mul_lo_u32 v13, v10, v9
42; CHECK-NEXT:    v_mul_hi_u32 v15, v10, v6
43; CHECK-NEXT:    v_mul_lo_u32 v14, v10, v6
44; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v8
45; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
46; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
47; CHECK-NEXT:    v_mul_lo_u32 v13, v9, v14
48; CHECK-NEXT:    v_mul_lo_u32 v15, v6, v12
49; CHECK-NEXT:    v_mul_hi_u32 v16, v6, v14
50; CHECK-NEXT:    v_mul_hi_u32 v14, v9, v14
51; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v13, v15
52; CHECK-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
53; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
54; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
55; CHECK-NEXT:    v_mul_lo_u32 v16, v9, v12
56; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v15, v13
57; CHECK-NEXT:    v_mul_hi_u32 v15, v6, v12
58; CHECK-NEXT:    v_mul_hi_u32 v12, v9, v12
59; CHECK-NEXT:    v_add_i32_e32 v14, vcc, v16, v14
60; CHECK-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
61; CHECK-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
62; CHECK-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
63; CHECK-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
64; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
65; CHECK-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
66; CHECK-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
67; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
68; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v13
69; CHECK-NEXT:    v_addc_u32_e64 v13, s[4:5], v9, v12, vcc
70; CHECK-NEXT:    v_mul_lo_u32 v11, v11, v6
71; CHECK-NEXT:    v_mul_lo_u32 v14, v10, v13
72; CHECK-NEXT:    v_mul_lo_u32 v15, v10, v6
73; CHECK-NEXT:    v_mul_hi_u32 v10, v10, v6
74; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
75; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
76; CHECK-NEXT:    v_mul_hi_u32 v12, v6, v15
77; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v11, v10
78; CHECK-NEXT:    v_mul_lo_u32 v11, v13, v15
79; CHECK-NEXT:    v_mul_lo_u32 v14, v6, v10
80; CHECK-NEXT:    v_mul_hi_u32 v15, v13, v15
81; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
82; CHECK-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
83; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
84; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
85; CHECK-NEXT:    v_mul_lo_u32 v12, v13, v10
86; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v14, v11
87; CHECK-NEXT:    v_mul_hi_u32 v14, v6, v10
88; CHECK-NEXT:    v_mul_hi_u32 v10, v13, v10
89; CHECK-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
90; CHECK-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
91; CHECK-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
92; CHECK-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
93; CHECK-NEXT:    v_add_i32_e64 v14, s[4:5], v15, v14
94; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
95; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
96; CHECK-NEXT:    v_add_i32_e64 v12, s[4:5], v14, v12
97; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
98; CHECK-NEXT:    v_addc_u32_e32 v9, vcc, v9, v10, vcc
99; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
100; CHECK-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
101; CHECK-NEXT:    v_mul_lo_u32 v10, v1, v6
102; CHECK-NEXT:    v_mul_lo_u32 v11, v7, v9
103; CHECK-NEXT:    v_mul_hi_u32 v12, v7, v6
104; CHECK-NEXT:    v_mul_hi_u32 v6, v1, v6
105; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
106; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
107; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
108; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
109; CHECK-NEXT:    v_mul_lo_u32 v12, v1, v9
110; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
111; CHECK-NEXT:    v_mul_hi_u32 v11, v7, v9
112; CHECK-NEXT:    v_mul_hi_u32 v9, v1, v9
113; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v12, v6
114; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
115; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
116; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
117; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
118; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v10
119; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
120; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
121; CHECK-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
122; CHECK-NEXT:    v_mul_lo_u32 v10, v3, v6
123; CHECK-NEXT:    v_mul_lo_u32 v11, v5, v9
124; CHECK-NEXT:    v_mul_hi_u32 v13, v5, v6
125; CHECK-NEXT:    v_mul_lo_u32 v12, v5, v6
126; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
127; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
128; CHECK-NEXT:    v_sub_i32_e32 v7, vcc, v7, v12
129; CHECK-NEXT:    v_subb_u32_e64 v11, s[4:5], v1, v10, vcc
130; CHECK-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v10
131; CHECK-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v3
132; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v3, vcc
133; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
134; CHECK-NEXT:    v_cmp_ge_u32_e64 s[4:5], v7, v5
135; CHECK-NEXT:    v_sub_i32_e32 v7, vcc, v7, v5
136; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
137; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
138; CHECK-NEXT:    v_cmp_eq_u32_e64 s[4:5], v11, v3
139; CHECK-NEXT:    v_add_i32_e32 v11, vcc, 1, v6
140; CHECK-NEXT:    v_cndmask_b32_e64 v10, v10, v12, s[4:5]
141; CHECK-NEXT:    v_addc_u32_e32 v12, vcc, 0, v9, vcc
142; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v3
143; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, -1, vcc
144; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v7, v5
145; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
146; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, v1, v3
147; CHECK-NEXT:    v_cndmask_b32_e32 v1, v13, v5, vcc
148; CHECK-NEXT:    v_add_i32_e32 v3, vcc, 1, v11
149; CHECK-NEXT:    v_addc_u32_e32 v5, vcc, 0, v12, vcc
150; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
151; CHECK-NEXT:    v_cndmask_b32_e32 v1, v11, v3, vcc
152; CHECK-NEXT:    v_cndmask_b32_e32 v3, v12, v5, vcc
153; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v10
154; CHECK-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
155; CHECK-NEXT:    v_xor_b32_e32 v5, v8, v4
156; CHECK-NEXT:    v_cndmask_b32_e32 v3, v9, v3, vcc
157; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v5
158; CHECK-NEXT:    v_xor_b32_e32 v3, v3, v5
159; CHECK-NEXT:    v_sub_i32_e32 v4, vcc, v1, v5
160; CHECK-NEXT:    v_subb_u32_e32 v5, vcc, v3, v5, vcc
161; CHECK-NEXT:  BB0_2: ; %Flow
162; CHECK-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
163; CHECK-NEXT:    s_xor_b64 exec, exec, s[6:7]
164; CHECK-NEXT:    s_cbranch_execz BB0_4
165; CHECK-NEXT:  ; %bb.3:
166; CHECK-NEXT:    v_cvt_f32_u32_e32 v1, v2
167; CHECK-NEXT:    v_sub_i32_e32 v3, vcc, 0, v2
168; CHECK-NEXT:    v_mov_b32_e32 v5, 0
169; CHECK-NEXT:    v_rcp_iflag_f32_e32 v1, v1
170; CHECK-NEXT:    v_mul_f32_e32 v1, 0x4f7ffffe, v1
171; CHECK-NEXT:    v_cvt_u32_f32_e32 v1, v1
172; CHECK-NEXT:    v_mul_lo_u32 v3, v3, v1
173; CHECK-NEXT:    v_mul_hi_u32 v3, v1, v3
174; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v1, v3
175; CHECK-NEXT:    v_mul_hi_u32 v1, v0, v1
176; CHECK-NEXT:    v_mul_lo_u32 v3, v1, v2
177; CHECK-NEXT:    v_add_i32_e32 v4, vcc, 1, v1
178; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
179; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
180; CHECK-NEXT:    v_sub_i32_e64 v3, s[4:5], v0, v2
181; CHECK-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc
182; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
183; CHECK-NEXT:    v_add_i32_e32 v3, vcc, 1, v1
184; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v2
185; CHECK-NEXT:    v_cndmask_b32_e32 v4, v1, v3, vcc
186; CHECK-NEXT:  BB0_4:
187; CHECK-NEXT:    s_or_b64 exec, exec, s[6:7]
188; CHECK-NEXT:    v_mov_b32_e32 v0, v4
189; CHECK-NEXT:    v_mov_b32_e32 v1, v5
190; CHECK-NEXT:    s_setpc_b64 s[30:31]
191  %result = sdiv i64 %num, %den
192  ret i64 %result
193}
194
195; FIXME: This is a workaround for not handling uniform VGPR case.
196declare i32 @llvm.amdgcn.readfirstlane(i32)
197
198define amdgpu_ps i64 @s_sdiv_i64(i64 inreg %num, i64 inreg %den) {
199; CHECK-LABEL: s_sdiv_i64:
200; CHECK:       ; %bb.0:
201; CHECK-NEXT:    s_or_b64 s[6:7], s[2:3], s[4:5]
202; CHECK-NEXT:    s_mov_b32 s0, 0
203; CHECK-NEXT:    s_mov_b32 s1, -1
204; CHECK-NEXT:    s_and_b64 s[6:7], s[6:7], s[0:1]
205; CHECK-NEXT:    v_cmp_ne_u64_e64 vcc, s[6:7], 0
206; CHECK-NEXT:    s_cbranch_vccz BB1_2
207; CHECK-NEXT:  ; %bb.1:
208; CHECK-NEXT:    s_ashr_i32 s6, s3, 31
209; CHECK-NEXT:    s_ashr_i32 s8, s5, 31
210; CHECK-NEXT:    s_add_u32 s0, s2, s6
211; CHECK-NEXT:    s_cselect_b32 s1, 1, 0
212; CHECK-NEXT:    s_and_b32 s1, s1, 1
213; CHECK-NEXT:    s_cmp_lg_u32 s1, 0
214; CHECK-NEXT:    s_addc_u32 s1, s3, s6
215; CHECK-NEXT:    s_add_u32 s10, s4, s8
216; CHECK-NEXT:    s_cselect_b32 s3, 1, 0
217; CHECK-NEXT:    s_and_b32 s3, s3, 1
218; CHECK-NEXT:    s_cmp_lg_u32 s3, 0
219; CHECK-NEXT:    s_mov_b32 s9, s8
220; CHECK-NEXT:    s_addc_u32 s11, s5, s8
221; CHECK-NEXT:    s_xor_b64 s[10:11], s[10:11], s[8:9]
222; CHECK-NEXT:    v_cvt_f32_u32_e32 v0, s10
223; CHECK-NEXT:    v_cvt_f32_u32_e32 v1, s11
224; CHECK-NEXT:    s_mov_b32 s7, s6
225; CHECK-NEXT:    s_xor_b64 s[12:13], s[0:1], s[6:7]
226; CHECK-NEXT:    s_sub_u32 s3, 0, s10
227; CHECK-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
228; CHECK-NEXT:    v_rcp_iflag_f32_e32 v0, v0
229; CHECK-NEXT:    s_cselect_b32 s0, 1, 0
230; CHECK-NEXT:    s_and_b32 s0, s0, 1
231; CHECK-NEXT:    s_cmp_lg_u32 s0, 0
232; CHECK-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
233; CHECK-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
234; CHECK-NEXT:    v_trunc_f32_e32 v1, v1
235; CHECK-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
236; CHECK-NEXT:    v_cvt_u32_f32_e32 v0, v0
237; CHECK-NEXT:    v_cvt_u32_f32_e32 v1, v1
238; CHECK-NEXT:    s_subb_u32 s5, 0, s11
239; CHECK-NEXT:    v_mov_b32_e32 v6, s11
240; CHECK-NEXT:    v_mul_lo_u32 v2, s5, v0
241; CHECK-NEXT:    v_mul_lo_u32 v3, s3, v1
242; CHECK-NEXT:    v_mul_hi_u32 v5, s3, v0
243; CHECK-NEXT:    v_mul_lo_u32 v4, s3, v0
244; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
245; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
246; CHECK-NEXT:    v_mul_lo_u32 v3, v1, v4
247; CHECK-NEXT:    v_mul_lo_u32 v5, v0, v2
248; CHECK-NEXT:    v_mul_hi_u32 v7, v0, v4
249; CHECK-NEXT:    v_mul_hi_u32 v4, v1, v4
250; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
251; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
252; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v3, v7
253; CHECK-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc
254; CHECK-NEXT:    v_mul_lo_u32 v7, v1, v2
255; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
256; CHECK-NEXT:    v_mul_hi_u32 v5, v0, v2
257; CHECK-NEXT:    v_mul_hi_u32 v2, v1, v2
258; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v7, v4
259; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
260; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
261; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
262; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
263; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v4, v3
264; CHECK-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc
265; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
266; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v4
267; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
268; CHECK-NEXT:    v_addc_u32_e64 v3, s[0:1], v1, v2, vcc
269; CHECK-NEXT:    v_mul_lo_u32 v4, s5, v0
270; CHECK-NEXT:    v_mul_lo_u32 v5, s3, v3
271; CHECK-NEXT:    v_mul_hi_u32 v8, s3, v0
272; CHECK-NEXT:    v_mul_lo_u32 v7, s3, v0
273; CHECK-NEXT:    v_add_i32_e64 v1, s[0:1], v1, v2
274; CHECK-NEXT:    v_add_i32_e64 v4, s[0:1], v4, v5
275; CHECK-NEXT:    v_add_i32_e64 v4, s[0:1], v4, v8
276; CHECK-NEXT:    v_mul_lo_u32 v5, v3, v7
277; CHECK-NEXT:    v_mul_lo_u32 v8, v0, v4
278; CHECK-NEXT:    v_mul_hi_u32 v2, v0, v7
279; CHECK-NEXT:    v_mul_hi_u32 v7, v3, v7
280; CHECK-NEXT:    v_add_i32_e64 v5, s[0:1], v5, v8
281; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[0:1]
282; CHECK-NEXT:    v_add_i32_e64 v2, s[0:1], v5, v2
283; CHECK-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[0:1]
284; CHECK-NEXT:    v_mul_lo_u32 v5, v3, v4
285; CHECK-NEXT:    v_add_i32_e64 v2, s[0:1], v8, v2
286; CHECK-NEXT:    v_mul_hi_u32 v8, v0, v4
287; CHECK-NEXT:    v_mul_hi_u32 v3, v3, v4
288; CHECK-NEXT:    v_add_i32_e64 v5, s[0:1], v5, v7
289; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[0:1]
290; CHECK-NEXT:    v_add_i32_e64 v5, s[0:1], v5, v8
291; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[0:1]
292; CHECK-NEXT:    v_add_i32_e64 v7, s[0:1], v7, v8
293; CHECK-NEXT:    v_add_i32_e64 v2, s[0:1], v5, v2
294; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, s[0:1]
295; CHECK-NEXT:    v_add_i32_e64 v4, s[0:1], v7, v5
296; CHECK-NEXT:    v_add_i32_e64 v3, s[0:1], v3, v4
297; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, v1, v3, vcc
298; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
299; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, 0, v1, vcc
300; CHECK-NEXT:    v_mul_lo_u32 v2, s13, v0
301; CHECK-NEXT:    v_mul_lo_u32 v3, s12, v1
302; CHECK-NEXT:    v_mul_hi_u32 v5, s12, v0
303; CHECK-NEXT:    v_mul_hi_u32 v0, s13, v0
304; CHECK-NEXT:    v_mov_b32_e32 v4, s13
305; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
306; CHECK-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc
307; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
308; CHECK-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
309; CHECK-NEXT:    v_mul_lo_u32 v5, s13, v1
310; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
311; CHECK-NEXT:    v_mul_hi_u32 v3, s12, v1
312; CHECK-NEXT:    v_mul_hi_u32 v1, s13, v1
313; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v5, v0
314; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
315; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
316; CHECK-NEXT:    v_cndmask_b32_e64 v3, 0, 1, vcc
317; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v5, v3
318; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v2
319; CHECK-NEXT:    v_cndmask_b32_e64 v2, 0, 1, vcc
320; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
321; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v1, v2
322; CHECK-NEXT:    v_mul_lo_u32 v2, s11, v0
323; CHECK-NEXT:    v_mul_lo_u32 v1, s10, v1
324; CHECK-NEXT:    v_mul_hi_u32 v5, s10, v0
325; CHECK-NEXT:    v_mul_lo_u32 v3, s10, v0
326; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v2, v1
327; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v1, v5
328; CHECK-NEXT:    v_sub_i32_e32 v2, vcc, s12, v3
329; CHECK-NEXT:    v_subb_u32_e64 v3, s[0:1], v4, v1, vcc
330; CHECK-NEXT:    v_sub_i32_e64 v1, s[0:1], s13, v1
331; CHECK-NEXT:    v_cmp_le_u32_e64 s[0:1], s11, v3
332; CHECK-NEXT:    v_cndmask_b32_e64 v4, 0, -1, s[0:1]
333; CHECK-NEXT:    v_cmp_le_u32_e64 s[0:1], s10, v2
334; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v6, vcc
335; CHECK-NEXT:    v_subrev_i32_e32 v2, vcc, s10, v2
336; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[0:1]
337; CHECK-NEXT:    v_cmp_eq_u32_e64 s[0:1], s11, v3
338; CHECK-NEXT:    v_cndmask_b32_e64 v3, v4, v5, s[0:1]
339; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
340; CHECK-NEXT:    v_add_i32_e32 v4, vcc, 1, v0
341; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s11, v1
342; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
343; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s10, v2
344; CHECK-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
345; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, s11, v1
346; CHECK-NEXT:    v_cndmask_b32_e32 v1, v5, v2, vcc
347; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v4
348; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
349; CHECK-NEXT:    v_cndmask_b32_e32 v1, v4, v2, vcc
350; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v3
351; CHECK-NEXT:    s_xor_b64 s[0:1], s[6:7], s[8:9]
352; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v1, vcc
353; CHECK-NEXT:    v_xor_b32_e32 v0, s0, v0
354; CHECK-NEXT:    v_subrev_i32_e32 v0, vcc, s0, v0
355; CHECK-NEXT:    s_mov_b32 s1, 0
356; CHECK-NEXT:    s_branch BB1_3
357; CHECK-NEXT:  BB1_2:
358; CHECK-NEXT:    ; implicit-def: $vgpr0_vgpr1
359; CHECK-NEXT:  BB1_3: ; %Flow
360; CHECK-NEXT:    s_xor_b32 s0, s1, -1
361; CHECK-NEXT:    s_and_b32 s0, s0, 1
362; CHECK-NEXT:    s_cmp_lg_u32 s0, 0
363; CHECK-NEXT:    s_cbranch_scc1 BB1_5
364; CHECK-NEXT:  ; %bb.4:
365; CHECK-NEXT:    v_cvt_f32_u32_e32 v0, s4
366; CHECK-NEXT:    s_sub_i32 s0, 0, s4
367; CHECK-NEXT:    v_rcp_iflag_f32_e32 v0, v0
368; CHECK-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0
369; CHECK-NEXT:    v_cvt_u32_f32_e32 v0, v0
370; CHECK-NEXT:    v_mul_lo_u32 v1, s0, v0
371; CHECK-NEXT:    v_mul_hi_u32 v1, v0, v1
372; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
373; CHECK-NEXT:    v_mul_hi_u32 v0, s2, v0
374; CHECK-NEXT:    v_mul_lo_u32 v1, v0, s4
375; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
376; CHECK-NEXT:    v_sub_i32_e32 v1, vcc, s2, v1
377; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s4, v1
378; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
379; CHECK-NEXT:    v_subrev_i32_e64 v2, s[0:1], s4, v1
380; CHECK-NEXT:    v_cndmask_b32_e32 v1, v1, v2, vcc
381; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v0
382; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s4, v1
383; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
384; CHECK-NEXT:  BB1_5:
385; CHECK-NEXT:    v_readfirstlane_b32 s0, v0
386; CHECK-NEXT:    s_mov_b32 s1, s0
387; CHECK-NEXT:    ; return to shader part epilog
388  %result = sdiv i64 %num, %den
389  %cast = bitcast i64 %result to <2 x i32>
390  %elt.0 = extractelement <2 x i32> %cast, i32 0
391  %elt.1 = extractelement <2 x i32> %cast, i32 1
392  %res.0 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.0)
393  %res.1 = call i32 @llvm.amdgcn.readfirstlane(i32 %elt.1)
394  %ins.0 = insertelement <2 x i32> undef, i32 %res.0, i32 0
395  %ins.1 = insertelement <2 x i32> %ins.0, i32 %res.0, i32 1
396  %cast.back = bitcast <2 x i32> %ins.1 to i64
397  ret i64 %cast.back
398}
399
400define <2 x i64> @v_sdiv_v2i64(<2 x i64> %num, <2 x i64> %den) {
401; GISEL-LABEL: v_sdiv_v2i64:
402; GISEL:       ; %bb.0:
403; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
404; GISEL-NEXT:    v_ashrrev_i32_e32 v8, 31, v5
405; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
406; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, v5, v8, vcc
407; GISEL-NEXT:    v_xor_b32_e32 v4, v4, v8
408; GISEL-NEXT:    v_xor_b32_e32 v5, v5, v8
409; GISEL-NEXT:    v_cvt_f32_u32_e32 v9, v4
410; GISEL-NEXT:    v_cvt_f32_u32_e32 v10, v5
411; GISEL-NEXT:    v_ashrrev_i32_e32 v11, 31, v1
412; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v11
413; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v11, vcc
414; GISEL-NEXT:    v_mac_f32_e32 v9, 0x4f800000, v10
415; GISEL-NEXT:    v_rcp_iflag_f32_e32 v9, v9
416; GISEL-NEXT:    v_sub_i32_e32 v12, vcc, 0, v4
417; GISEL-NEXT:    v_subb_u32_e32 v13, vcc, 0, v5, vcc
418; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v11
419; GISEL-NEXT:    v_mul_f32_e32 v9, 0x5f7ffffc, v9
420; GISEL-NEXT:    v_mul_f32_e32 v10, 0x2f800000, v9
421; GISEL-NEXT:    v_trunc_f32_e32 v10, v10
422; GISEL-NEXT:    v_mac_f32_e32 v9, 0xcf800000, v10
423; GISEL-NEXT:    v_cvt_u32_f32_e32 v9, v9
424; GISEL-NEXT:    v_cvt_u32_f32_e32 v10, v10
425; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v11
426; GISEL-NEXT:    v_mul_lo_u32 v14, v13, v9
427; GISEL-NEXT:    v_mul_lo_u32 v15, v12, v10
428; GISEL-NEXT:    v_mul_hi_u32 v17, v12, v9
429; GISEL-NEXT:    v_mul_lo_u32 v16, v12, v9
430; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
431; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
432; GISEL-NEXT:    v_mul_lo_u32 v15, v10, v16
433; GISEL-NEXT:    v_mul_lo_u32 v17, v9, v14
434; GISEL-NEXT:    v_mul_hi_u32 v18, v9, v16
435; GISEL-NEXT:    v_mul_hi_u32 v16, v10, v16
436; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v17
437; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
438; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v18
439; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
440; GISEL-NEXT:    v_mul_lo_u32 v18, v10, v14
441; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
442; GISEL-NEXT:    v_mul_hi_u32 v17, v9, v14
443; GISEL-NEXT:    v_mul_hi_u32 v14, v10, v14
444; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v18, v16
445; GISEL-NEXT:    v_cndmask_b32_e64 v18, 0, 1, vcc
446; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v16, v17
447; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
448; GISEL-NEXT:    v_add_i32_e32 v17, vcc, v18, v17
449; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
450; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
451; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
452; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
453; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v15
454; GISEL-NEXT:    v_addc_u32_e64 v15, s[4:5], v10, v14, vcc
455; GISEL-NEXT:    v_mul_lo_u32 v13, v13, v9
456; GISEL-NEXT:    v_mul_lo_u32 v16, v12, v15
457; GISEL-NEXT:    v_mul_lo_u32 v17, v12, v9
458; GISEL-NEXT:    v_mul_hi_u32 v12, v12, v9
459; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v14
460; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
461; GISEL-NEXT:    v_mul_hi_u32 v14, v9, v17
462; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
463; GISEL-NEXT:    v_mul_lo_u32 v13, v15, v17
464; GISEL-NEXT:    v_mul_lo_u32 v16, v9, v12
465; GISEL-NEXT:    v_mul_hi_u32 v17, v15, v17
466; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
467; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
468; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
469; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
470; GISEL-NEXT:    v_mul_lo_u32 v14, v15, v12
471; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v16, v13
472; GISEL-NEXT:    v_mul_hi_u32 v16, v9, v12
473; GISEL-NEXT:    v_mul_hi_u32 v12, v15, v12
474; GISEL-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v17
475; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, s[4:5]
476; GISEL-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v16
477; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
478; GISEL-NEXT:    v_add_i32_e64 v16, s[4:5], v17, v16
479; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v14, v13
480; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
481; GISEL-NEXT:    v_add_i32_e64 v14, s[4:5], v16, v14
482; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
483; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, v10, v12, vcc
484; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v13
485; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v10, vcc
486; GISEL-NEXT:    v_mul_lo_u32 v12, v1, v9
487; GISEL-NEXT:    v_mul_lo_u32 v13, v0, v10
488; GISEL-NEXT:    v_mul_hi_u32 v14, v0, v9
489; GISEL-NEXT:    v_mul_hi_u32 v9, v1, v9
490; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
491; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
492; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
493; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
494; GISEL-NEXT:    v_mul_lo_u32 v14, v1, v10
495; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
496; GISEL-NEXT:    v_mul_hi_u32 v13, v0, v10
497; GISEL-NEXT:    v_mul_hi_u32 v10, v1, v10
498; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v14, v9
499; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
500; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v13
501; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
502; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
503; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
504; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
505; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
506; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
507; GISEL-NEXT:    v_mul_lo_u32 v12, v5, v9
508; GISEL-NEXT:    v_mul_lo_u32 v13, v4, v10
509; GISEL-NEXT:    v_mul_hi_u32 v15, v4, v9
510; GISEL-NEXT:    v_mul_lo_u32 v14, v4, v9
511; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
512; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
513; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v14
514; GISEL-NEXT:    v_subb_u32_e64 v13, s[4:5], v1, v12, vcc
515; GISEL-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v12
516; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v13, v5
517; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v5, vcc
518; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
519; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v0, v4
520; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
521; GISEL-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
522; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
523; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v13, v5
524; GISEL-NEXT:    v_add_i32_e32 v13, vcc, 1, v9
525; GISEL-NEXT:    v_cndmask_b32_e64 v12, v12, v14, s[4:5]
526; GISEL-NEXT:    v_addc_u32_e32 v14, vcc, 0, v10, vcc
527; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v5
528; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, -1, vcc
529; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
530; GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
531; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v1, v5
532; GISEL-NEXT:    v_cndmask_b32_e32 v0, v15, v0, vcc
533; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v13
534; GISEL-NEXT:    v_addc_u32_e32 v4, vcc, 0, v14, vcc
535; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
536; GISEL-NEXT:    v_cndmask_b32_e32 v0, v13, v1, vcc
537; GISEL-NEXT:    v_cndmask_b32_e32 v1, v14, v4, vcc
538; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12
539; GISEL-NEXT:    v_ashrrev_i32_e32 v5, 31, v7
540; GISEL-NEXT:    v_cndmask_b32_e32 v1, v10, v1, vcc
541; GISEL-NEXT:    v_cndmask_b32_e32 v0, v9, v0, vcc
542; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v5
543; GISEL-NEXT:    v_addc_u32_e32 v7, vcc, v7, v5, vcc
544; GISEL-NEXT:    v_xor_b32_e32 v7, v7, v5
545; GISEL-NEXT:    v_xor_b32_e32 v6, v6, v5
546; GISEL-NEXT:    v_xor_b32_e32 v4, v11, v8
547; GISEL-NEXT:    v_cvt_f32_u32_e32 v8, v6
548; GISEL-NEXT:    v_cvt_f32_u32_e32 v9, v7
549; GISEL-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
550; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v10
551; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, v3, v10, vcc
552; GISEL-NEXT:    v_mac_f32_e32 v8, 0x4f800000, v9
553; GISEL-NEXT:    v_rcp_iflag_f32_e32 v8, v8
554; GISEL-NEXT:    v_sub_i32_e32 v11, vcc, 0, v6
555; GISEL-NEXT:    v_subb_u32_e32 v12, vcc, 0, v7, vcc
556; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v4
557; GISEL-NEXT:    v_mul_f32_e32 v8, 0x5f7ffffc, v8
558; GISEL-NEXT:    v_mul_f32_e32 v9, 0x2f800000, v8
559; GISEL-NEXT:    v_trunc_f32_e32 v9, v9
560; GISEL-NEXT:    v_mac_f32_e32 v8, 0xcf800000, v9
561; GISEL-NEXT:    v_cvt_u32_f32_e32 v8, v8
562; GISEL-NEXT:    v_cvt_u32_f32_e32 v9, v9
563; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v10
564; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v10
565; GISEL-NEXT:    v_mul_lo_u32 v13, v12, v8
566; GISEL-NEXT:    v_mul_lo_u32 v14, v11, v9
567; GISEL-NEXT:    v_mul_hi_u32 v16, v11, v8
568; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v8
569; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v4
570; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
571; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
572; GISEL-NEXT:    v_mul_lo_u32 v14, v9, v15
573; GISEL-NEXT:    v_mul_lo_u32 v16, v8, v13
574; GISEL-NEXT:    v_mul_hi_u32 v17, v8, v15
575; GISEL-NEXT:    v_mul_hi_u32 v15, v9, v15
576; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
577; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
578; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
579; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
580; GISEL-NEXT:    v_mul_lo_u32 v17, v9, v13
581; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v16, v14
582; GISEL-NEXT:    v_mul_hi_u32 v16, v8, v13
583; GISEL-NEXT:    v_mul_hi_u32 v13, v9, v13
584; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
585; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
586; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v16
587; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
588; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
589; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
590; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
591; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
592; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v15
593; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v14
594; GISEL-NEXT:    v_addc_u32_e64 v14, s[4:5], v9, v13, vcc
595; GISEL-NEXT:    v_mul_lo_u32 v12, v12, v8
596; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v14
597; GISEL-NEXT:    v_mul_lo_u32 v16, v11, v8
598; GISEL-NEXT:    v_mul_hi_u32 v11, v11, v8
599; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v13
600; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
601; GISEL-NEXT:    v_mul_hi_u32 v13, v8, v16
602; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
603; GISEL-NEXT:    v_mul_lo_u32 v12, v14, v16
604; GISEL-NEXT:    v_mul_lo_u32 v15, v8, v11
605; GISEL-NEXT:    v_mul_hi_u32 v16, v14, v16
606; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
607; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
608; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
609; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
610; GISEL-NEXT:    v_mul_lo_u32 v13, v14, v11
611; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v15, v12
612; GISEL-NEXT:    v_mul_hi_u32 v15, v8, v11
613; GISEL-NEXT:    v_mul_hi_u32 v11, v14, v11
614; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
615; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
616; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v15
617; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
618; GISEL-NEXT:    v_add_i32_e64 v15, s[4:5], v16, v15
619; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
620; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
621; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v15, v13
622; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
623; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, v9, v11, vcc
624; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v12
625; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
626; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v4
627; GISEL-NEXT:    v_mul_lo_u32 v11, v3, v8
628; GISEL-NEXT:    v_mul_lo_u32 v12, v2, v9
629; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v4, vcc
630; GISEL-NEXT:    v_mul_hi_u32 v4, v2, v8
631; GISEL-NEXT:    v_mul_hi_u32 v8, v3, v8
632; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
633; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
634; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v11, v4
635; GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc
636; GISEL-NEXT:    v_mul_lo_u32 v11, v3, v9
637; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v12, v4
638; GISEL-NEXT:    v_mul_hi_u32 v12, v2, v9
639; GISEL-NEXT:    v_mul_hi_u32 v9, v3, v9
640; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
641; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
642; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v12
643; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
644; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
645; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v8, v4
646; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
647; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
648; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
649; GISEL-NEXT:    v_mul_lo_u32 v9, v7, v4
650; GISEL-NEXT:    v_mul_lo_u32 v11, v6, v8
651; GISEL-NEXT:    v_mul_hi_u32 v13, v6, v4
652; GISEL-NEXT:    v_mul_lo_u32 v12, v6, v4
653; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
654; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v13
655; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v12
656; GISEL-NEXT:    v_subb_u32_e64 v11, s[4:5], v3, v9, vcc
657; GISEL-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v9
658; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v7
659; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v7, vcc
660; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
661; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v2, v6
662; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
663; GISEL-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
664; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
665; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v11, v7
666; GISEL-NEXT:    v_add_i32_e32 v11, vcc, 1, v4
667; GISEL-NEXT:    v_cndmask_b32_e64 v9, v9, v12, s[4:5]
668; GISEL-NEXT:    v_addc_u32_e32 v12, vcc, 0, v8, vcc
669; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v7
670; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, -1, vcc
671; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
672; GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
673; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v3, v7
674; GISEL-NEXT:    v_cndmask_b32_e32 v2, v13, v2, vcc
675; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v11
676; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v12, vcc
677; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
678; GISEL-NEXT:    v_cndmask_b32_e32 v2, v11, v3, vcc
679; GISEL-NEXT:    v_cndmask_b32_e32 v3, v12, v6, vcc
680; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v9
681; GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
682; GISEL-NEXT:    v_xor_b32_e32 v4, v10, v5
683; GISEL-NEXT:    v_cndmask_b32_e32 v3, v8, v3, vcc
684; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v4
685; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v4
686; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v4
687; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v4, vcc
688; GISEL-NEXT:    s_setpc_b64 s[30:31]
689;
690; CGP-LABEL: v_sdiv_v2i64:
691; CGP:       ; %bb.0:
692; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
693; CGP-NEXT:    v_mov_b32_e32 v9, v1
694; CGP-NEXT:    v_mov_b32_e32 v8, v0
695; CGP-NEXT:    v_or_b32_e32 v1, v9, v5
696; CGP-NEXT:    v_mov_b32_e32 v0, 0
697; CGP-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[0:1]
698; CGP-NEXT:    ; implicit-def: $vgpr0_vgpr1
699; CGP-NEXT:    s_and_saveexec_b64 s[4:5], vcc
700; CGP-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
701; CGP-NEXT:    s_cbranch_execz BB2_2
702; CGP-NEXT:  ; %bb.1:
703; CGP-NEXT:    v_ashrrev_i32_e32 v0, 31, v5
704; CGP-NEXT:    v_add_i32_e32 v1, vcc, v4, v0
705; CGP-NEXT:    v_addc_u32_e32 v5, vcc, v5, v0, vcc
706; CGP-NEXT:    v_xor_b32_e32 v1, v1, v0
707; CGP-NEXT:    v_xor_b32_e32 v5, v5, v0
708; CGP-NEXT:    v_cvt_f32_u32_e32 v10, v1
709; CGP-NEXT:    v_cvt_f32_u32_e32 v11, v5
710; CGP-NEXT:    v_ashrrev_i32_e32 v12, 31, v9
711; CGP-NEXT:    v_mac_f32_e32 v10, 0x4f800000, v11
712; CGP-NEXT:    v_rcp_iflag_f32_e32 v10, v10
713; CGP-NEXT:    v_add_i32_e32 v11, vcc, v8, v12
714; CGP-NEXT:    v_addc_u32_e32 v9, vcc, v9, v12, vcc
715; CGP-NEXT:    v_sub_i32_e32 v14, vcc, 0, v1
716; CGP-NEXT:    v_mul_f32_e32 v10, 0x5f7ffffc, v10
717; CGP-NEXT:    v_mul_f32_e32 v13, 0x2f800000, v10
718; CGP-NEXT:    v_trunc_f32_e32 v13, v13
719; CGP-NEXT:    v_mac_f32_e32 v10, 0xcf800000, v13
720; CGP-NEXT:    v_cvt_u32_f32_e32 v10, v10
721; CGP-NEXT:    v_cvt_u32_f32_e32 v13, v13
722; CGP-NEXT:    v_subb_u32_e32 v15, vcc, 0, v5, vcc
723; CGP-NEXT:    v_xor_b32_e32 v11, v11, v12
724; CGP-NEXT:    v_mul_lo_u32 v16, v15, v10
725; CGP-NEXT:    v_mul_lo_u32 v17, v14, v13
726; CGP-NEXT:    v_mul_hi_u32 v19, v14, v10
727; CGP-NEXT:    v_mul_lo_u32 v18, v14, v10
728; CGP-NEXT:    v_xor_b32_e32 v9, v9, v12
729; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v17
730; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v19
731; CGP-NEXT:    v_mul_lo_u32 v17, v13, v18
732; CGP-NEXT:    v_mul_lo_u32 v19, v10, v16
733; CGP-NEXT:    v_mul_hi_u32 v20, v10, v18
734; CGP-NEXT:    v_mul_hi_u32 v18, v13, v18
735; CGP-NEXT:    v_add_i32_e32 v17, vcc, v17, v19
736; CGP-NEXT:    v_cndmask_b32_e64 v19, 0, 1, vcc
737; CGP-NEXT:    v_add_i32_e32 v17, vcc, v17, v20
738; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
739; CGP-NEXT:    v_mul_lo_u32 v20, v13, v16
740; CGP-NEXT:    v_add_i32_e32 v17, vcc, v19, v17
741; CGP-NEXT:    v_mul_hi_u32 v19, v10, v16
742; CGP-NEXT:    v_mul_hi_u32 v16, v13, v16
743; CGP-NEXT:    v_add_i32_e32 v18, vcc, v20, v18
744; CGP-NEXT:    v_cndmask_b32_e64 v20, 0, 1, vcc
745; CGP-NEXT:    v_add_i32_e32 v18, vcc, v18, v19
746; CGP-NEXT:    v_cndmask_b32_e64 v19, 0, 1, vcc
747; CGP-NEXT:    v_add_i32_e32 v19, vcc, v20, v19
748; CGP-NEXT:    v_add_i32_e32 v17, vcc, v18, v17
749; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, vcc
750; CGP-NEXT:    v_add_i32_e32 v18, vcc, v19, v18
751; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v18
752; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v17
753; CGP-NEXT:    v_addc_u32_e64 v17, s[4:5], v13, v16, vcc
754; CGP-NEXT:    v_mul_lo_u32 v15, v15, v10
755; CGP-NEXT:    v_mul_lo_u32 v18, v14, v17
756; CGP-NEXT:    v_mul_lo_u32 v19, v14, v10
757; CGP-NEXT:    v_mul_hi_u32 v14, v14, v10
758; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
759; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v15, v18
760; CGP-NEXT:    v_mul_hi_u32 v16, v10, v19
761; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v15, v14
762; CGP-NEXT:    v_mul_lo_u32 v15, v17, v19
763; CGP-NEXT:    v_mul_lo_u32 v18, v10, v14
764; CGP-NEXT:    v_mul_hi_u32 v19, v17, v19
765; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v15, v18
766; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, s[4:5]
767; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v15, v16
768; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
769; CGP-NEXT:    v_mul_lo_u32 v16, v17, v14
770; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v18, v15
771; CGP-NEXT:    v_mul_hi_u32 v18, v10, v14
772; CGP-NEXT:    v_mul_hi_u32 v14, v17, v14
773; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v16, v19
774; CGP-NEXT:    v_cndmask_b32_e64 v19, 0, 1, s[4:5]
775; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v16, v18
776; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, s[4:5]
777; CGP-NEXT:    v_add_i32_e64 v18, s[4:5], v19, v18
778; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v16, v15
779; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
780; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v18, v16
781; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v16
782; CGP-NEXT:    v_addc_u32_e32 v13, vcc, v13, v14, vcc
783; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v15
784; CGP-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
785; CGP-NEXT:    v_mul_lo_u32 v14, v9, v10
786; CGP-NEXT:    v_mul_lo_u32 v15, v11, v13
787; CGP-NEXT:    v_mul_hi_u32 v16, v11, v10
788; CGP-NEXT:    v_mul_hi_u32 v10, v9, v10
789; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
790; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
791; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
792; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
793; CGP-NEXT:    v_mul_lo_u32 v16, v9, v13
794; CGP-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
795; CGP-NEXT:    v_mul_hi_u32 v15, v11, v13
796; CGP-NEXT:    v_mul_hi_u32 v13, v9, v13
797; CGP-NEXT:    v_add_i32_e32 v10, vcc, v16, v10
798; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
799; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v15
800; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
801; CGP-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
802; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v14
803; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
804; CGP-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
805; CGP-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
806; CGP-NEXT:    v_mul_lo_u32 v14, v5, v10
807; CGP-NEXT:    v_mul_lo_u32 v15, v1, v13
808; CGP-NEXT:    v_mul_hi_u32 v17, v1, v10
809; CGP-NEXT:    v_mul_lo_u32 v16, v1, v10
810; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
811; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
812; CGP-NEXT:    v_sub_i32_e32 v11, vcc, v11, v16
813; CGP-NEXT:    v_subb_u32_e64 v15, s[4:5], v9, v14, vcc
814; CGP-NEXT:    v_sub_i32_e64 v9, s[4:5], v9, v14
815; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v15, v5
816; CGP-NEXT:    v_subb_u32_e32 v9, vcc, v9, v5, vcc
817; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
818; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v1
819; CGP-NEXT:    v_sub_i32_e32 v11, vcc, v11, v1
820; CGP-NEXT:    v_subbrev_u32_e32 v9, vcc, 0, v9, vcc
821; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, -1, s[4:5]
822; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], v15, v5
823; CGP-NEXT:    v_add_i32_e32 v15, vcc, 1, v10
824; CGP-NEXT:    v_cndmask_b32_e64 v14, v14, v16, s[4:5]
825; CGP-NEXT:    v_addc_u32_e32 v16, vcc, 0, v13, vcc
826; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v9, v5
827; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, -1, vcc
828; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v11, v1
829; CGP-NEXT:    v_cndmask_b32_e64 v1, 0, -1, vcc
830; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, v9, v5
831; CGP-NEXT:    v_cndmask_b32_e32 v1, v17, v1, vcc
832; CGP-NEXT:    v_add_i32_e32 v5, vcc, 1, v15
833; CGP-NEXT:    v_addc_u32_e32 v9, vcc, 0, v16, vcc
834; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
835; CGP-NEXT:    v_cndmask_b32_e32 v1, v15, v5, vcc
836; CGP-NEXT:    v_cndmask_b32_e32 v5, v16, v9, vcc
837; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v14
838; CGP-NEXT:    v_cndmask_b32_e32 v1, v10, v1, vcc
839; CGP-NEXT:    v_xor_b32_e32 v9, v12, v0
840; CGP-NEXT:    v_cndmask_b32_e32 v5, v13, v5, vcc
841; CGP-NEXT:    v_xor_b32_e32 v0, v1, v9
842; CGP-NEXT:    v_xor_b32_e32 v1, v5, v9
843; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v9
844; CGP-NEXT:    v_subb_u32_e32 v1, vcc, v1, v9, vcc
845; CGP-NEXT:  BB2_2: ; %Flow2
846; CGP-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
847; CGP-NEXT:    s_xor_b64 exec, exec, s[6:7]
848; CGP-NEXT:    s_cbranch_execz BB2_4
849; CGP-NEXT:  ; %bb.3:
850; CGP-NEXT:    v_cvt_f32_u32_e32 v0, v4
851; CGP-NEXT:    v_sub_i32_e32 v1, vcc, 0, v4
852; CGP-NEXT:    v_rcp_iflag_f32_e32 v0, v0
853; CGP-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0
854; CGP-NEXT:    v_cvt_u32_f32_e32 v0, v0
855; CGP-NEXT:    v_mul_lo_u32 v1, v1, v0
856; CGP-NEXT:    v_mul_hi_u32 v1, v0, v1
857; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
858; CGP-NEXT:    v_mul_hi_u32 v0, v8, v0
859; CGP-NEXT:    v_mul_lo_u32 v1, v0, v4
860; CGP-NEXT:    v_add_i32_e32 v5, vcc, 1, v0
861; CGP-NEXT:    v_sub_i32_e32 v1, vcc, v8, v1
862; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v4
863; CGP-NEXT:    v_cndmask_b32_e32 v0, v0, v5, vcc
864; CGP-NEXT:    v_sub_i32_e64 v5, s[4:5], v1, v4
865; CGP-NEXT:    v_cndmask_b32_e32 v1, v1, v5, vcc
866; CGP-NEXT:    v_add_i32_e32 v5, vcc, 1, v0
867; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v4
868; CGP-NEXT:    v_cndmask_b32_e32 v0, v0, v5, vcc
869; CGP-NEXT:    v_mov_b32_e32 v1, 0
870; CGP-NEXT:  BB2_4:
871; CGP-NEXT:    s_or_b64 exec, exec, s[6:7]
872; CGP-NEXT:    v_or_b32_e32 v5, v3, v7
873; CGP-NEXT:    v_mov_b32_e32 v4, 0
874; CGP-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[4:5]
875; CGP-NEXT:    ; implicit-def: $vgpr4_vgpr5
876; CGP-NEXT:    s_and_saveexec_b64 s[4:5], vcc
877; CGP-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
878; CGP-NEXT:    s_cbranch_execz BB2_6
879; CGP-NEXT:  ; %bb.5:
880; CGP-NEXT:    v_ashrrev_i32_e32 v4, 31, v7
881; CGP-NEXT:    v_add_i32_e32 v5, vcc, v6, v4
882; CGP-NEXT:    v_addc_u32_e32 v7, vcc, v7, v4, vcc
883; CGP-NEXT:    v_xor_b32_e32 v5, v5, v4
884; CGP-NEXT:    v_xor_b32_e32 v7, v7, v4
885; CGP-NEXT:    v_cvt_f32_u32_e32 v8, v5
886; CGP-NEXT:    v_cvt_f32_u32_e32 v9, v7
887; CGP-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
888; CGP-NEXT:    v_mac_f32_e32 v8, 0x4f800000, v9
889; CGP-NEXT:    v_rcp_iflag_f32_e32 v8, v8
890; CGP-NEXT:    v_add_i32_e32 v9, vcc, v2, v10
891; CGP-NEXT:    v_addc_u32_e32 v3, vcc, v3, v10, vcc
892; CGP-NEXT:    v_sub_i32_e32 v12, vcc, 0, v5
893; CGP-NEXT:    v_mul_f32_e32 v8, 0x5f7ffffc, v8
894; CGP-NEXT:    v_mul_f32_e32 v11, 0x2f800000, v8
895; CGP-NEXT:    v_trunc_f32_e32 v11, v11
896; CGP-NEXT:    v_mac_f32_e32 v8, 0xcf800000, v11
897; CGP-NEXT:    v_cvt_u32_f32_e32 v8, v8
898; CGP-NEXT:    v_cvt_u32_f32_e32 v11, v11
899; CGP-NEXT:    v_subb_u32_e32 v13, vcc, 0, v7, vcc
900; CGP-NEXT:    v_xor_b32_e32 v9, v9, v10
901; CGP-NEXT:    v_mul_lo_u32 v14, v13, v8
902; CGP-NEXT:    v_mul_lo_u32 v15, v12, v11
903; CGP-NEXT:    v_mul_hi_u32 v17, v12, v8
904; CGP-NEXT:    v_mul_lo_u32 v16, v12, v8
905; CGP-NEXT:    v_xor_b32_e32 v3, v3, v10
906; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
907; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
908; CGP-NEXT:    v_mul_lo_u32 v15, v11, v16
909; CGP-NEXT:    v_mul_lo_u32 v17, v8, v14
910; CGP-NEXT:    v_mul_hi_u32 v18, v8, v16
911; CGP-NEXT:    v_mul_hi_u32 v16, v11, v16
912; CGP-NEXT:    v_add_i32_e32 v15, vcc, v15, v17
913; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
914; CGP-NEXT:    v_add_i32_e32 v15, vcc, v15, v18
915; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
916; CGP-NEXT:    v_mul_lo_u32 v18, v11, v14
917; CGP-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
918; CGP-NEXT:    v_mul_hi_u32 v17, v8, v14
919; CGP-NEXT:    v_mul_hi_u32 v14, v11, v14
920; CGP-NEXT:    v_add_i32_e32 v16, vcc, v18, v16
921; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, vcc
922; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v17
923; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
924; CGP-NEXT:    v_add_i32_e32 v17, vcc, v18, v17
925; CGP-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
926; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
927; CGP-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
928; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
929; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v15
930; CGP-NEXT:    v_addc_u32_e64 v15, s[4:5], v11, v14, vcc
931; CGP-NEXT:    v_mul_lo_u32 v13, v13, v8
932; CGP-NEXT:    v_mul_lo_u32 v16, v12, v15
933; CGP-NEXT:    v_mul_lo_u32 v17, v12, v8
934; CGP-NEXT:    v_mul_hi_u32 v12, v12, v8
935; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
936; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
937; CGP-NEXT:    v_mul_hi_u32 v14, v8, v17
938; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
939; CGP-NEXT:    v_mul_lo_u32 v13, v15, v17
940; CGP-NEXT:    v_mul_lo_u32 v16, v8, v12
941; CGP-NEXT:    v_mul_hi_u32 v17, v15, v17
942; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
943; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
944; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
945; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
946; CGP-NEXT:    v_mul_lo_u32 v14, v15, v12
947; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v16, v13
948; CGP-NEXT:    v_mul_hi_u32 v16, v8, v12
949; CGP-NEXT:    v_mul_hi_u32 v12, v15, v12
950; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v17
951; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, s[4:5]
952; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v16
953; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
954; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v17, v16
955; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v14, v13
956; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
957; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v16, v14
958; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
959; CGP-NEXT:    v_addc_u32_e32 v11, vcc, v11, v12, vcc
960; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v13
961; CGP-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
962; CGP-NEXT:    v_mul_lo_u32 v12, v3, v8
963; CGP-NEXT:    v_mul_lo_u32 v13, v9, v11
964; CGP-NEXT:    v_mul_hi_u32 v14, v9, v8
965; CGP-NEXT:    v_mul_hi_u32 v8, v3, v8
966; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
967; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
968; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
969; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
970; CGP-NEXT:    v_mul_lo_u32 v14, v3, v11
971; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
972; CGP-NEXT:    v_mul_hi_u32 v13, v9, v11
973; CGP-NEXT:    v_mul_hi_u32 v11, v3, v11
974; CGP-NEXT:    v_add_i32_e32 v8, vcc, v14, v8
975; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
976; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v13
977; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
978; CGP-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
979; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v12
980; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
981; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
982; CGP-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
983; CGP-NEXT:    v_mul_lo_u32 v12, v7, v8
984; CGP-NEXT:    v_mul_lo_u32 v13, v5, v11
985; CGP-NEXT:    v_mul_hi_u32 v15, v5, v8
986; CGP-NEXT:    v_mul_lo_u32 v14, v5, v8
987; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
988; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
989; CGP-NEXT:    v_sub_i32_e32 v9, vcc, v9, v14
990; CGP-NEXT:    v_subb_u32_e64 v13, s[4:5], v3, v12, vcc
991; CGP-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v12
992; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v13, v7
993; CGP-NEXT:    v_subb_u32_e32 v3, vcc, v3, v7, vcc
994; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
995; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v9, v5
996; CGP-NEXT:    v_sub_i32_e32 v9, vcc, v9, v5
997; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
998; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
999; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], v13, v7
1000; CGP-NEXT:    v_add_i32_e32 v13, vcc, 1, v8
1001; CGP-NEXT:    v_cndmask_b32_e64 v12, v12, v14, s[4:5]
1002; CGP-NEXT:    v_addc_u32_e32 v14, vcc, 0, v11, vcc
1003; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v7
1004; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, -1, vcc
1005; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v9, v5
1006; CGP-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
1007; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, v3, v7
1008; CGP-NEXT:    v_cndmask_b32_e32 v3, v15, v5, vcc
1009; CGP-NEXT:    v_add_i32_e32 v5, vcc, 1, v13
1010; CGP-NEXT:    v_addc_u32_e32 v7, vcc, 0, v14, vcc
1011; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v3
1012; CGP-NEXT:    v_cndmask_b32_e32 v3, v13, v5, vcc
1013; CGP-NEXT:    v_cndmask_b32_e32 v5, v14, v7, vcc
1014; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12
1015; CGP-NEXT:    v_cndmask_b32_e32 v3, v8, v3, vcc
1016; CGP-NEXT:    v_xor_b32_e32 v7, v10, v4
1017; CGP-NEXT:    v_cndmask_b32_e32 v5, v11, v5, vcc
1018; CGP-NEXT:    v_xor_b32_e32 v3, v3, v7
1019; CGP-NEXT:    v_xor_b32_e32 v5, v5, v7
1020; CGP-NEXT:    v_sub_i32_e32 v4, vcc, v3, v7
1021; CGP-NEXT:    v_subb_u32_e32 v5, vcc, v5, v7, vcc
1022; CGP-NEXT:  BB2_6: ; %Flow
1023; CGP-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
1024; CGP-NEXT:    s_xor_b64 exec, exec, s[6:7]
1025; CGP-NEXT:    s_cbranch_execz BB2_8
1026; CGP-NEXT:  ; %bb.7:
1027; CGP-NEXT:    v_cvt_f32_u32_e32 v3, v6
1028; CGP-NEXT:    v_sub_i32_e32 v4, vcc, 0, v6
1029; CGP-NEXT:    v_rcp_iflag_f32_e32 v3, v3
1030; CGP-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
1031; CGP-NEXT:    v_cvt_u32_f32_e32 v3, v3
1032; CGP-NEXT:    v_mul_lo_u32 v4, v4, v3
1033; CGP-NEXT:    v_mul_hi_u32 v4, v3, v4
1034; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v4
1035; CGP-NEXT:    v_mul_hi_u32 v3, v2, v3
1036; CGP-NEXT:    v_mul_lo_u32 v4, v3, v6
1037; CGP-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
1038; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v4
1039; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
1040; CGP-NEXT:    v_sub_i32_e64 v4, s[4:5], v2, v6
1041; CGP-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
1042; CGP-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
1043; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
1044; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
1045; CGP-NEXT:    v_cndmask_b32_e32 v4, v3, v4, vcc
1046; CGP-NEXT:    v_mov_b32_e32 v5, 0
1047; CGP-NEXT:  BB2_8:
1048; CGP-NEXT:    s_or_b64 exec, exec, s[6:7]
1049; CGP-NEXT:    v_mov_b32_e32 v2, v4
1050; CGP-NEXT:    v_mov_b32_e32 v3, v5
1051; CGP-NEXT:    s_setpc_b64 s[30:31]
1052  %result = sdiv <2 x i64> %num, %den
1053  ret <2 x i64> %result
1054}
1055
1056define i64 @v_sdiv_i64_pow2k_denom(i64 %num) {
1057; CHECK-LABEL: v_sdiv_i64_pow2k_denom:
1058; CHECK:       ; %bb.0:
1059; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1060; CHECK-NEXT:    v_cvt_f32_u32_e32 v2, 0x1000
1061; CHECK-NEXT:    v_cvt_f32_ubyte0_e32 v4, 0
1062; CHECK-NEXT:    s_movk_i32 s6, 0xf000
1063; CHECK-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
1064; CHECK-NEXT:    v_mac_f32_e32 v2, 0x4f800000, v4
1065; CHECK-NEXT:    v_rcp_iflag_f32_e32 v2, v2
1066; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
1067; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, v1, v3, vcc
1068; CHECK-NEXT:    v_xor_b32_e32 v0, v0, v3
1069; CHECK-NEXT:    v_mul_f32_e32 v2, 0x5f7ffffc, v2
1070; CHECK-NEXT:    v_mul_f32_e32 v4, 0x2f800000, v2
1071; CHECK-NEXT:    v_trunc_f32_e32 v4, v4
1072; CHECK-NEXT:    v_mac_f32_e32 v2, 0xcf800000, v4
1073; CHECK-NEXT:    v_cvt_u32_f32_e32 v2, v2
1074; CHECK-NEXT:    v_cvt_u32_f32_e32 v4, v4
1075; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v3
1076; CHECK-NEXT:    v_mul_lo_u32 v5, -1, v2
1077; CHECK-NEXT:    v_mul_lo_u32 v6, s6, v4
1078; CHECK-NEXT:    v_mul_hi_u32 v8, s6, v2
1079; CHECK-NEXT:    v_mul_lo_u32 v7, s6, v2
1080; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1081; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1082; CHECK-NEXT:    v_mul_lo_u32 v6, v4, v7
1083; CHECK-NEXT:    v_mul_lo_u32 v8, v2, v5
1084; CHECK-NEXT:    v_mul_hi_u32 v9, v2, v7
1085; CHECK-NEXT:    v_mul_hi_u32 v7, v4, v7
1086; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
1087; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1088; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v9
1089; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1090; CHECK-NEXT:    v_mul_lo_u32 v9, v4, v5
1091; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
1092; CHECK-NEXT:    v_mul_hi_u32 v8, v2, v5
1093; CHECK-NEXT:    v_mul_hi_u32 v5, v4, v5
1094; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v9, v7
1095; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1096; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1097; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1098; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1099; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
1100; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1101; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1102; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1103; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
1104; CHECK-NEXT:    v_addc_u32_e64 v6, s[4:5], v4, v5, vcc
1105; CHECK-NEXT:    v_mul_lo_u32 v7, -1, v2
1106; CHECK-NEXT:    v_mul_lo_u32 v8, s6, v6
1107; CHECK-NEXT:    v_mul_hi_u32 v10, s6, v2
1108; CHECK-NEXT:    v_mul_lo_u32 v9, s6, v2
1109; CHECK-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v5
1110; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v8
1111; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v10
1112; CHECK-NEXT:    v_mul_lo_u32 v8, v6, v9
1113; CHECK-NEXT:    v_mul_lo_u32 v10, v2, v7
1114; CHECK-NEXT:    v_mul_hi_u32 v5, v2, v9
1115; CHECK-NEXT:    v_mul_hi_u32 v9, v6, v9
1116; CHECK-NEXT:    s_movk_i32 s6, 0x1000
1117; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
1118; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1119; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
1120; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, s[4:5]
1121; CHECK-NEXT:    v_mul_lo_u32 v8, v6, v7
1122; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v10, v5
1123; CHECK-NEXT:    v_mul_hi_u32 v10, v2, v7
1124; CHECK-NEXT:    v_mul_hi_u32 v6, v6, v7
1125; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1126; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
1127; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
1128; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1129; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1130; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
1131; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
1132; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v9, v8
1133; CHECK-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v7
1134; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, v4, v6, vcc
1135; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
1136; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, 0, v4, vcc
1137; CHECK-NEXT:    v_mul_lo_u32 v5, v1, v2
1138; CHECK-NEXT:    v_mul_lo_u32 v6, v0, v4
1139; CHECK-NEXT:    v_mul_hi_u32 v7, v0, v2
1140; CHECK-NEXT:    v_mul_hi_u32 v2, v1, v2
1141; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1142; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1143; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1144; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1145; CHECK-NEXT:    v_mul_lo_u32 v7, v1, v4
1146; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
1147; CHECK-NEXT:    v_mul_hi_u32 v6, v0, v4
1148; CHECK-NEXT:    v_mul_hi_u32 v4, v1, v4
1149; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
1150; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1151; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
1152; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1153; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
1154; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
1155; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1156; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
1157; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
1158; CHECK-NEXT:    v_mul_lo_u32 v5, 0, v2
1159; CHECK-NEXT:    v_mul_lo_u32 v6, s6, v4
1160; CHECK-NEXT:    v_mul_hi_u32 v8, s6, v2
1161; CHECK-NEXT:    v_mul_lo_u32 v7, s6, v2
1162; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1163; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1164; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v7
1165; CHECK-NEXT:    v_subb_u32_e64 v6, s[4:5], v1, v5, vcc
1166; CHECK-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v5
1167; CHECK-NEXT:    v_cmp_le_u32_e64 s[4:5], 0, v6
1168; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1169; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[4:5]
1170; CHECK-NEXT:    v_cmp_le_u32_e64 s[4:5], s6, v0
1171; CHECK-NEXT:    v_subrev_i32_e32 v0, vcc, s6, v0
1172; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1173; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1174; CHECK-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v6
1175; CHECK-NEXT:    v_add_i32_e32 v6, vcc, 1, v2
1176; CHECK-NEXT:    v_cndmask_b32_e64 v5, v5, v7, s[4:5]
1177; CHECK-NEXT:    v_addc_u32_e32 v7, vcc, 0, v4, vcc
1178; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, 0, v1
1179; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, -1, vcc
1180; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s6, v0
1181; CHECK-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
1182; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1
1183; CHECK-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc
1184; CHECK-NEXT:    v_add_i32_e32 v1, vcc, 1, v6
1185; CHECK-NEXT:    v_addc_u32_e32 v8, vcc, 0, v7, vcc
1186; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
1187; CHECK-NEXT:    v_cndmask_b32_e32 v0, v6, v1, vcc
1188; CHECK-NEXT:    v_cndmask_b32_e32 v1, v7, v8, vcc
1189; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v5
1190; CHECK-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
1191; CHECK-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc
1192; CHECK-NEXT:    v_xor_b32_e32 v0, v0, v3
1193; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v3
1194; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
1195; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v3, vcc
1196; CHECK-NEXT:    s_setpc_b64 s[30:31]
1197  %result = sdiv i64 %num, 4096
1198  ret i64 %result
1199}
1200
1201define <2 x i64> @v_sdiv_v2i64_pow2k_denom(<2 x i64> %num) {
1202; GISEL-LABEL: v_sdiv_v2i64_pow2k_denom:
1203; GISEL:       ; %bb.0:
1204; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1205; GISEL-NEXT:    s_movk_i32 s10, 0x1000
1206; GISEL-NEXT:    s_add_u32 s4, s10, 0
1207; GISEL-NEXT:    s_cselect_b32 s5, 1, 0
1208; GISEL-NEXT:    s_and_b32 s5, s5, 1
1209; GISEL-NEXT:    s_cmp_lg_u32 s5, 0
1210; GISEL-NEXT:    s_mov_b32 s6, 0
1211; GISEL-NEXT:    s_mov_b32 s7, s6
1212; GISEL-NEXT:    s_addc_u32 s5, 0, 0
1213; GISEL-NEXT:    s_xor_b64 s[8:9], s[4:5], s[6:7]
1214; GISEL-NEXT:    v_cvt_f32_u32_e32 v4, s8
1215; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, s9
1216; GISEL-NEXT:    s_sub_u32 s11, 0, s8
1217; GISEL-NEXT:    s_cselect_b32 s4, 1, 0
1218; GISEL-NEXT:    s_and_b32 s4, s4, 1
1219; GISEL-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v5
1220; GISEL-NEXT:    v_rcp_iflag_f32_e32 v4, v4
1221; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
1222; GISEL-NEXT:    s_subb_u32 s12, 0, s9
1223; GISEL-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
1224; GISEL-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
1225; GISEL-NEXT:    v_mul_f32_e32 v5, 0x2f800000, v4
1226; GISEL-NEXT:    v_trunc_f32_e32 v5, v5
1227; GISEL-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v5
1228; GISEL-NEXT:    v_cvt_u32_f32_e32 v4, v4
1229; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
1230; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v6
1231; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v6, vcc
1232; GISEL-NEXT:    v_mul_lo_u32 v7, s12, v4
1233; GISEL-NEXT:    v_mul_lo_u32 v8, s11, v5
1234; GISEL-NEXT:    v_mul_hi_u32 v10, s11, v4
1235; GISEL-NEXT:    v_mul_lo_u32 v9, s11, v4
1236; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v6
1237; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1238; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1239; GISEL-NEXT:    v_mul_lo_u32 v8, v5, v9
1240; GISEL-NEXT:    v_mul_lo_u32 v10, v4, v7
1241; GISEL-NEXT:    v_mul_hi_u32 v11, v4, v9
1242; GISEL-NEXT:    v_mul_hi_u32 v9, v5, v9
1243; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v6
1244; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
1245; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1246; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
1247; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1248; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v7
1249; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1250; GISEL-NEXT:    v_mul_hi_u32 v10, v4, v7
1251; GISEL-NEXT:    v_mul_hi_u32 v7, v5, v7
1252; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
1253; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1254; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1255; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1256; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1257; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1258; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1259; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1260; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1261; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
1262; GISEL-NEXT:    v_addc_u32_e64 v8, s[4:5], v5, v7, vcc
1263; GISEL-NEXT:    v_mul_lo_u32 v9, s12, v4
1264; GISEL-NEXT:    v_mul_lo_u32 v10, s11, v8
1265; GISEL-NEXT:    v_mul_hi_u32 v12, s11, v4
1266; GISEL-NEXT:    v_mul_lo_u32 v11, s11, v4
1267; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v5, v7
1268; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1269; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
1270; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v11
1271; GISEL-NEXT:    v_mul_lo_u32 v12, v4, v9
1272; GISEL-NEXT:    v_mul_hi_u32 v7, v4, v11
1273; GISEL-NEXT:    v_mul_hi_u32 v11, v8, v11
1274; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1275; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1276; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
1277; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[4:5]
1278; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v9
1279; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v12, v7
1280; GISEL-NEXT:    v_mul_hi_u32 v12, v4, v9
1281; GISEL-NEXT:    v_mul_hi_u32 v8, v8, v9
1282; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
1283; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
1284; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1285; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1286; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
1287; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
1288; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1289; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v10
1290; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1291; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, v5, v8, vcc
1292; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
1293; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
1294; GISEL-NEXT:    v_mul_lo_u32 v7, v1, v4
1295; GISEL-NEXT:    v_mul_lo_u32 v8, v0, v5
1296; GISEL-NEXT:    v_mul_hi_u32 v10, v0, v4
1297; GISEL-NEXT:    v_mul_hi_u32 v4, v1, v4
1298; GISEL-NEXT:    v_mov_b32_e32 v9, s9
1299; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1300; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1301; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1302; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1303; GISEL-NEXT:    v_mul_lo_u32 v10, v1, v5
1304; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1305; GISEL-NEXT:    v_mul_hi_u32 v8, v0, v5
1306; GISEL-NEXT:    v_mul_hi_u32 v5, v1, v5
1307; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v10, v4
1308; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1309; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
1310; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1311; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1312; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
1313; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1314; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1315; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1316; GISEL-NEXT:    v_mul_lo_u32 v7, s9, v4
1317; GISEL-NEXT:    v_mul_lo_u32 v8, s8, v5
1318; GISEL-NEXT:    v_mul_hi_u32 v11, s8, v4
1319; GISEL-NEXT:    v_mul_lo_u32 v10, s8, v4
1320; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1321; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
1322; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v10
1323; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v1, v7, vcc
1324; GISEL-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v7
1325; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s9, v8
1326; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v9, vcc
1327; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1328; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s8, v0
1329; GISEL-NEXT:    v_subrev_i32_e32 v0, vcc, s8, v0
1330; GISEL-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1331; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
1332; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], s9, v8
1333; GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v4
1334; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
1335; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s9, v1
1336; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[4:5]
1337; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
1338; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s8, v0
1339; GISEL-NEXT:    s_add_u32 s4, s10, 0
1340; GISEL-NEXT:    s_cselect_b32 s5, 1, 0
1341; GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
1342; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, s9, v1
1343; GISEL-NEXT:    s_and_b32 s5, s5, 1
1344; GISEL-NEXT:    v_cndmask_b32_e32 v0, v10, v0, vcc
1345; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v8
1346; GISEL-NEXT:    s_cmp_lg_u32 s5, 0
1347; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
1348; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
1349; GISEL-NEXT:    s_addc_u32 s5, 0, 0
1350; GISEL-NEXT:    s_xor_b64 s[6:7], s[4:5], s[6:7]
1351; GISEL-NEXT:    v_cndmask_b32_e32 v0, v8, v1, vcc
1352; GISEL-NEXT:    v_cndmask_b32_e32 v1, v9, v10, vcc
1353; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
1354; GISEL-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
1355; GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
1356; GISEL-NEXT:    v_cvt_f32_u32_e32 v4, s6
1357; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, s7
1358; GISEL-NEXT:    s_sub_u32 s8, 0, s6
1359; GISEL-NEXT:    s_cselect_b32 s4, 1, 0
1360; GISEL-NEXT:    s_and_b32 s4, s4, 1
1361; GISEL-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v5
1362; GISEL-NEXT:    v_rcp_iflag_f32_e32 v4, v4
1363; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
1364; GISEL-NEXT:    s_subb_u32 s9, 0, s7
1365; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v6
1366; GISEL-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
1367; GISEL-NEXT:    v_mul_f32_e32 v5, 0x2f800000, v4
1368; GISEL-NEXT:    v_trunc_f32_e32 v5, v5
1369; GISEL-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v5
1370; GISEL-NEXT:    v_cvt_u32_f32_e32 v4, v4
1371; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
1372; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v6
1373; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v6
1374; GISEL-NEXT:    v_mul_lo_u32 v7, s9, v4
1375; GISEL-NEXT:    v_mul_lo_u32 v8, s8, v5
1376; GISEL-NEXT:    v_mul_hi_u32 v10, s8, v4
1377; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v6, vcc
1378; GISEL-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
1379; GISEL-NEXT:    v_mul_lo_u32 v9, s8, v4
1380; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
1381; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, v3, v6, vcc
1382; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1383; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1384; GISEL-NEXT:    v_mul_lo_u32 v8, v5, v9
1385; GISEL-NEXT:    v_mul_lo_u32 v10, v4, v7
1386; GISEL-NEXT:    v_mul_hi_u32 v11, v4, v9
1387; GISEL-NEXT:    v_mul_hi_u32 v9, v5, v9
1388; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v6
1389; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
1390; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1391; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
1392; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1393; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v7
1394; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1395; GISEL-NEXT:    v_mul_hi_u32 v10, v4, v7
1396; GISEL-NEXT:    v_mul_hi_u32 v7, v5, v7
1397; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
1398; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1399; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1400; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1401; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1402; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1403; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1404; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1405; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1406; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
1407; GISEL-NEXT:    v_addc_u32_e64 v8, s[4:5], v5, v7, vcc
1408; GISEL-NEXT:    v_mul_lo_u32 v9, s9, v4
1409; GISEL-NEXT:    v_mul_lo_u32 v10, s8, v8
1410; GISEL-NEXT:    v_mul_hi_u32 v12, s8, v4
1411; GISEL-NEXT:    v_mul_lo_u32 v11, s8, v4
1412; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v5, v7
1413; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1414; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
1415; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v11
1416; GISEL-NEXT:    v_mul_lo_u32 v12, v4, v9
1417; GISEL-NEXT:    v_mul_hi_u32 v7, v4, v11
1418; GISEL-NEXT:    v_mul_hi_u32 v11, v8, v11
1419; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v6
1420; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1421; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1422; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
1423; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[4:5]
1424; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v9
1425; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v12, v7
1426; GISEL-NEXT:    v_mul_hi_u32 v12, v4, v9
1427; GISEL-NEXT:    v_mul_hi_u32 v8, v8, v9
1428; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
1429; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
1430; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1431; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1432; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
1433; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
1434; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1435; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v10
1436; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1437; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, v5, v8, vcc
1438; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
1439; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
1440; GISEL-NEXT:    v_mul_lo_u32 v7, v3, v4
1441; GISEL-NEXT:    v_mul_lo_u32 v8, v2, v5
1442; GISEL-NEXT:    v_mul_hi_u32 v10, v2, v4
1443; GISEL-NEXT:    v_mul_hi_u32 v4, v3, v4
1444; GISEL-NEXT:    v_mov_b32_e32 v9, s7
1445; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1446; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1447; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1448; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1449; GISEL-NEXT:    v_mul_lo_u32 v10, v3, v5
1450; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1451; GISEL-NEXT:    v_mul_hi_u32 v8, v2, v5
1452; GISEL-NEXT:    v_mul_hi_u32 v5, v3, v5
1453; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v10, v4
1454; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1455; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
1456; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1457; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1458; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
1459; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1460; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1461; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1462; GISEL-NEXT:    v_mul_lo_u32 v7, s7, v4
1463; GISEL-NEXT:    v_mul_lo_u32 v8, s6, v5
1464; GISEL-NEXT:    v_mul_hi_u32 v11, s6, v4
1465; GISEL-NEXT:    v_mul_lo_u32 v10, s6, v4
1466; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1467; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
1468; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v10
1469; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v3, v7, vcc
1470; GISEL-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v7
1471; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v8
1472; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v9, vcc
1473; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1474; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s6, v2
1475; GISEL-NEXT:    v_subrev_i32_e32 v2, vcc, s6, v2
1476; GISEL-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
1477; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
1478; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], s7, v8
1479; GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v4
1480; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
1481; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s7, v3
1482; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[4:5]
1483; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
1484; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s6, v2
1485; GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
1486; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, s7, v3
1487; GISEL-NEXT:    v_cndmask_b32_e32 v2, v10, v2, vcc
1488; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v8
1489; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
1490; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
1491; GISEL-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
1492; GISEL-NEXT:    v_cndmask_b32_e32 v3, v9, v10, vcc
1493; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
1494; GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
1495; GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
1496; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v6
1497; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v6
1498; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
1499; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v6, vcc
1500; GISEL-NEXT:    s_setpc_b64 s[30:31]
1501;
1502; CGP-LABEL: v_sdiv_v2i64_pow2k_denom:
1503; CGP:       ; %bb.0:
1504; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1505; CGP-NEXT:    v_cvt_f32_u32_e32 v4, 0x1000
1506; CGP-NEXT:    v_cvt_f32_ubyte0_e32 v6, 0
1507; CGP-NEXT:    s_movk_i32 s6, 0xf000
1508; CGP-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
1509; CGP-NEXT:    v_mov_b32_e32 v7, v4
1510; CGP-NEXT:    v_mac_f32_e32 v7, 0x4f800000, v6
1511; CGP-NEXT:    v_rcp_iflag_f32_e32 v7, v7
1512; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v5
1513; CGP-NEXT:    v_addc_u32_e32 v1, vcc, v1, v5, vcc
1514; CGP-NEXT:    v_xor_b32_e32 v0, v0, v5
1515; CGP-NEXT:    v_mul_f32_e32 v7, 0x5f7ffffc, v7
1516; CGP-NEXT:    v_mul_f32_e32 v8, 0x2f800000, v7
1517; CGP-NEXT:    v_trunc_f32_e32 v8, v8
1518; CGP-NEXT:    v_mac_f32_e32 v7, 0xcf800000, v8
1519; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
1520; CGP-NEXT:    v_cvt_u32_f32_e32 v8, v8
1521; CGP-NEXT:    v_xor_b32_e32 v1, v1, v5
1522; CGP-NEXT:    s_movk_i32 s7, 0x1000
1523; CGP-NEXT:    v_mul_lo_u32 v9, -1, v7
1524; CGP-NEXT:    v_mul_lo_u32 v10, s6, v8
1525; CGP-NEXT:    v_mul_hi_u32 v12, s6, v7
1526; CGP-NEXT:    v_mul_lo_u32 v11, s6, v7
1527; CGP-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v6
1528; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1529; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
1530; CGP-NEXT:    v_mul_lo_u32 v10, v8, v11
1531; CGP-NEXT:    v_mul_lo_u32 v12, v7, v9
1532; CGP-NEXT:    v_mul_hi_u32 v13, v7, v11
1533; CGP-NEXT:    v_mul_hi_u32 v11, v8, v11
1534; CGP-NEXT:    v_rcp_iflag_f32_e32 v4, v4
1535; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
1536; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
1537; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
1538; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1539; CGP-NEXT:    v_mul_lo_u32 v13, v8, v9
1540; CGP-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
1541; CGP-NEXT:    v_mul_hi_u32 v12, v7, v9
1542; CGP-NEXT:    v_mul_hi_u32 v9, v8, v9
1543; CGP-NEXT:    v_add_i32_e32 v11, vcc, v13, v11
1544; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
1545; CGP-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
1546; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
1547; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
1548; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1549; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1550; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
1551; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
1552; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1553; CGP-NEXT:    v_addc_u32_e64 v10, s[4:5], v8, v9, vcc
1554; CGP-NEXT:    v_mul_lo_u32 v11, -1, v7
1555; CGP-NEXT:    v_mul_lo_u32 v12, s6, v10
1556; CGP-NEXT:    v_mul_hi_u32 v14, s6, v7
1557; CGP-NEXT:    v_mul_lo_u32 v13, s6, v7
1558; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1559; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
1560; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
1561; CGP-NEXT:    v_mul_lo_u32 v12, v10, v13
1562; CGP-NEXT:    v_mul_lo_u32 v14, v7, v11
1563; CGP-NEXT:    v_mul_hi_u32 v9, v7, v13
1564; CGP-NEXT:    v_mul_hi_u32 v13, v10, v13
1565; CGP-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
1566; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
1567; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
1568; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
1569; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
1570; CGP-NEXT:    v_mul_lo_u32 v12, v10, v11
1571; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v14, v9
1572; CGP-NEXT:    v_mul_hi_u32 v14, v7, v11
1573; CGP-NEXT:    v_mul_hi_u32 v10, v10, v11
1574; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
1575; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
1576; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
1577; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
1578; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
1579; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
1580; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1581; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v13, v12
1582; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
1583; CGP-NEXT:    v_addc_u32_e32 v8, vcc, v8, v10, vcc
1584; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1585; CGP-NEXT:    v_addc_u32_e32 v8, vcc, 0, v8, vcc
1586; CGP-NEXT:    v_mul_lo_u32 v9, v1, v7
1587; CGP-NEXT:    v_mul_lo_u32 v10, v0, v8
1588; CGP-NEXT:    v_mul_hi_u32 v11, v0, v7
1589; CGP-NEXT:    v_mul_hi_u32 v7, v1, v7
1590; CGP-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
1591; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1592; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1593; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
1594; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1595; CGP-NEXT:    v_mul_lo_u32 v11, v1, v8
1596; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1597; CGP-NEXT:    v_mul_hi_u32 v10, v0, v8
1598; CGP-NEXT:    v_mul_hi_u32 v8, v1, v8
1599; CGP-NEXT:    v_add_i32_e32 v7, vcc, v11, v7
1600; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1601; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1602; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1603; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1604; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1605; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1606; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1607; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
1608; CGP-NEXT:    v_mul_lo_u32 v9, 0, v7
1609; CGP-NEXT:    v_mul_lo_u32 v10, s7, v8
1610; CGP-NEXT:    v_mul_hi_u32 v12, s7, v7
1611; CGP-NEXT:    v_mul_lo_u32 v11, s7, v7
1612; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1613; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
1614; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v11
1615; CGP-NEXT:    v_subb_u32_e64 v10, s[4:5], v1, v9, vcc
1616; CGP-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v9
1617; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], 0, v10
1618; CGP-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1619; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
1620; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v0
1621; CGP-NEXT:    v_subrev_i32_e32 v0, vcc, s7, v0
1622; CGP-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1623; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, -1, s[4:5]
1624; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v10
1625; CGP-NEXT:    v_add_i32_e32 v10, vcc, 1, v7
1626; CGP-NEXT:    v_cndmask_b32_e64 v9, v9, v11, s[4:5]
1627; CGP-NEXT:    v_addc_u32_e32 v11, vcc, 0, v8, vcc
1628; CGP-NEXT:    v_cmp_le_u32_e32 vcc, 0, v1
1629; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, -1, vcc
1630; CGP-NEXT:    v_cmp_le_u32_e32 vcc, s7, v0
1631; CGP-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
1632; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1
1633; CGP-NEXT:    v_cndmask_b32_e32 v0, v12, v0, vcc
1634; CGP-NEXT:    v_add_i32_e32 v1, vcc, 1, v10
1635; CGP-NEXT:    v_addc_u32_e32 v12, vcc, 0, v11, vcc
1636; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
1637; CGP-NEXT:    v_cndmask_b32_e32 v0, v10, v1, vcc
1638; CGP-NEXT:    v_cndmask_b32_e32 v1, v11, v12, vcc
1639; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v9
1640; CGP-NEXT:    v_cndmask_b32_e32 v0, v7, v0, vcc
1641; CGP-NEXT:    v_mul_f32_e32 v7, 0x2f800000, v4
1642; CGP-NEXT:    v_trunc_f32_e32 v7, v7
1643; CGP-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v7
1644; CGP-NEXT:    v_cvt_u32_f32_e32 v4, v4
1645; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
1646; CGP-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc
1647; CGP-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
1648; CGP-NEXT:    v_mul_lo_u32 v8, -1, v4
1649; CGP-NEXT:    v_mul_lo_u32 v9, s6, v7
1650; CGP-NEXT:    v_mul_hi_u32 v11, s6, v4
1651; CGP-NEXT:    v_mul_lo_u32 v10, s6, v4
1652; CGP-NEXT:    v_addc_u32_e32 v3, vcc, v3, v6, vcc
1653; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
1654; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
1655; CGP-NEXT:    v_mul_lo_u32 v9, v7, v10
1656; CGP-NEXT:    v_mul_lo_u32 v11, v4, v8
1657; CGP-NEXT:    v_mul_hi_u32 v12, v4, v10
1658; CGP-NEXT:    v_mul_hi_u32 v10, v7, v10
1659; CGP-NEXT:    v_xor_b32_e32 v0, v0, v5
1660; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
1661; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1662; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
1663; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1664; CGP-NEXT:    v_mul_lo_u32 v12, v7, v8
1665; CGP-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
1666; CGP-NEXT:    v_mul_hi_u32 v11, v4, v8
1667; CGP-NEXT:    v_mul_hi_u32 v8, v7, v8
1668; CGP-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
1669; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
1670; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
1671; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1672; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
1673; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1674; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1675; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1676; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
1677; CGP-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
1678; CGP-NEXT:    v_addc_u32_e64 v9, s[4:5], v7, v8, vcc
1679; CGP-NEXT:    v_mul_lo_u32 v10, -1, v4
1680; CGP-NEXT:    v_mul_lo_u32 v11, s6, v9
1681; CGP-NEXT:    v_mul_hi_u32 v13, s6, v4
1682; CGP-NEXT:    v_mul_lo_u32 v12, s6, v4
1683; CGP-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v8
1684; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
1685; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v13
1686; CGP-NEXT:    v_mul_lo_u32 v11, v9, v12
1687; CGP-NEXT:    v_mul_lo_u32 v13, v4, v10
1688; CGP-NEXT:    v_mul_hi_u32 v8, v4, v12
1689; CGP-NEXT:    v_mul_hi_u32 v12, v9, v12
1690; CGP-NEXT:    v_xor_b32_e32 v2, v2, v6
1691; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
1692; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
1693; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
1694; CGP-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
1695; CGP-NEXT:    v_mul_lo_u32 v11, v9, v10
1696; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v13, v8
1697; CGP-NEXT:    v_mul_hi_u32 v13, v4, v10
1698; CGP-NEXT:    v_mul_hi_u32 v9, v9, v10
1699; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
1700; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1701; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
1702; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
1703; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
1704; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
1705; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
1706; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v12, v11
1707; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1708; CGP-NEXT:    v_addc_u32_e32 v7, vcc, v7, v9, vcc
1709; CGP-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
1710; CGP-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
1711; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
1712; CGP-NEXT:    v_xor_b32_e32 v1, v1, v5
1713; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v5
1714; CGP-NEXT:    v_mul_lo_u32 v8, v3, v4
1715; CGP-NEXT:    v_mul_lo_u32 v9, v2, v7
1716; CGP-NEXT:    v_subb_u32_e32 v1, vcc, v1, v5, vcc
1717; CGP-NEXT:    v_mul_hi_u32 v5, v2, v4
1718; CGP-NEXT:    v_mul_hi_u32 v4, v3, v4
1719; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
1720; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1721; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
1722; CGP-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1723; CGP-NEXT:    v_mul_lo_u32 v8, v3, v7
1724; CGP-NEXT:    v_add_i32_e32 v5, vcc, v9, v5
1725; CGP-NEXT:    v_mul_hi_u32 v9, v2, v7
1726; CGP-NEXT:    v_mul_hi_u32 v7, v3, v7
1727; CGP-NEXT:    v_add_i32_e32 v4, vcc, v8, v4
1728; CGP-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1729; CGP-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
1730; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1731; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
1732; CGP-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
1733; CGP-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1734; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
1735; CGP-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
1736; CGP-NEXT:    v_mul_lo_u32 v7, 0, v4
1737; CGP-NEXT:    v_mul_lo_u32 v8, s7, v5
1738; CGP-NEXT:    v_mul_hi_u32 v10, s7, v4
1739; CGP-NEXT:    v_mul_lo_u32 v9, s7, v4
1740; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1741; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1742; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v9
1743; CGP-NEXT:    v_subb_u32_e64 v8, s[4:5], v3, v7, vcc
1744; CGP-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v7
1745; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], 0, v8
1746; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
1747; CGP-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1748; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v2
1749; CGP-NEXT:    v_subrev_i32_e32 v2, vcc, s7, v2
1750; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
1751; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
1752; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v8
1753; CGP-NEXT:    v_add_i32_e32 v8, vcc, 1, v4
1754; CGP-NEXT:    v_cndmask_b32_e64 v7, v7, v9, s[4:5]
1755; CGP-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
1756; CGP-NEXT:    v_cmp_le_u32_e32 vcc, 0, v3
1757; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
1758; CGP-NEXT:    v_cmp_le_u32_e32 vcc, s7, v2
1759; CGP-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
1760; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v3
1761; CGP-NEXT:    v_cndmask_b32_e32 v2, v10, v2, vcc
1762; CGP-NEXT:    v_add_i32_e32 v3, vcc, 1, v8
1763; CGP-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
1764; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
1765; CGP-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
1766; CGP-NEXT:    v_cndmask_b32_e32 v3, v9, v10, vcc
1767; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
1768; CGP-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
1769; CGP-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
1770; CGP-NEXT:    v_xor_b32_e32 v2, v2, v6
1771; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
1772; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
1773; CGP-NEXT:    v_subb_u32_e32 v3, vcc, v3, v6, vcc
1774; CGP-NEXT:    s_setpc_b64 s[30:31]
1775  %result = sdiv <2 x i64> %num, <i64 4096, i64 4096>
1776  ret <2 x i64> %result
1777}
1778
1779define i64 @v_sdiv_i64_oddk_denom(i64 %num) {
1780; CHECK-LABEL: v_sdiv_i64_oddk_denom:
1781; CHECK:       ; %bb.0:
1782; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1783; CHECK-NEXT:    v_cvt_f32_u32_e32 v2, 0x12d8fb
1784; CHECK-NEXT:    v_cvt_f32_ubyte0_e32 v4, 0
1785; CHECK-NEXT:    s_mov_b32 s6, 0xffed2705
1786; CHECK-NEXT:    v_ashrrev_i32_e32 v3, 31, v1
1787; CHECK-NEXT:    v_mac_f32_e32 v2, 0x4f800000, v4
1788; CHECK-NEXT:    v_rcp_iflag_f32_e32 v2, v2
1789; CHECK-NEXT:    v_add_i32_e32 v0, vcc, v0, v3
1790; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, v1, v3, vcc
1791; CHECK-NEXT:    v_xor_b32_e32 v0, v0, v3
1792; CHECK-NEXT:    v_mul_f32_e32 v2, 0x5f7ffffc, v2
1793; CHECK-NEXT:    v_mul_f32_e32 v4, 0x2f800000, v2
1794; CHECK-NEXT:    v_trunc_f32_e32 v4, v4
1795; CHECK-NEXT:    v_mac_f32_e32 v2, 0xcf800000, v4
1796; CHECK-NEXT:    v_cvt_u32_f32_e32 v2, v2
1797; CHECK-NEXT:    v_cvt_u32_f32_e32 v4, v4
1798; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v3
1799; CHECK-NEXT:    v_mul_lo_u32 v5, -1, v2
1800; CHECK-NEXT:    v_mul_lo_u32 v6, s6, v4
1801; CHECK-NEXT:    v_mul_hi_u32 v8, s6, v2
1802; CHECK-NEXT:    v_mul_lo_u32 v7, s6, v2
1803; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1804; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1805; CHECK-NEXT:    v_mul_lo_u32 v6, v4, v7
1806; CHECK-NEXT:    v_mul_lo_u32 v8, v2, v5
1807; CHECK-NEXT:    v_mul_hi_u32 v9, v2, v7
1808; CHECK-NEXT:    v_mul_hi_u32 v7, v4, v7
1809; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v8
1810; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1811; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v9
1812; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1813; CHECK-NEXT:    v_mul_lo_u32 v9, v4, v5
1814; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
1815; CHECK-NEXT:    v_mul_hi_u32 v8, v2, v5
1816; CHECK-NEXT:    v_mul_hi_u32 v5, v4, v5
1817; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v9, v7
1818; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1819; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1820; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1821; CHECK-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1822; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
1823; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1824; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
1825; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1826; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
1827; CHECK-NEXT:    v_addc_u32_e64 v6, s[4:5], v4, v5, vcc
1828; CHECK-NEXT:    v_mul_lo_u32 v7, -1, v2
1829; CHECK-NEXT:    v_mul_lo_u32 v8, s6, v6
1830; CHECK-NEXT:    v_mul_hi_u32 v10, s6, v2
1831; CHECK-NEXT:    v_mul_lo_u32 v9, s6, v2
1832; CHECK-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v5
1833; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v8
1834; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v10
1835; CHECK-NEXT:    v_mul_lo_u32 v8, v6, v9
1836; CHECK-NEXT:    v_mul_lo_u32 v10, v2, v7
1837; CHECK-NEXT:    v_mul_hi_u32 v5, v2, v9
1838; CHECK-NEXT:    v_mul_hi_u32 v9, v6, v9
1839; CHECK-NEXT:    s_mov_b32 s6, 0x12d8fb
1840; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
1841; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1842; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
1843; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, s[4:5]
1844; CHECK-NEXT:    v_mul_lo_u32 v8, v6, v7
1845; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v10, v5
1846; CHECK-NEXT:    v_mul_hi_u32 v10, v2, v7
1847; CHECK-NEXT:    v_mul_hi_u32 v6, v6, v7
1848; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
1849; CHECK-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
1850; CHECK-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v10
1851; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
1852; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1853; CHECK-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
1854; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
1855; CHECK-NEXT:    v_add_i32_e64 v7, s[4:5], v9, v8
1856; CHECK-NEXT:    v_add_i32_e64 v6, s[4:5], v6, v7
1857; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, v4, v6, vcc
1858; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
1859; CHECK-NEXT:    v_addc_u32_e32 v4, vcc, 0, v4, vcc
1860; CHECK-NEXT:    v_mul_lo_u32 v5, v1, v2
1861; CHECK-NEXT:    v_mul_lo_u32 v6, v0, v4
1862; CHECK-NEXT:    v_mul_hi_u32 v7, v0, v2
1863; CHECK-NEXT:    v_mul_hi_u32 v2, v1, v2
1864; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1865; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1866; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
1867; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1868; CHECK-NEXT:    v_mul_lo_u32 v7, v1, v4
1869; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
1870; CHECK-NEXT:    v_mul_hi_u32 v6, v0, v4
1871; CHECK-NEXT:    v_mul_hi_u32 v4, v1, v4
1872; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v7, v2
1873; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
1874; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
1875; CHECK-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
1876; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v7, v6
1877; CHECK-NEXT:    v_add_i32_e32 v2, vcc, v2, v5
1878; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
1879; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
1880; CHECK-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
1881; CHECK-NEXT:    v_mul_lo_u32 v5, 0, v2
1882; CHECK-NEXT:    v_mul_lo_u32 v6, s6, v4
1883; CHECK-NEXT:    v_mul_hi_u32 v8, s6, v2
1884; CHECK-NEXT:    v_mul_lo_u32 v7, s6, v2
1885; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
1886; CHECK-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
1887; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v7
1888; CHECK-NEXT:    v_subb_u32_e64 v6, s[4:5], v1, v5, vcc
1889; CHECK-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v5
1890; CHECK-NEXT:    v_cmp_le_u32_e64 s[4:5], 0, v6
1891; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1892; CHECK-NEXT:    v_cndmask_b32_e64 v5, 0, -1, s[4:5]
1893; CHECK-NEXT:    v_cmp_le_u32_e64 s[4:5], s6, v0
1894; CHECK-NEXT:    v_subrev_i32_e32 v0, vcc, s6, v0
1895; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
1896; CHECK-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
1897; CHECK-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v6
1898; CHECK-NEXT:    v_add_i32_e32 v6, vcc, 1, v2
1899; CHECK-NEXT:    v_cndmask_b32_e64 v5, v5, v7, s[4:5]
1900; CHECK-NEXT:    v_addc_u32_e32 v7, vcc, 0, v4, vcc
1901; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, 0, v1
1902; CHECK-NEXT:    v_cndmask_b32_e64 v8, 0, -1, vcc
1903; CHECK-NEXT:    v_cmp_le_u32_e32 vcc, s6, v0
1904; CHECK-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
1905; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1
1906; CHECK-NEXT:    v_cndmask_b32_e32 v0, v8, v0, vcc
1907; CHECK-NEXT:    v_add_i32_e32 v1, vcc, 1, v6
1908; CHECK-NEXT:    v_addc_u32_e32 v8, vcc, 0, v7, vcc
1909; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
1910; CHECK-NEXT:    v_cndmask_b32_e32 v0, v6, v1, vcc
1911; CHECK-NEXT:    v_cndmask_b32_e32 v1, v7, v8, vcc
1912; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v5
1913; CHECK-NEXT:    v_cndmask_b32_e32 v0, v2, v0, vcc
1914; CHECK-NEXT:    v_cndmask_b32_e32 v1, v4, v1, vcc
1915; CHECK-NEXT:    v_xor_b32_e32 v0, v0, v3
1916; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v3
1917; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
1918; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v3, vcc
1919; CHECK-NEXT:    s_setpc_b64 s[30:31]
1920  %result = sdiv i64 %num, 1235195
1921  ret i64 %result
1922}
1923
1924define <2 x i64> @v_sdiv_v2i64_oddk_denom(<2 x i64> %num) {
1925; GISEL-LABEL: v_sdiv_v2i64_oddk_denom:
1926; GISEL:       ; %bb.0:
1927; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1928; GISEL-NEXT:    s_mov_b32 s10, 0x12d8fb
1929; GISEL-NEXT:    s_add_u32 s4, s10, 0
1930; GISEL-NEXT:    s_cselect_b32 s5, 1, 0
1931; GISEL-NEXT:    s_and_b32 s5, s5, 1
1932; GISEL-NEXT:    s_cmp_lg_u32 s5, 0
1933; GISEL-NEXT:    s_mov_b32 s6, 0
1934; GISEL-NEXT:    s_mov_b32 s7, s6
1935; GISEL-NEXT:    s_addc_u32 s5, 0, 0
1936; GISEL-NEXT:    s_xor_b64 s[8:9], s[4:5], s[6:7]
1937; GISEL-NEXT:    v_cvt_f32_u32_e32 v4, s8
1938; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, s9
1939; GISEL-NEXT:    s_sub_u32 s11, 0, s8
1940; GISEL-NEXT:    s_cselect_b32 s4, 1, 0
1941; GISEL-NEXT:    s_and_b32 s4, s4, 1
1942; GISEL-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v5
1943; GISEL-NEXT:    v_rcp_iflag_f32_e32 v4, v4
1944; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
1945; GISEL-NEXT:    s_subb_u32 s12, 0, s9
1946; GISEL-NEXT:    v_ashrrev_i32_e32 v6, 31, v1
1947; GISEL-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
1948; GISEL-NEXT:    v_mul_f32_e32 v5, 0x2f800000, v4
1949; GISEL-NEXT:    v_trunc_f32_e32 v5, v5
1950; GISEL-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v5
1951; GISEL-NEXT:    v_cvt_u32_f32_e32 v4, v4
1952; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
1953; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v6
1954; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v6, vcc
1955; GISEL-NEXT:    v_mul_lo_u32 v7, s12, v4
1956; GISEL-NEXT:    v_mul_lo_u32 v8, s11, v5
1957; GISEL-NEXT:    v_mul_hi_u32 v10, s11, v4
1958; GISEL-NEXT:    v_mul_lo_u32 v9, s11, v4
1959; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v6
1960; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
1961; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
1962; GISEL-NEXT:    v_mul_lo_u32 v8, v5, v9
1963; GISEL-NEXT:    v_mul_lo_u32 v10, v4, v7
1964; GISEL-NEXT:    v_mul_hi_u32 v11, v4, v9
1965; GISEL-NEXT:    v_mul_hi_u32 v9, v5, v9
1966; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v6
1967; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
1968; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1969; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
1970; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
1971; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v7
1972; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
1973; GISEL-NEXT:    v_mul_hi_u32 v10, v4, v7
1974; GISEL-NEXT:    v_mul_hi_u32 v7, v5, v7
1975; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
1976; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
1977; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
1978; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
1979; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
1980; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
1981; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
1982; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
1983; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
1984; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
1985; GISEL-NEXT:    v_addc_u32_e64 v8, s[4:5], v5, v7, vcc
1986; GISEL-NEXT:    v_mul_lo_u32 v9, s12, v4
1987; GISEL-NEXT:    v_mul_lo_u32 v10, s11, v8
1988; GISEL-NEXT:    v_mul_hi_u32 v12, s11, v4
1989; GISEL-NEXT:    v_mul_lo_u32 v11, s11, v4
1990; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v5, v7
1991; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
1992; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
1993; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v11
1994; GISEL-NEXT:    v_mul_lo_u32 v12, v4, v9
1995; GISEL-NEXT:    v_mul_hi_u32 v7, v4, v11
1996; GISEL-NEXT:    v_mul_hi_u32 v11, v8, v11
1997; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
1998; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
1999; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
2000; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[4:5]
2001; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v9
2002; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v12, v7
2003; GISEL-NEXT:    v_mul_hi_u32 v12, v4, v9
2004; GISEL-NEXT:    v_mul_hi_u32 v8, v8, v9
2005; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
2006; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
2007; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2008; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2009; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2010; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
2011; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
2012; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v10
2013; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
2014; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, v5, v8, vcc
2015; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
2016; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
2017; GISEL-NEXT:    v_mul_lo_u32 v7, v1, v4
2018; GISEL-NEXT:    v_mul_lo_u32 v8, v0, v5
2019; GISEL-NEXT:    v_mul_hi_u32 v10, v0, v4
2020; GISEL-NEXT:    v_mul_hi_u32 v4, v1, v4
2021; GISEL-NEXT:    v_mov_b32_e32 v9, s9
2022; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2023; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2024; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2025; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2026; GISEL-NEXT:    v_mul_lo_u32 v10, v1, v5
2027; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
2028; GISEL-NEXT:    v_mul_hi_u32 v8, v0, v5
2029; GISEL-NEXT:    v_mul_hi_u32 v5, v1, v5
2030; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v10, v4
2031; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2032; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
2033; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2034; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
2035; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
2036; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2037; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
2038; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
2039; GISEL-NEXT:    v_mul_lo_u32 v7, s9, v4
2040; GISEL-NEXT:    v_mul_lo_u32 v8, s8, v5
2041; GISEL-NEXT:    v_mul_hi_u32 v11, s8, v4
2042; GISEL-NEXT:    v_mul_lo_u32 v10, s8, v4
2043; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2044; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
2045; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v10
2046; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v1, v7, vcc
2047; GISEL-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v7
2048; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s9, v8
2049; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v9, vcc
2050; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
2051; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s8, v0
2052; GISEL-NEXT:    v_subrev_i32_e32 v0, vcc, s8, v0
2053; GISEL-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
2054; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
2055; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], s9, v8
2056; GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v4
2057; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
2058; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s9, v1
2059; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[4:5]
2060; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
2061; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s8, v0
2062; GISEL-NEXT:    s_add_u32 s4, s10, 0
2063; GISEL-NEXT:    s_cselect_b32 s5, 1, 0
2064; GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
2065; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, s9, v1
2066; GISEL-NEXT:    s_and_b32 s5, s5, 1
2067; GISEL-NEXT:    v_cndmask_b32_e32 v0, v10, v0, vcc
2068; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v8
2069; GISEL-NEXT:    s_cmp_lg_u32 s5, 0
2070; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
2071; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
2072; GISEL-NEXT:    s_addc_u32 s5, 0, 0
2073; GISEL-NEXT:    s_xor_b64 s[6:7], s[4:5], s[6:7]
2074; GISEL-NEXT:    v_cndmask_b32_e32 v0, v8, v1, vcc
2075; GISEL-NEXT:    v_cndmask_b32_e32 v1, v9, v10, vcc
2076; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
2077; GISEL-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
2078; GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
2079; GISEL-NEXT:    v_cvt_f32_u32_e32 v4, s6
2080; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, s7
2081; GISEL-NEXT:    s_sub_u32 s8, 0, s6
2082; GISEL-NEXT:    s_cselect_b32 s4, 1, 0
2083; GISEL-NEXT:    s_and_b32 s4, s4, 1
2084; GISEL-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v5
2085; GISEL-NEXT:    v_rcp_iflag_f32_e32 v4, v4
2086; GISEL-NEXT:    s_cmp_lg_u32 s4, 0
2087; GISEL-NEXT:    s_subb_u32 s9, 0, s7
2088; GISEL-NEXT:    v_xor_b32_e32 v0, v0, v6
2089; GISEL-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
2090; GISEL-NEXT:    v_mul_f32_e32 v5, 0x2f800000, v4
2091; GISEL-NEXT:    v_trunc_f32_e32 v5, v5
2092; GISEL-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v5
2093; GISEL-NEXT:    v_cvt_u32_f32_e32 v4, v4
2094; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
2095; GISEL-NEXT:    v_xor_b32_e32 v1, v1, v6
2096; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v6
2097; GISEL-NEXT:    v_mul_lo_u32 v7, s9, v4
2098; GISEL-NEXT:    v_mul_lo_u32 v8, s8, v5
2099; GISEL-NEXT:    v_mul_hi_u32 v10, s8, v4
2100; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v1, v6, vcc
2101; GISEL-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
2102; GISEL-NEXT:    v_mul_lo_u32 v9, s8, v4
2103; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
2104; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, v3, v6, vcc
2105; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2106; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2107; GISEL-NEXT:    v_mul_lo_u32 v8, v5, v9
2108; GISEL-NEXT:    v_mul_lo_u32 v10, v4, v7
2109; GISEL-NEXT:    v_mul_hi_u32 v11, v4, v9
2110; GISEL-NEXT:    v_mul_hi_u32 v9, v5, v9
2111; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v6
2112; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
2113; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2114; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
2115; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2116; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v7
2117; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
2118; GISEL-NEXT:    v_mul_hi_u32 v10, v4, v7
2119; GISEL-NEXT:    v_mul_hi_u32 v7, v5, v7
2120; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
2121; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2122; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2123; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2124; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2125; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
2126; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2127; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2128; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
2129; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
2130; GISEL-NEXT:    v_addc_u32_e64 v8, s[4:5], v5, v7, vcc
2131; GISEL-NEXT:    v_mul_lo_u32 v9, s9, v4
2132; GISEL-NEXT:    v_mul_lo_u32 v10, s8, v8
2133; GISEL-NEXT:    v_mul_hi_u32 v12, s8, v4
2134; GISEL-NEXT:    v_mul_lo_u32 v11, s8, v4
2135; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v5, v7
2136; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
2137; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
2138; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v11
2139; GISEL-NEXT:    v_mul_lo_u32 v12, v4, v9
2140; GISEL-NEXT:    v_mul_hi_u32 v7, v4, v11
2141; GISEL-NEXT:    v_mul_hi_u32 v11, v8, v11
2142; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v6
2143; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2144; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2145; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
2146; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, s[4:5]
2147; GISEL-NEXT:    v_mul_lo_u32 v10, v8, v9
2148; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v12, v7
2149; GISEL-NEXT:    v_mul_hi_u32 v12, v4, v9
2150; GISEL-NEXT:    v_mul_hi_u32 v8, v8, v9
2151; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
2152; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
2153; GISEL-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2154; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2155; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2156; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v10, v7
2157; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, s[4:5]
2158; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v10
2159; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
2160; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, v5, v8, vcc
2161; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
2162; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
2163; GISEL-NEXT:    v_mul_lo_u32 v7, v3, v4
2164; GISEL-NEXT:    v_mul_lo_u32 v8, v2, v5
2165; GISEL-NEXT:    v_mul_hi_u32 v10, v2, v4
2166; GISEL-NEXT:    v_mul_hi_u32 v4, v3, v4
2167; GISEL-NEXT:    v_mov_b32_e32 v9, s7
2168; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2169; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2170; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2171; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2172; GISEL-NEXT:    v_mul_lo_u32 v10, v3, v5
2173; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
2174; GISEL-NEXT:    v_mul_hi_u32 v8, v2, v5
2175; GISEL-NEXT:    v_mul_hi_u32 v5, v3, v5
2176; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v10, v4
2177; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2178; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
2179; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2180; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v10, v8
2181; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
2182; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
2183; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
2184; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
2185; GISEL-NEXT:    v_mul_lo_u32 v7, s7, v4
2186; GISEL-NEXT:    v_mul_lo_u32 v8, s6, v5
2187; GISEL-NEXT:    v_mul_hi_u32 v11, s6, v4
2188; GISEL-NEXT:    v_mul_lo_u32 v10, s6, v4
2189; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2190; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v11
2191; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v10
2192; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v3, v7, vcc
2193; GISEL-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v7
2194; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v8
2195; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v9, vcc
2196; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
2197; GISEL-NEXT:    v_cmp_le_u32_e64 s[4:5], s6, v2
2198; GISEL-NEXT:    v_subrev_i32_e32 v2, vcc, s6, v2
2199; GISEL-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
2200; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
2201; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], s7, v8
2202; GISEL-NEXT:    v_add_i32_e32 v8, vcc, 1, v4
2203; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
2204; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s7, v3
2205; GISEL-NEXT:    v_cndmask_b32_e64 v7, v7, v10, s[4:5]
2206; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
2207; GISEL-NEXT:    v_cmp_le_u32_e32 vcc, s6, v2
2208; GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
2209; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, s7, v3
2210; GISEL-NEXT:    v_cndmask_b32_e32 v2, v10, v2, vcc
2211; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v8
2212; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
2213; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
2214; GISEL-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
2215; GISEL-NEXT:    v_cndmask_b32_e32 v3, v9, v10, vcc
2216; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
2217; GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
2218; GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
2219; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v6
2220; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v6
2221; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
2222; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v6, vcc
2223; GISEL-NEXT:    s_setpc_b64 s[30:31]
2224;
2225; CGP-LABEL: v_sdiv_v2i64_oddk_denom:
2226; CGP:       ; %bb.0:
2227; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2228; CGP-NEXT:    v_cvt_f32_u32_e32 v4, 0x12d8fb
2229; CGP-NEXT:    v_cvt_f32_ubyte0_e32 v6, 0
2230; CGP-NEXT:    s_mov_b32 s6, 0xffed2705
2231; CGP-NEXT:    v_ashrrev_i32_e32 v5, 31, v1
2232; CGP-NEXT:    v_mov_b32_e32 v7, v4
2233; CGP-NEXT:    v_mac_f32_e32 v7, 0x4f800000, v6
2234; CGP-NEXT:    v_rcp_iflag_f32_e32 v7, v7
2235; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v5
2236; CGP-NEXT:    v_addc_u32_e32 v1, vcc, v1, v5, vcc
2237; CGP-NEXT:    v_xor_b32_e32 v0, v0, v5
2238; CGP-NEXT:    v_mul_f32_e32 v7, 0x5f7ffffc, v7
2239; CGP-NEXT:    v_mul_f32_e32 v8, 0x2f800000, v7
2240; CGP-NEXT:    v_trunc_f32_e32 v8, v8
2241; CGP-NEXT:    v_mac_f32_e32 v7, 0xcf800000, v8
2242; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
2243; CGP-NEXT:    v_cvt_u32_f32_e32 v8, v8
2244; CGP-NEXT:    v_xor_b32_e32 v1, v1, v5
2245; CGP-NEXT:    s_mov_b32 s7, 0x12d8fb
2246; CGP-NEXT:    v_mul_lo_u32 v9, -1, v7
2247; CGP-NEXT:    v_mul_lo_u32 v10, s6, v8
2248; CGP-NEXT:    v_mul_hi_u32 v12, s6, v7
2249; CGP-NEXT:    v_mul_lo_u32 v11, s6, v7
2250; CGP-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v6
2251; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2252; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
2253; CGP-NEXT:    v_mul_lo_u32 v10, v8, v11
2254; CGP-NEXT:    v_mul_lo_u32 v12, v7, v9
2255; CGP-NEXT:    v_mul_hi_u32 v13, v7, v11
2256; CGP-NEXT:    v_mul_hi_u32 v11, v8, v11
2257; CGP-NEXT:    v_rcp_iflag_f32_e32 v4, v4
2258; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
2259; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2260; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
2261; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2262; CGP-NEXT:    v_mul_lo_u32 v13, v8, v9
2263; CGP-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
2264; CGP-NEXT:    v_mul_hi_u32 v12, v7, v9
2265; CGP-NEXT:    v_mul_hi_u32 v9, v8, v9
2266; CGP-NEXT:    v_add_i32_e32 v11, vcc, v13, v11
2267; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2268; CGP-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
2269; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2270; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
2271; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2272; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2273; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
2274; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
2275; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2276; CGP-NEXT:    v_addc_u32_e64 v10, s[4:5], v8, v9, vcc
2277; CGP-NEXT:    v_mul_lo_u32 v11, -1, v7
2278; CGP-NEXT:    v_mul_lo_u32 v12, s6, v10
2279; CGP-NEXT:    v_mul_hi_u32 v14, s6, v7
2280; CGP-NEXT:    v_mul_lo_u32 v13, s6, v7
2281; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
2282; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2283; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
2284; CGP-NEXT:    v_mul_lo_u32 v12, v10, v13
2285; CGP-NEXT:    v_mul_lo_u32 v14, v7, v11
2286; CGP-NEXT:    v_mul_hi_u32 v9, v7, v13
2287; CGP-NEXT:    v_mul_hi_u32 v13, v10, v13
2288; CGP-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
2289; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2290; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2291; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
2292; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
2293; CGP-NEXT:    v_mul_lo_u32 v12, v10, v11
2294; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v14, v9
2295; CGP-NEXT:    v_mul_hi_u32 v14, v7, v11
2296; CGP-NEXT:    v_mul_hi_u32 v10, v10, v11
2297; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
2298; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2299; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2300; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2301; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
2302; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v12, v9
2303; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2304; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v13, v12
2305; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
2306; CGP-NEXT:    v_addc_u32_e32 v8, vcc, v8, v10, vcc
2307; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
2308; CGP-NEXT:    v_addc_u32_e32 v8, vcc, 0, v8, vcc
2309; CGP-NEXT:    v_mul_lo_u32 v9, v1, v7
2310; CGP-NEXT:    v_mul_lo_u32 v10, v0, v8
2311; CGP-NEXT:    v_mul_hi_u32 v11, v0, v7
2312; CGP-NEXT:    v_mul_hi_u32 v7, v1, v7
2313; CGP-NEXT:    v_ashrrev_i32_e32 v6, 31, v3
2314; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2315; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2316; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
2317; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2318; CGP-NEXT:    v_mul_lo_u32 v11, v1, v8
2319; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2320; CGP-NEXT:    v_mul_hi_u32 v10, v0, v8
2321; CGP-NEXT:    v_mul_hi_u32 v8, v1, v8
2322; CGP-NEXT:    v_add_i32_e32 v7, vcc, v11, v7
2323; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2324; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2325; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2326; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2327; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
2328; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2329; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2330; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2331; CGP-NEXT:    v_mul_lo_u32 v9, 0, v7
2332; CGP-NEXT:    v_mul_lo_u32 v10, s7, v8
2333; CGP-NEXT:    v_mul_hi_u32 v12, s7, v7
2334; CGP-NEXT:    v_mul_lo_u32 v11, s7, v7
2335; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2336; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
2337; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v11
2338; CGP-NEXT:    v_subb_u32_e64 v10, s[4:5], v1, v9, vcc
2339; CGP-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v9
2340; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], 0, v10
2341; CGP-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
2342; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
2343; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v0
2344; CGP-NEXT:    v_subrev_i32_e32 v0, vcc, s7, v0
2345; CGP-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
2346; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, -1, s[4:5]
2347; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v10
2348; CGP-NEXT:    v_add_i32_e32 v10, vcc, 1, v7
2349; CGP-NEXT:    v_cndmask_b32_e64 v9, v9, v11, s[4:5]
2350; CGP-NEXT:    v_addc_u32_e32 v11, vcc, 0, v8, vcc
2351; CGP-NEXT:    v_cmp_le_u32_e32 vcc, 0, v1
2352; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, -1, vcc
2353; CGP-NEXT:    v_cmp_le_u32_e32 vcc, s7, v0
2354; CGP-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
2355; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v1
2356; CGP-NEXT:    v_cndmask_b32_e32 v0, v12, v0, vcc
2357; CGP-NEXT:    v_add_i32_e32 v1, vcc, 1, v10
2358; CGP-NEXT:    v_addc_u32_e32 v12, vcc, 0, v11, vcc
2359; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
2360; CGP-NEXT:    v_cndmask_b32_e32 v0, v10, v1, vcc
2361; CGP-NEXT:    v_cndmask_b32_e32 v1, v11, v12, vcc
2362; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v9
2363; CGP-NEXT:    v_cndmask_b32_e32 v0, v7, v0, vcc
2364; CGP-NEXT:    v_mul_f32_e32 v7, 0x2f800000, v4
2365; CGP-NEXT:    v_trunc_f32_e32 v7, v7
2366; CGP-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v7
2367; CGP-NEXT:    v_cvt_u32_f32_e32 v4, v4
2368; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
2369; CGP-NEXT:    v_cndmask_b32_e32 v1, v8, v1, vcc
2370; CGP-NEXT:    v_add_i32_e32 v2, vcc, v2, v6
2371; CGP-NEXT:    v_mul_lo_u32 v8, -1, v4
2372; CGP-NEXT:    v_mul_lo_u32 v9, s6, v7
2373; CGP-NEXT:    v_mul_hi_u32 v11, s6, v4
2374; CGP-NEXT:    v_mul_lo_u32 v10, s6, v4
2375; CGP-NEXT:    v_addc_u32_e32 v3, vcc, v3, v6, vcc
2376; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2377; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v11
2378; CGP-NEXT:    v_mul_lo_u32 v9, v7, v10
2379; CGP-NEXT:    v_mul_lo_u32 v11, v4, v8
2380; CGP-NEXT:    v_mul_hi_u32 v12, v4, v10
2381; CGP-NEXT:    v_mul_hi_u32 v10, v7, v10
2382; CGP-NEXT:    v_xor_b32_e32 v0, v0, v5
2383; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
2384; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2385; CGP-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
2386; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2387; CGP-NEXT:    v_mul_lo_u32 v12, v7, v8
2388; CGP-NEXT:    v_add_i32_e32 v9, vcc, v11, v9
2389; CGP-NEXT:    v_mul_hi_u32 v11, v4, v8
2390; CGP-NEXT:    v_mul_hi_u32 v8, v7, v8
2391; CGP-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
2392; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2393; CGP-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
2394; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2395; CGP-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
2396; CGP-NEXT:    v_add_i32_e32 v9, vcc, v10, v9
2397; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2398; CGP-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2399; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v10
2400; CGP-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
2401; CGP-NEXT:    v_addc_u32_e64 v9, s[4:5], v7, v8, vcc
2402; CGP-NEXT:    v_mul_lo_u32 v10, -1, v4
2403; CGP-NEXT:    v_mul_lo_u32 v11, s6, v9
2404; CGP-NEXT:    v_mul_hi_u32 v13, s6, v4
2405; CGP-NEXT:    v_mul_lo_u32 v12, s6, v4
2406; CGP-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v8
2407; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v11
2408; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v13
2409; CGP-NEXT:    v_mul_lo_u32 v11, v9, v12
2410; CGP-NEXT:    v_mul_lo_u32 v13, v4, v10
2411; CGP-NEXT:    v_mul_hi_u32 v8, v4, v12
2412; CGP-NEXT:    v_mul_hi_u32 v12, v9, v12
2413; CGP-NEXT:    v_xor_b32_e32 v2, v2, v6
2414; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
2415; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2416; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
2417; CGP-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
2418; CGP-NEXT:    v_mul_lo_u32 v11, v9, v10
2419; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v13, v8
2420; CGP-NEXT:    v_mul_hi_u32 v13, v4, v10
2421; CGP-NEXT:    v_mul_hi_u32 v9, v9, v10
2422; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2423; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2424; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
2425; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2426; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
2427; CGP-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
2428; CGP-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
2429; CGP-NEXT:    v_add_i32_e64 v10, s[4:5], v12, v11
2430; CGP-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v10
2431; CGP-NEXT:    v_addc_u32_e32 v7, vcc, v7, v9, vcc
2432; CGP-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
2433; CGP-NEXT:    v_addc_u32_e32 v7, vcc, 0, v7, vcc
2434; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
2435; CGP-NEXT:    v_xor_b32_e32 v1, v1, v5
2436; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v5
2437; CGP-NEXT:    v_mul_lo_u32 v8, v3, v4
2438; CGP-NEXT:    v_mul_lo_u32 v9, v2, v7
2439; CGP-NEXT:    v_subb_u32_e32 v1, vcc, v1, v5, vcc
2440; CGP-NEXT:    v_mul_hi_u32 v5, v2, v4
2441; CGP-NEXT:    v_mul_hi_u32 v4, v3, v4
2442; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2443; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2444; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
2445; CGP-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
2446; CGP-NEXT:    v_mul_lo_u32 v8, v3, v7
2447; CGP-NEXT:    v_add_i32_e32 v5, vcc, v9, v5
2448; CGP-NEXT:    v_mul_hi_u32 v9, v2, v7
2449; CGP-NEXT:    v_mul_hi_u32 v7, v3, v7
2450; CGP-NEXT:    v_add_i32_e32 v4, vcc, v8, v4
2451; CGP-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2452; CGP-NEXT:    v_add_i32_e32 v4, vcc, v4, v9
2453; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
2454; CGP-NEXT:    v_add_i32_e32 v8, vcc, v8, v9
2455; CGP-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
2456; CGP-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
2457; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
2458; CGP-NEXT:    v_add_i32_e32 v5, vcc, v7, v5
2459; CGP-NEXT:    v_mul_lo_u32 v7, 0, v4
2460; CGP-NEXT:    v_mul_lo_u32 v8, s7, v5
2461; CGP-NEXT:    v_mul_hi_u32 v10, s7, v4
2462; CGP-NEXT:    v_mul_lo_u32 v9, s7, v4
2463; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
2464; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
2465; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v9
2466; CGP-NEXT:    v_subb_u32_e64 v8, s[4:5], v3, v7, vcc
2467; CGP-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v7
2468; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], 0, v8
2469; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
2470; CGP-NEXT:    v_cndmask_b32_e64 v7, 0, -1, s[4:5]
2471; CGP-NEXT:    v_cmp_le_u32_e64 s[4:5], s7, v2
2472; CGP-NEXT:    v_subrev_i32_e32 v2, vcc, s7, v2
2473; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
2474; CGP-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
2475; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], 0, v8
2476; CGP-NEXT:    v_add_i32_e32 v8, vcc, 1, v4
2477; CGP-NEXT:    v_cndmask_b32_e64 v7, v7, v9, s[4:5]
2478; CGP-NEXT:    v_addc_u32_e32 v9, vcc, 0, v5, vcc
2479; CGP-NEXT:    v_cmp_le_u32_e32 vcc, 0, v3
2480; CGP-NEXT:    v_cndmask_b32_e64 v10, 0, -1, vcc
2481; CGP-NEXT:    v_cmp_le_u32_e32 vcc, s7, v2
2482; CGP-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
2483; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, 0, v3
2484; CGP-NEXT:    v_cndmask_b32_e32 v2, v10, v2, vcc
2485; CGP-NEXT:    v_add_i32_e32 v3, vcc, 1, v8
2486; CGP-NEXT:    v_addc_u32_e32 v10, vcc, 0, v9, vcc
2487; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
2488; CGP-NEXT:    v_cndmask_b32_e32 v2, v8, v3, vcc
2489; CGP-NEXT:    v_cndmask_b32_e32 v3, v9, v10, vcc
2490; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v7
2491; CGP-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
2492; CGP-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
2493; CGP-NEXT:    v_xor_b32_e32 v2, v2, v6
2494; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
2495; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
2496; CGP-NEXT:    v_subb_u32_e32 v3, vcc, v3, v6, vcc
2497; CGP-NEXT:    s_setpc_b64 s[30:31]
2498  %result = sdiv <2 x i64> %num, <i64 1235195, i64 1235195>
2499  ret <2 x i64> %result
2500}
2501
2502define i64 @v_sdiv_i64_pow2_shl_denom(i64 %x, i64 %y) {
2503; CHECK-LABEL: v_sdiv_i64_pow2_shl_denom:
2504; CHECK:       ; %bb.0:
2505; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2506; CHECK-NEXT:    s_movk_i32 s4, 0x1000
2507; CHECK-NEXT:    s_mov_b32 s5, 0
2508; CHECK-NEXT:    v_lshl_b64 v[4:5], s[4:5], v2
2509; CHECK-NEXT:    v_mov_b32_e32 v2, 0
2510; CHECK-NEXT:    v_or_b32_e32 v3, v1, v5
2511; CHECK-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[2:3]
2512; CHECK-NEXT:    ; implicit-def: $vgpr2_vgpr3
2513; CHECK-NEXT:    s_and_saveexec_b64 s[4:5], vcc
2514; CHECK-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
2515; CHECK-NEXT:    s_cbranch_execz BB7_2
2516; CHECK-NEXT:  ; %bb.1:
2517; CHECK-NEXT:    v_ashrrev_i32_e32 v2, 31, v5
2518; CHECK-NEXT:    v_add_i32_e32 v3, vcc, v4, v2
2519; CHECK-NEXT:    v_addc_u32_e32 v5, vcc, v5, v2, vcc
2520; CHECK-NEXT:    v_xor_b32_e32 v3, v3, v2
2521; CHECK-NEXT:    v_xor_b32_e32 v5, v5, v2
2522; CHECK-NEXT:    v_cvt_f32_u32_e32 v6, v3
2523; CHECK-NEXT:    v_cvt_f32_u32_e32 v7, v5
2524; CHECK-NEXT:    v_ashrrev_i32_e32 v8, 31, v1
2525; CHECK-NEXT:    v_mac_f32_e32 v6, 0x4f800000, v7
2526; CHECK-NEXT:    v_rcp_iflag_f32_e32 v6, v6
2527; CHECK-NEXT:    v_add_i32_e32 v7, vcc, v0, v8
2528; CHECK-NEXT:    v_addc_u32_e32 v1, vcc, v1, v8, vcc
2529; CHECK-NEXT:    v_sub_i32_e32 v10, vcc, 0, v3
2530; CHECK-NEXT:    v_mul_f32_e32 v6, 0x5f7ffffc, v6
2531; CHECK-NEXT:    v_mul_f32_e32 v9, 0x2f800000, v6
2532; CHECK-NEXT:    v_trunc_f32_e32 v9, v9
2533; CHECK-NEXT:    v_mac_f32_e32 v6, 0xcf800000, v9
2534; CHECK-NEXT:    v_cvt_u32_f32_e32 v6, v6
2535; CHECK-NEXT:    v_cvt_u32_f32_e32 v9, v9
2536; CHECK-NEXT:    v_subb_u32_e32 v11, vcc, 0, v5, vcc
2537; CHECK-NEXT:    v_xor_b32_e32 v7, v7, v8
2538; CHECK-NEXT:    v_mul_lo_u32 v12, v11, v6
2539; CHECK-NEXT:    v_mul_lo_u32 v13, v10, v9
2540; CHECK-NEXT:    v_mul_hi_u32 v15, v10, v6
2541; CHECK-NEXT:    v_mul_lo_u32 v14, v10, v6
2542; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v8
2543; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
2544; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
2545; CHECK-NEXT:    v_mul_lo_u32 v13, v9, v14
2546; CHECK-NEXT:    v_mul_lo_u32 v15, v6, v12
2547; CHECK-NEXT:    v_mul_hi_u32 v16, v6, v14
2548; CHECK-NEXT:    v_mul_hi_u32 v14, v9, v14
2549; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v13, v15
2550; CHECK-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
2551; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
2552; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2553; CHECK-NEXT:    v_mul_lo_u32 v16, v9, v12
2554; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v15, v13
2555; CHECK-NEXT:    v_mul_hi_u32 v15, v6, v12
2556; CHECK-NEXT:    v_mul_hi_u32 v12, v9, v12
2557; CHECK-NEXT:    v_add_i32_e32 v14, vcc, v16, v14
2558; CHECK-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2559; CHECK-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
2560; CHECK-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
2561; CHECK-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
2562; CHECK-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
2563; CHECK-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
2564; CHECK-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
2565; CHECK-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
2566; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v13
2567; CHECK-NEXT:    v_addc_u32_e64 v13, s[4:5], v9, v12, vcc
2568; CHECK-NEXT:    v_mul_lo_u32 v11, v11, v6
2569; CHECK-NEXT:    v_mul_lo_u32 v14, v10, v13
2570; CHECK-NEXT:    v_mul_lo_u32 v15, v10, v6
2571; CHECK-NEXT:    v_mul_hi_u32 v10, v10, v6
2572; CHECK-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
2573; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
2574; CHECK-NEXT:    v_mul_hi_u32 v12, v6, v15
2575; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v11, v10
2576; CHECK-NEXT:    v_mul_lo_u32 v11, v13, v15
2577; CHECK-NEXT:    v_mul_lo_u32 v14, v6, v10
2578; CHECK-NEXT:    v_mul_hi_u32 v15, v13, v15
2579; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
2580; CHECK-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2581; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v12
2582; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
2583; CHECK-NEXT:    v_mul_lo_u32 v12, v13, v10
2584; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v14, v11
2585; CHECK-NEXT:    v_mul_hi_u32 v14, v6, v10
2586; CHECK-NEXT:    v_mul_hi_u32 v10, v13, v10
2587; CHECK-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
2588; CHECK-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
2589; CHECK-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2590; CHECK-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2591; CHECK-NEXT:    v_add_i32_e64 v14, s[4:5], v15, v14
2592; CHECK-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
2593; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2594; CHECK-NEXT:    v_add_i32_e64 v12, s[4:5], v14, v12
2595; CHECK-NEXT:    v_add_i32_e64 v10, s[4:5], v10, v12
2596; CHECK-NEXT:    v_addc_u32_e32 v9, vcc, v9, v10, vcc
2597; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
2598; CHECK-NEXT:    v_addc_u32_e32 v9, vcc, 0, v9, vcc
2599; CHECK-NEXT:    v_mul_lo_u32 v10, v1, v6
2600; CHECK-NEXT:    v_mul_lo_u32 v11, v7, v9
2601; CHECK-NEXT:    v_mul_hi_u32 v12, v7, v6
2602; CHECK-NEXT:    v_mul_hi_u32 v6, v1, v6
2603; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
2604; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2605; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
2606; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2607; CHECK-NEXT:    v_mul_lo_u32 v12, v1, v9
2608; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2609; CHECK-NEXT:    v_mul_hi_u32 v11, v7, v9
2610; CHECK-NEXT:    v_mul_hi_u32 v9, v1, v9
2611; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v12, v6
2612; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2613; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
2614; CHECK-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2615; CHECK-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
2616; CHECK-NEXT:    v_add_i32_e32 v6, vcc, v6, v10
2617; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
2618; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
2619; CHECK-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
2620; CHECK-NEXT:    v_mul_lo_u32 v10, v5, v6
2621; CHECK-NEXT:    v_mul_lo_u32 v11, v3, v9
2622; CHECK-NEXT:    v_mul_hi_u32 v13, v3, v6
2623; CHECK-NEXT:    v_mul_lo_u32 v12, v3, v6
2624; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v11
2625; CHECK-NEXT:    v_add_i32_e32 v10, vcc, v10, v13
2626; CHECK-NEXT:    v_sub_i32_e32 v7, vcc, v7, v12
2627; CHECK-NEXT:    v_subb_u32_e64 v11, s[4:5], v1, v10, vcc
2628; CHECK-NEXT:    v_sub_i32_e64 v1, s[4:5], v1, v10
2629; CHECK-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v5
2630; CHECK-NEXT:    v_subb_u32_e32 v1, vcc, v1, v5, vcc
2631; CHECK-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
2632; CHECK-NEXT:    v_cmp_ge_u32_e64 s[4:5], v7, v3
2633; CHECK-NEXT:    v_sub_i32_e32 v7, vcc, v7, v3
2634; CHECK-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
2635; CHECK-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
2636; CHECK-NEXT:    v_cmp_eq_u32_e64 s[4:5], v11, v5
2637; CHECK-NEXT:    v_add_i32_e32 v11, vcc, 1, v6
2638; CHECK-NEXT:    v_cndmask_b32_e64 v10, v10, v12, s[4:5]
2639; CHECK-NEXT:    v_addc_u32_e32 v12, vcc, 0, v9, vcc
2640; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v5
2641; CHECK-NEXT:    v_cndmask_b32_e64 v13, 0, -1, vcc
2642; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v7, v3
2643; CHECK-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
2644; CHECK-NEXT:    v_cmp_eq_u32_e32 vcc, v1, v5
2645; CHECK-NEXT:    v_cndmask_b32_e32 v1, v13, v3, vcc
2646; CHECK-NEXT:    v_add_i32_e32 v3, vcc, 1, v11
2647; CHECK-NEXT:    v_addc_u32_e32 v5, vcc, 0, v12, vcc
2648; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
2649; CHECK-NEXT:    v_cndmask_b32_e32 v1, v11, v3, vcc
2650; CHECK-NEXT:    v_cndmask_b32_e32 v3, v12, v5, vcc
2651; CHECK-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v10
2652; CHECK-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
2653; CHECK-NEXT:    v_xor_b32_e32 v5, v8, v2
2654; CHECK-NEXT:    v_cndmask_b32_e32 v3, v9, v3, vcc
2655; CHECK-NEXT:    v_xor_b32_e32 v1, v1, v5
2656; CHECK-NEXT:    v_xor_b32_e32 v3, v3, v5
2657; CHECK-NEXT:    v_sub_i32_e32 v2, vcc, v1, v5
2658; CHECK-NEXT:    v_subb_u32_e32 v3, vcc, v3, v5, vcc
2659; CHECK-NEXT:  BB7_2: ; %Flow
2660; CHECK-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
2661; CHECK-NEXT:    s_xor_b64 exec, exec, s[6:7]
2662; CHECK-NEXT:    s_cbranch_execz BB7_4
2663; CHECK-NEXT:  ; %bb.3:
2664; CHECK-NEXT:    v_cvt_f32_u32_e32 v1, v4
2665; CHECK-NEXT:    v_sub_i32_e32 v2, vcc, 0, v4
2666; CHECK-NEXT:    v_rcp_iflag_f32_e32 v1, v1
2667; CHECK-NEXT:    v_mul_f32_e32 v1, 0x4f7ffffe, v1
2668; CHECK-NEXT:    v_cvt_u32_f32_e32 v1, v1
2669; CHECK-NEXT:    v_mul_lo_u32 v2, v2, v1
2670; CHECK-NEXT:    v_mul_hi_u32 v2, v1, v2
2671; CHECK-NEXT:    v_add_i32_e32 v1, vcc, v1, v2
2672; CHECK-NEXT:    v_mul_hi_u32 v1, v0, v1
2673; CHECK-NEXT:    v_mul_lo_u32 v2, v1, v4
2674; CHECK-NEXT:    v_add_i32_e32 v3, vcc, 1, v1
2675; CHECK-NEXT:    v_sub_i32_e32 v0, vcc, v0, v2
2676; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
2677; CHECK-NEXT:    v_sub_i32_e64 v2, s[4:5], v0, v4
2678; CHECK-NEXT:    v_cndmask_b32_e32 v1, v1, v3, vcc
2679; CHECK-NEXT:    v_cndmask_b32_e32 v0, v0, v2, vcc
2680; CHECK-NEXT:    v_add_i32_e32 v2, vcc, 1, v1
2681; CHECK-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v4
2682; CHECK-NEXT:    v_cndmask_b32_e32 v2, v1, v2, vcc
2683; CHECK-NEXT:    v_mov_b32_e32 v3, 0
2684; CHECK-NEXT:  BB7_4:
2685; CHECK-NEXT:    s_or_b64 exec, exec, s[6:7]
2686; CHECK-NEXT:    v_mov_b32_e32 v0, v2
2687; CHECK-NEXT:    v_mov_b32_e32 v1, v3
2688; CHECK-NEXT:    s_setpc_b64 s[30:31]
2689  %shl.y = shl i64 4096, %y
2690  %r = sdiv i64 %x, %shl.y
2691  ret i64 %r
2692}
2693
2694define <2 x i64> @v_sdiv_v2i64_pow2_shl_denom(<2 x i64> %x, <2 x i64> %y) {
2695; GISEL-LABEL: v_sdiv_v2i64_pow2_shl_denom:
2696; GISEL:       ; %bb.0:
2697; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2698; GISEL-NEXT:    s_movk_i32 s6, 0x1000
2699; GISEL-NEXT:    s_mov_b32 s7, 0
2700; GISEL-NEXT:    v_lshl_b64 v[4:5], s[6:7], v4
2701; GISEL-NEXT:    v_ashrrev_i32_e32 v10, 31, v1
2702; GISEL-NEXT:    v_ashrrev_i32_e32 v7, 31, v5
2703; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
2704; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, v5, v7, vcc
2705; GISEL-NEXT:    v_xor_b32_e32 v4, v4, v7
2706; GISEL-NEXT:    v_xor_b32_e32 v5, v5, v7
2707; GISEL-NEXT:    v_cvt_f32_u32_e32 v8, v4
2708; GISEL-NEXT:    v_cvt_f32_u32_e32 v9, v5
2709; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v10
2710; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v10, vcc
2711; GISEL-NEXT:    v_sub_i32_e32 v11, vcc, 0, v4
2712; GISEL-NEXT:    v_mac_f32_e32 v8, 0x4f800000, v9
2713; GISEL-NEXT:    v_rcp_iflag_f32_e32 v8, v8
2714; GISEL-NEXT:    v_xor_b32_e32 v9, v0, v10
2715; GISEL-NEXT:    v_subb_u32_e32 v12, vcc, 0, v5, vcc
2716; GISEL-NEXT:    v_xor_b32_e32 v17, v1, v10
2717; GISEL-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v8
2718; GISEL-NEXT:    v_mul_f32_e32 v8, 0x2f800000, v0
2719; GISEL-NEXT:    v_trunc_f32_e32 v8, v8
2720; GISEL-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v8
2721; GISEL-NEXT:    v_cvt_u32_f32_e32 v0, v0
2722; GISEL-NEXT:    v_cvt_u32_f32_e32 v8, v8
2723; GISEL-NEXT:    v_mul_lo_u32 v13, v12, v0
2724; GISEL-NEXT:    v_mul_lo_u32 v14, v11, v8
2725; GISEL-NEXT:    v_mul_hi_u32 v16, v11, v0
2726; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v0
2727; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
2728; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
2729; GISEL-NEXT:    v_mul_lo_u32 v14, v8, v15
2730; GISEL-NEXT:    v_mul_lo_u32 v16, v0, v13
2731; GISEL-NEXT:    v_mul_hi_u32 v1, v0, v15
2732; GISEL-NEXT:    v_mul_hi_u32 v15, v8, v15
2733; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
2734; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2735; GISEL-NEXT:    v_add_i32_e32 v1, vcc, v14, v1
2736; GISEL-NEXT:    v_cndmask_b32_e64 v1, 0, 1, vcc
2737; GISEL-NEXT:    v_mul_lo_u32 v14, v8, v13
2738; GISEL-NEXT:    v_add_i32_e32 v1, vcc, v16, v1
2739; GISEL-NEXT:    v_mul_hi_u32 v16, v0, v13
2740; GISEL-NEXT:    v_mul_hi_u32 v13, v8, v13
2741; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
2742; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
2743; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
2744; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2745; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v16
2746; GISEL-NEXT:    v_add_i32_e32 v1, vcc, v14, v1
2747; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
2748; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
2749; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
2750; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
2751; GISEL-NEXT:    v_addc_u32_e64 v1, s[4:5], v8, v13, vcc
2752; GISEL-NEXT:    v_mul_lo_u32 v12, v12, v0
2753; GISEL-NEXT:    v_mul_lo_u32 v14, v11, v1
2754; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v0
2755; GISEL-NEXT:    v_mul_hi_u32 v11, v11, v0
2756; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v13
2757; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2758; GISEL-NEXT:    v_mul_hi_u32 v13, v0, v15
2759; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
2760; GISEL-NEXT:    v_mul_lo_u32 v12, v1, v15
2761; GISEL-NEXT:    v_mul_lo_u32 v14, v0, v11
2762; GISEL-NEXT:    v_mul_hi_u32 v15, v1, v15
2763; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
2764; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2765; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
2766; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2767; GISEL-NEXT:    v_mul_lo_u32 v13, v1, v11
2768; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v14, v12
2769; GISEL-NEXT:    v_mul_hi_u32 v14, v0, v11
2770; GISEL-NEXT:    v_mul_hi_u32 v1, v1, v11
2771; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v15
2772; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
2773; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
2774; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
2775; GISEL-NEXT:    v_add_i32_e64 v14, s[4:5], v15, v14
2776; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
2777; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2778; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v14, v13
2779; GISEL-NEXT:    v_add_i32_e64 v1, s[4:5], v1, v11
2780; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v8, v1, vcc
2781; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v0, v12
2782; GISEL-NEXT:    v_addc_u32_e32 v11, vcc, 0, v1, vcc
2783; GISEL-NEXT:    v_mul_lo_u32 v12, v17, v8
2784; GISEL-NEXT:    v_mul_lo_u32 v13, v9, v11
2785; GISEL-NEXT:    v_lshl_b64 v[0:1], s[6:7], v6
2786; GISEL-NEXT:    v_mul_hi_u32 v6, v9, v8
2787; GISEL-NEXT:    v_mul_hi_u32 v8, v17, v8
2788; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
2789; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2790; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v12, v6
2791; GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
2792; GISEL-NEXT:    v_mul_lo_u32 v12, v17, v11
2793; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v13, v6
2794; GISEL-NEXT:    v_mul_hi_u32 v13, v9, v11
2795; GISEL-NEXT:    v_mul_hi_u32 v11, v17, v11
2796; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v12, v8
2797; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
2798; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v8, v13
2799; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
2800; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
2801; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v8, v6
2802; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
2803; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v12, v8
2804; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v11, v8
2805; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v6
2806; GISEL-NEXT:    v_mul_lo_u32 v12, v4, v8
2807; GISEL-NEXT:    v_mul_hi_u32 v14, v4, v6
2808; GISEL-NEXT:    v_mul_lo_u32 v13, v4, v6
2809; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
2810; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v14
2811; GISEL-NEXT:    v_sub_i32_e32 v9, vcc, v9, v13
2812; GISEL-NEXT:    v_subb_u32_e64 v12, s[4:5], v17, v11, vcc
2813; GISEL-NEXT:    v_sub_i32_e64 v11, s[4:5], v17, v11
2814; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v12, v5
2815; GISEL-NEXT:    v_subb_u32_e32 v11, vcc, v11, v5, vcc
2816; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, -1, s[4:5]
2817; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v9, v4
2818; GISEL-NEXT:    v_sub_i32_e32 v9, vcc, v9, v4
2819; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
2820; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v12, v5
2821; GISEL-NEXT:    v_subbrev_u32_e32 v11, vcc, 0, v11, vcc
2822; GISEL-NEXT:    v_cndmask_b32_e64 v12, v13, v14, s[4:5]
2823; GISEL-NEXT:    v_add_i32_e32 v13, vcc, 1, v6
2824; GISEL-NEXT:    v_addc_u32_e32 v14, vcc, 0, v8, vcc
2825; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v11, v5
2826; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, -1, vcc
2827; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v9, v4
2828; GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, -1, vcc
2829; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v11, v5
2830; GISEL-NEXT:    v_cndmask_b32_e32 v4, v15, v4, vcc
2831; GISEL-NEXT:    v_add_i32_e32 v5, vcc, 1, v13
2832; GISEL-NEXT:    v_addc_u32_e32 v9, vcc, 0, v14, vcc
2833; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v4
2834; GISEL-NEXT:    v_cndmask_b32_e32 v4, v13, v5, vcc
2835; GISEL-NEXT:    v_cndmask_b32_e32 v5, v14, v9, vcc
2836; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12
2837; GISEL-NEXT:    v_cndmask_b32_e32 v4, v6, v4, vcc
2838; GISEL-NEXT:    v_xor_b32_e32 v6, v10, v7
2839; GISEL-NEXT:    v_ashrrev_i32_e32 v7, 31, v1
2840; GISEL-NEXT:    v_cndmask_b32_e32 v5, v8, v5, vcc
2841; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v7
2842; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v7, vcc
2843; GISEL-NEXT:    v_xor_b32_e32 v8, v0, v7
2844; GISEL-NEXT:    v_xor_b32_e32 v9, v1, v7
2845; GISEL-NEXT:    v_cvt_f32_u32_e32 v0, v8
2846; GISEL-NEXT:    v_cvt_f32_u32_e32 v1, v9
2847; GISEL-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
2848; GISEL-NEXT:    v_xor_b32_e32 v4, v4, v6
2849; GISEL-NEXT:    v_xor_b32_e32 v5, v5, v6
2850; GISEL-NEXT:    v_mac_f32_e32 v0, 0x4f800000, v1
2851; GISEL-NEXT:    v_rcp_iflag_f32_e32 v0, v0
2852; GISEL-NEXT:    v_add_i32_e32 v1, vcc, v2, v10
2853; GISEL-NEXT:    v_addc_u32_e32 v2, vcc, v3, v10, vcc
2854; GISEL-NEXT:    v_xor_b32_e32 v3, v1, v10
2855; GISEL-NEXT:    v_mul_f32_e32 v0, 0x5f7ffffc, v0
2856; GISEL-NEXT:    v_mul_f32_e32 v1, 0x2f800000, v0
2857; GISEL-NEXT:    v_trunc_f32_e32 v1, v1
2858; GISEL-NEXT:    v_mac_f32_e32 v0, 0xcf800000, v1
2859; GISEL-NEXT:    v_cvt_u32_f32_e32 v0, v0
2860; GISEL-NEXT:    v_cvt_u32_f32_e32 v1, v1
2861; GISEL-NEXT:    v_sub_i32_e32 v11, vcc, 0, v8
2862; GISEL-NEXT:    v_subb_u32_e32 v12, vcc, 0, v9, vcc
2863; GISEL-NEXT:    v_mul_lo_u32 v13, v12, v0
2864; GISEL-NEXT:    v_mul_lo_u32 v14, v11, v1
2865; GISEL-NEXT:    v_mul_hi_u32 v16, v11, v0
2866; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v0
2867; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v10
2868; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
2869; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v16
2870; GISEL-NEXT:    v_mul_lo_u32 v14, v1, v15
2871; GISEL-NEXT:    v_mul_lo_u32 v16, v0, v13
2872; GISEL-NEXT:    v_mul_hi_u32 v17, v0, v15
2873; GISEL-NEXT:    v_mul_hi_u32 v15, v1, v15
2874; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
2875; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2876; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
2877; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
2878; GISEL-NEXT:    v_mul_lo_u32 v17, v1, v13
2879; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v16, v14
2880; GISEL-NEXT:    v_mul_hi_u32 v16, v0, v13
2881; GISEL-NEXT:    v_mul_hi_u32 v13, v1, v13
2882; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
2883; GISEL-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
2884; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v15, v16
2885; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
2886; GISEL-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
2887; GISEL-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
2888; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
2889; GISEL-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
2890; GISEL-NEXT:    v_add_i32_e32 v13, vcc, v13, v15
2891; GISEL-NEXT:    v_add_i32_e32 v0, vcc, v0, v14
2892; GISEL-NEXT:    v_addc_u32_e64 v14, s[4:5], v1, v13, vcc
2893; GISEL-NEXT:    v_mul_lo_u32 v12, v12, v0
2894; GISEL-NEXT:    v_mul_lo_u32 v15, v11, v14
2895; GISEL-NEXT:    v_mul_lo_u32 v16, v11, v0
2896; GISEL-NEXT:    v_mul_hi_u32 v11, v11, v0
2897; GISEL-NEXT:    v_add_i32_e64 v1, s[4:5], v1, v13
2898; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
2899; GISEL-NEXT:    v_mul_hi_u32 v13, v0, v16
2900; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
2901; GISEL-NEXT:    v_mul_lo_u32 v12, v14, v16
2902; GISEL-NEXT:    v_mul_lo_u32 v15, v0, v11
2903; GISEL-NEXT:    v_mul_hi_u32 v16, v14, v16
2904; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v15
2905; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
2906; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v13
2907; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
2908; GISEL-NEXT:    v_mul_lo_u32 v13, v14, v11
2909; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v15, v12
2910; GISEL-NEXT:    v_mul_hi_u32 v15, v0, v11
2911; GISEL-NEXT:    v_mul_hi_u32 v11, v14, v11
2912; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
2913; GISEL-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
2914; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v15
2915; GISEL-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
2916; GISEL-NEXT:    v_add_i32_e64 v15, s[4:5], v16, v15
2917; GISEL-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
2918; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
2919; GISEL-NEXT:    v_add_i32_e64 v13, s[4:5], v15, v13
2920; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v13
2921; GISEL-NEXT:    v_addc_u32_e32 v1, vcc, v1, v11, vcc
2922; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v0, v12
2923; GISEL-NEXT:    v_addc_u32_e32 v12, vcc, 0, v1, vcc
2924; GISEL-NEXT:    v_mul_lo_u32 v13, v2, v11
2925; GISEL-NEXT:    v_mul_lo_u32 v14, v3, v12
2926; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v4, v6
2927; GISEL-NEXT:    v_mul_hi_u32 v4, v3, v11
2928; GISEL-NEXT:    v_subb_u32_e32 v1, vcc, v5, v6, vcc
2929; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v13, v14
2930; GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
2931; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
2932; GISEL-NEXT:    v_cndmask_b32_e64 v4, 0, 1, vcc
2933; GISEL-NEXT:    v_mul_lo_u32 v5, v2, v12
2934; GISEL-NEXT:    v_mul_hi_u32 v11, v2, v11
2935; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v6, v4
2936; GISEL-NEXT:    v_mul_hi_u32 v6, v3, v12
2937; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v11
2938; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
2939; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v6
2940; GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, 1, vcc
2941; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v11, v6
2942; GISEL-NEXT:    v_mul_hi_u32 v11, v2, v12
2943; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v5, v4
2944; GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
2945; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v6, v5
2946; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v11, v5
2947; GISEL-NEXT:    v_mul_lo_u32 v6, v9, v4
2948; GISEL-NEXT:    v_mul_lo_u32 v11, v8, v5
2949; GISEL-NEXT:    v_mul_hi_u32 v13, v8, v4
2950; GISEL-NEXT:    v_mul_lo_u32 v12, v8, v4
2951; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v11
2952; GISEL-NEXT:    v_add_i32_e32 v6, vcc, v6, v13
2953; GISEL-NEXT:    v_sub_i32_e32 v3, vcc, v3, v12
2954; GISEL-NEXT:    v_subb_u32_e64 v11, s[4:5], v2, v6, vcc
2955; GISEL-NEXT:    v_sub_i32_e64 v2, s[4:5], v2, v6
2956; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v9
2957; GISEL-NEXT:    v_subb_u32_e32 v2, vcc, v2, v9, vcc
2958; GISEL-NEXT:    v_cndmask_b32_e64 v6, 0, -1, s[4:5]
2959; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v3, v8
2960; GISEL-NEXT:    v_sub_i32_e32 v3, vcc, v3, v8
2961; GISEL-NEXT:    v_subbrev_u32_e32 v2, vcc, 0, v2, vcc
2962; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
2963; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v11, v9
2964; GISEL-NEXT:    v_add_i32_e32 v11, vcc, 1, v4
2965; GISEL-NEXT:    v_cndmask_b32_e64 v6, v6, v12, s[4:5]
2966; GISEL-NEXT:    v_addc_u32_e32 v12, vcc, 0, v5, vcc
2967; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v9
2968; GISEL-NEXT:    v_cndmask_b32_e64 v13, 0, -1, vcc
2969; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v8
2970; GISEL-NEXT:    v_cndmask_b32_e64 v3, 0, -1, vcc
2971; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v2, v9
2972; GISEL-NEXT:    v_cndmask_b32_e32 v2, v13, v3, vcc
2973; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v11
2974; GISEL-NEXT:    v_addc_u32_e32 v8, vcc, 0, v12, vcc
2975; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
2976; GISEL-NEXT:    v_cndmask_b32_e32 v2, v11, v3, vcc
2977; GISEL-NEXT:    v_cndmask_b32_e32 v3, v12, v8, vcc
2978; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v6
2979; GISEL-NEXT:    v_cndmask_b32_e32 v2, v4, v2, vcc
2980; GISEL-NEXT:    v_xor_b32_e32 v4, v10, v7
2981; GISEL-NEXT:    v_cndmask_b32_e32 v3, v5, v3, vcc
2982; GISEL-NEXT:    v_xor_b32_e32 v2, v2, v4
2983; GISEL-NEXT:    v_xor_b32_e32 v3, v3, v4
2984; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v4
2985; GISEL-NEXT:    v_subb_u32_e32 v3, vcc, v3, v4, vcc
2986; GISEL-NEXT:    s_setpc_b64 s[30:31]
2987;
2988; CGP-LABEL: v_sdiv_v2i64_pow2_shl_denom:
2989; CGP:       ; %bb.0:
2990; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2991; CGP-NEXT:    s_movk_i32 s4, 0x1000
2992; CGP-NEXT:    s_mov_b32 s5, 0
2993; CGP-NEXT:    v_lshl_b64 v[10:11], s[4:5], v4
2994; CGP-NEXT:    v_mov_b32_e32 v7, v1
2995; CGP-NEXT:    v_mov_b32_e32 v5, v0
2996; CGP-NEXT:    v_or_b32_e32 v1, v7, v11
2997; CGP-NEXT:    v_mov_b32_e32 v0, 0
2998; CGP-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[0:1]
2999; CGP-NEXT:    v_lshl_b64 v[8:9], s[4:5], v6
3000; CGP-NEXT:    ; implicit-def: $vgpr0_vgpr1
3001; CGP-NEXT:    s_and_saveexec_b64 s[4:5], vcc
3002; CGP-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
3003; CGP-NEXT:    s_cbranch_execz BB8_2
3004; CGP-NEXT:  ; %bb.1:
3005; CGP-NEXT:    v_ashrrev_i32_e32 v0, 31, v11
3006; CGP-NEXT:    v_add_i32_e32 v1, vcc, v10, v0
3007; CGP-NEXT:    v_addc_u32_e32 v4, vcc, v11, v0, vcc
3008; CGP-NEXT:    v_xor_b32_e32 v1, v1, v0
3009; CGP-NEXT:    v_xor_b32_e32 v4, v4, v0
3010; CGP-NEXT:    v_cvt_f32_u32_e32 v6, v1
3011; CGP-NEXT:    v_cvt_f32_u32_e32 v11, v4
3012; CGP-NEXT:    v_ashrrev_i32_e32 v12, 31, v7
3013; CGP-NEXT:    v_mac_f32_e32 v6, 0x4f800000, v11
3014; CGP-NEXT:    v_rcp_iflag_f32_e32 v6, v6
3015; CGP-NEXT:    v_add_i32_e32 v11, vcc, v5, v12
3016; CGP-NEXT:    v_addc_u32_e32 v7, vcc, v7, v12, vcc
3017; CGP-NEXT:    v_sub_i32_e32 v14, vcc, 0, v1
3018; CGP-NEXT:    v_mul_f32_e32 v6, 0x5f7ffffc, v6
3019; CGP-NEXT:    v_mul_f32_e32 v13, 0x2f800000, v6
3020; CGP-NEXT:    v_trunc_f32_e32 v13, v13
3021; CGP-NEXT:    v_mac_f32_e32 v6, 0xcf800000, v13
3022; CGP-NEXT:    v_cvt_u32_f32_e32 v6, v6
3023; CGP-NEXT:    v_cvt_u32_f32_e32 v13, v13
3024; CGP-NEXT:    v_subb_u32_e32 v15, vcc, 0, v4, vcc
3025; CGP-NEXT:    v_xor_b32_e32 v11, v11, v12
3026; CGP-NEXT:    v_mul_lo_u32 v16, v15, v6
3027; CGP-NEXT:    v_mul_lo_u32 v17, v14, v13
3028; CGP-NEXT:    v_mul_hi_u32 v19, v14, v6
3029; CGP-NEXT:    v_mul_lo_u32 v18, v14, v6
3030; CGP-NEXT:    v_xor_b32_e32 v7, v7, v12
3031; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v17
3032; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v19
3033; CGP-NEXT:    v_mul_lo_u32 v17, v13, v18
3034; CGP-NEXT:    v_mul_lo_u32 v19, v6, v16
3035; CGP-NEXT:    v_mul_hi_u32 v20, v6, v18
3036; CGP-NEXT:    v_mul_hi_u32 v18, v13, v18
3037; CGP-NEXT:    v_add_i32_e32 v17, vcc, v17, v19
3038; CGP-NEXT:    v_cndmask_b32_e64 v19, 0, 1, vcc
3039; CGP-NEXT:    v_add_i32_e32 v17, vcc, v17, v20
3040; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
3041; CGP-NEXT:    v_mul_lo_u32 v20, v13, v16
3042; CGP-NEXT:    v_add_i32_e32 v17, vcc, v19, v17
3043; CGP-NEXT:    v_mul_hi_u32 v19, v6, v16
3044; CGP-NEXT:    v_mul_hi_u32 v16, v13, v16
3045; CGP-NEXT:    v_add_i32_e32 v18, vcc, v20, v18
3046; CGP-NEXT:    v_cndmask_b32_e64 v20, 0, 1, vcc
3047; CGP-NEXT:    v_add_i32_e32 v18, vcc, v18, v19
3048; CGP-NEXT:    v_cndmask_b32_e64 v19, 0, 1, vcc
3049; CGP-NEXT:    v_add_i32_e32 v19, vcc, v20, v19
3050; CGP-NEXT:    v_add_i32_e32 v17, vcc, v18, v17
3051; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, vcc
3052; CGP-NEXT:    v_add_i32_e32 v18, vcc, v19, v18
3053; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v18
3054; CGP-NEXT:    v_add_i32_e32 v6, vcc, v6, v17
3055; CGP-NEXT:    v_addc_u32_e64 v17, s[4:5], v13, v16, vcc
3056; CGP-NEXT:    v_mul_lo_u32 v15, v15, v6
3057; CGP-NEXT:    v_mul_lo_u32 v18, v14, v17
3058; CGP-NEXT:    v_mul_lo_u32 v19, v14, v6
3059; CGP-NEXT:    v_mul_hi_u32 v14, v14, v6
3060; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
3061; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v15, v18
3062; CGP-NEXT:    v_mul_hi_u32 v16, v6, v19
3063; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v15, v14
3064; CGP-NEXT:    v_mul_lo_u32 v15, v17, v19
3065; CGP-NEXT:    v_mul_lo_u32 v18, v6, v14
3066; CGP-NEXT:    v_mul_hi_u32 v19, v17, v19
3067; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v15, v18
3068; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, s[4:5]
3069; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v15, v16
3070; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, s[4:5]
3071; CGP-NEXT:    v_mul_lo_u32 v16, v17, v14
3072; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v18, v15
3073; CGP-NEXT:    v_mul_hi_u32 v18, v6, v14
3074; CGP-NEXT:    v_mul_hi_u32 v14, v17, v14
3075; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v16, v19
3076; CGP-NEXT:    v_cndmask_b32_e64 v19, 0, 1, s[4:5]
3077; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v16, v18
3078; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, s[4:5]
3079; CGP-NEXT:    v_add_i32_e64 v18, s[4:5], v19, v18
3080; CGP-NEXT:    v_add_i32_e64 v15, s[4:5], v16, v15
3081; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
3082; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v18, v16
3083; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v16
3084; CGP-NEXT:    v_addc_u32_e32 v13, vcc, v13, v14, vcc
3085; CGP-NEXT:    v_add_i32_e32 v6, vcc, v6, v15
3086; CGP-NEXT:    v_addc_u32_e32 v13, vcc, 0, v13, vcc
3087; CGP-NEXT:    v_mul_lo_u32 v14, v7, v6
3088; CGP-NEXT:    v_mul_lo_u32 v15, v11, v13
3089; CGP-NEXT:    v_mul_hi_u32 v16, v11, v6
3090; CGP-NEXT:    v_mul_hi_u32 v6, v7, v6
3091; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
3092; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
3093; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
3094; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
3095; CGP-NEXT:    v_mul_lo_u32 v16, v7, v13
3096; CGP-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
3097; CGP-NEXT:    v_mul_hi_u32 v15, v11, v13
3098; CGP-NEXT:    v_mul_hi_u32 v13, v7, v13
3099; CGP-NEXT:    v_add_i32_e32 v6, vcc, v16, v6
3100; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
3101; CGP-NEXT:    v_add_i32_e32 v6, vcc, v6, v15
3102; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
3103; CGP-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
3104; CGP-NEXT:    v_add_i32_e32 v6, vcc, v6, v14
3105; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
3106; CGP-NEXT:    v_add_i32_e32 v14, vcc, v15, v14
3107; CGP-NEXT:    v_add_i32_e32 v13, vcc, v13, v14
3108; CGP-NEXT:    v_mul_lo_u32 v14, v4, v6
3109; CGP-NEXT:    v_mul_lo_u32 v15, v1, v13
3110; CGP-NEXT:    v_mul_hi_u32 v17, v1, v6
3111; CGP-NEXT:    v_mul_lo_u32 v16, v1, v6
3112; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
3113; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
3114; CGP-NEXT:    v_sub_i32_e32 v11, vcc, v11, v16
3115; CGP-NEXT:    v_subb_u32_e64 v15, s[4:5], v7, v14, vcc
3116; CGP-NEXT:    v_sub_i32_e64 v7, s[4:5], v7, v14
3117; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v15, v4
3118; CGP-NEXT:    v_subb_u32_e32 v7, vcc, v7, v4, vcc
3119; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
3120; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v11, v1
3121; CGP-NEXT:    v_sub_i32_e32 v11, vcc, v11, v1
3122; CGP-NEXT:    v_subbrev_u32_e32 v7, vcc, 0, v7, vcc
3123; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, -1, s[4:5]
3124; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], v15, v4
3125; CGP-NEXT:    v_add_i32_e32 v15, vcc, 1, v6
3126; CGP-NEXT:    v_cndmask_b32_e64 v14, v14, v16, s[4:5]
3127; CGP-NEXT:    v_addc_u32_e32 v16, vcc, 0, v13, vcc
3128; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v7, v4
3129; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, -1, vcc
3130; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v11, v1
3131; CGP-NEXT:    v_cndmask_b32_e64 v1, 0, -1, vcc
3132; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, v7, v4
3133; CGP-NEXT:    v_cndmask_b32_e32 v1, v17, v1, vcc
3134; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v15
3135; CGP-NEXT:    v_addc_u32_e32 v7, vcc, 0, v16, vcc
3136; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v1
3137; CGP-NEXT:    v_cndmask_b32_e32 v1, v15, v4, vcc
3138; CGP-NEXT:    v_cndmask_b32_e32 v4, v16, v7, vcc
3139; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v14
3140; CGP-NEXT:    v_cndmask_b32_e32 v1, v6, v1, vcc
3141; CGP-NEXT:    v_xor_b32_e32 v6, v12, v0
3142; CGP-NEXT:    v_cndmask_b32_e32 v4, v13, v4, vcc
3143; CGP-NEXT:    v_xor_b32_e32 v0, v1, v6
3144; CGP-NEXT:    v_xor_b32_e32 v1, v4, v6
3145; CGP-NEXT:    v_sub_i32_e32 v0, vcc, v0, v6
3146; CGP-NEXT:    v_subb_u32_e32 v1, vcc, v1, v6, vcc
3147; CGP-NEXT:  BB8_2: ; %Flow2
3148; CGP-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
3149; CGP-NEXT:    s_xor_b64 exec, exec, s[6:7]
3150; CGP-NEXT:    s_cbranch_execz BB8_4
3151; CGP-NEXT:  ; %bb.3:
3152; CGP-NEXT:    v_cvt_f32_u32_e32 v0, v10
3153; CGP-NEXT:    v_sub_i32_e32 v1, vcc, 0, v10
3154; CGP-NEXT:    v_rcp_iflag_f32_e32 v0, v0
3155; CGP-NEXT:    v_mul_f32_e32 v0, 0x4f7ffffe, v0
3156; CGP-NEXT:    v_cvt_u32_f32_e32 v0, v0
3157; CGP-NEXT:    v_mul_lo_u32 v1, v1, v0
3158; CGP-NEXT:    v_mul_hi_u32 v1, v0, v1
3159; CGP-NEXT:    v_add_i32_e32 v0, vcc, v0, v1
3160; CGP-NEXT:    v_mul_hi_u32 v0, v5, v0
3161; CGP-NEXT:    v_mul_lo_u32 v1, v0, v10
3162; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v0
3163; CGP-NEXT:    v_sub_i32_e32 v1, vcc, v5, v1
3164; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v10
3165; CGP-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc
3166; CGP-NEXT:    v_sub_i32_e64 v4, s[4:5], v1, v10
3167; CGP-NEXT:    v_cndmask_b32_e32 v1, v1, v4, vcc
3168; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v0
3169; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v1, v10
3170; CGP-NEXT:    v_cndmask_b32_e32 v0, v0, v4, vcc
3171; CGP-NEXT:    v_mov_b32_e32 v1, 0
3172; CGP-NEXT:  BB8_4:
3173; CGP-NEXT:    s_or_b64 exec, exec, s[6:7]
3174; CGP-NEXT:    v_or_b32_e32 v5, v3, v9
3175; CGP-NEXT:    v_mov_b32_e32 v4, 0
3176; CGP-NEXT:    v_cmp_ne_u64_e32 vcc, 0, v[4:5]
3177; CGP-NEXT:    ; implicit-def: $vgpr4_vgpr5
3178; CGP-NEXT:    s_and_saveexec_b64 s[4:5], vcc
3179; CGP-NEXT:    s_xor_b64 s[6:7], exec, s[4:5]
3180; CGP-NEXT:    s_cbranch_execz BB8_6
3181; CGP-NEXT:  ; %bb.5:
3182; CGP-NEXT:    v_ashrrev_i32_e32 v4, 31, v9
3183; CGP-NEXT:    v_add_i32_e32 v5, vcc, v8, v4
3184; CGP-NEXT:    v_addc_u32_e32 v6, vcc, v9, v4, vcc
3185; CGP-NEXT:    v_xor_b32_e32 v5, v5, v4
3186; CGP-NEXT:    v_xor_b32_e32 v6, v6, v4
3187; CGP-NEXT:    v_cvt_f32_u32_e32 v7, v5
3188; CGP-NEXT:    v_cvt_f32_u32_e32 v9, v6
3189; CGP-NEXT:    v_ashrrev_i32_e32 v10, 31, v3
3190; CGP-NEXT:    v_mac_f32_e32 v7, 0x4f800000, v9
3191; CGP-NEXT:    v_rcp_iflag_f32_e32 v7, v7
3192; CGP-NEXT:    v_add_i32_e32 v9, vcc, v2, v10
3193; CGP-NEXT:    v_addc_u32_e32 v3, vcc, v3, v10, vcc
3194; CGP-NEXT:    v_sub_i32_e32 v12, vcc, 0, v5
3195; CGP-NEXT:    v_mul_f32_e32 v7, 0x5f7ffffc, v7
3196; CGP-NEXT:    v_mul_f32_e32 v11, 0x2f800000, v7
3197; CGP-NEXT:    v_trunc_f32_e32 v11, v11
3198; CGP-NEXT:    v_mac_f32_e32 v7, 0xcf800000, v11
3199; CGP-NEXT:    v_cvt_u32_f32_e32 v7, v7
3200; CGP-NEXT:    v_cvt_u32_f32_e32 v11, v11
3201; CGP-NEXT:    v_subb_u32_e32 v13, vcc, 0, v6, vcc
3202; CGP-NEXT:    v_xor_b32_e32 v9, v9, v10
3203; CGP-NEXT:    v_mul_lo_u32 v14, v13, v7
3204; CGP-NEXT:    v_mul_lo_u32 v15, v12, v11
3205; CGP-NEXT:    v_mul_hi_u32 v17, v12, v7
3206; CGP-NEXT:    v_mul_lo_u32 v16, v12, v7
3207; CGP-NEXT:    v_xor_b32_e32 v3, v3, v10
3208; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v15
3209; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v17
3210; CGP-NEXT:    v_mul_lo_u32 v15, v11, v16
3211; CGP-NEXT:    v_mul_lo_u32 v17, v7, v14
3212; CGP-NEXT:    v_mul_hi_u32 v18, v7, v16
3213; CGP-NEXT:    v_mul_hi_u32 v16, v11, v16
3214; CGP-NEXT:    v_add_i32_e32 v15, vcc, v15, v17
3215; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
3216; CGP-NEXT:    v_add_i32_e32 v15, vcc, v15, v18
3217; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, 1, vcc
3218; CGP-NEXT:    v_mul_lo_u32 v18, v11, v14
3219; CGP-NEXT:    v_add_i32_e32 v15, vcc, v17, v15
3220; CGP-NEXT:    v_mul_hi_u32 v17, v7, v14
3221; CGP-NEXT:    v_mul_hi_u32 v14, v11, v14
3222; CGP-NEXT:    v_add_i32_e32 v16, vcc, v18, v16
3223; CGP-NEXT:    v_cndmask_b32_e64 v18, 0, 1, vcc
3224; CGP-NEXT:    v_add_i32_e32 v16, vcc, v16, v17
3225; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, vcc
3226; CGP-NEXT:    v_add_i32_e32 v17, vcc, v18, v17
3227; CGP-NEXT:    v_add_i32_e32 v15, vcc, v16, v15
3228; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, vcc
3229; CGP-NEXT:    v_add_i32_e32 v16, vcc, v17, v16
3230; CGP-NEXT:    v_add_i32_e32 v14, vcc, v14, v16
3231; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v15
3232; CGP-NEXT:    v_addc_u32_e64 v15, s[4:5], v11, v14, vcc
3233; CGP-NEXT:    v_mul_lo_u32 v13, v13, v7
3234; CGP-NEXT:    v_mul_lo_u32 v16, v12, v15
3235; CGP-NEXT:    v_mul_lo_u32 v17, v12, v7
3236; CGP-NEXT:    v_mul_hi_u32 v12, v12, v7
3237; CGP-NEXT:    v_add_i32_e64 v11, s[4:5], v11, v14
3238; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
3239; CGP-NEXT:    v_mul_hi_u32 v14, v7, v17
3240; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v13, v12
3241; CGP-NEXT:    v_mul_lo_u32 v13, v15, v17
3242; CGP-NEXT:    v_mul_lo_u32 v16, v7, v12
3243; CGP-NEXT:    v_mul_hi_u32 v17, v15, v17
3244; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v16
3245; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
3246; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v13, v14
3247; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, s[4:5]
3248; CGP-NEXT:    v_mul_lo_u32 v14, v15, v12
3249; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v16, v13
3250; CGP-NEXT:    v_mul_hi_u32 v16, v7, v12
3251; CGP-NEXT:    v_mul_hi_u32 v12, v15, v12
3252; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v17
3253; CGP-NEXT:    v_cndmask_b32_e64 v17, 0, 1, s[4:5]
3254; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v14, v16
3255; CGP-NEXT:    v_cndmask_b32_e64 v16, 0, 1, s[4:5]
3256; CGP-NEXT:    v_add_i32_e64 v16, s[4:5], v17, v16
3257; CGP-NEXT:    v_add_i32_e64 v13, s[4:5], v14, v13
3258; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, s[4:5]
3259; CGP-NEXT:    v_add_i32_e64 v14, s[4:5], v16, v14
3260; CGP-NEXT:    v_add_i32_e64 v12, s[4:5], v12, v14
3261; CGP-NEXT:    v_addc_u32_e32 v11, vcc, v11, v12, vcc
3262; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v13
3263; CGP-NEXT:    v_addc_u32_e32 v11, vcc, 0, v11, vcc
3264; CGP-NEXT:    v_mul_lo_u32 v12, v3, v7
3265; CGP-NEXT:    v_mul_lo_u32 v13, v9, v11
3266; CGP-NEXT:    v_mul_hi_u32 v14, v9, v7
3267; CGP-NEXT:    v_mul_hi_u32 v7, v3, v7
3268; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
3269; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
3270; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v14
3271; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3272; CGP-NEXT:    v_mul_lo_u32 v14, v3, v11
3273; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
3274; CGP-NEXT:    v_mul_hi_u32 v13, v9, v11
3275; CGP-NEXT:    v_mul_hi_u32 v11, v3, v11
3276; CGP-NEXT:    v_add_i32_e32 v7, vcc, v14, v7
3277; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
3278; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v13
3279; CGP-NEXT:    v_cndmask_b32_e64 v13, 0, 1, vcc
3280; CGP-NEXT:    v_add_i32_e32 v13, vcc, v14, v13
3281; CGP-NEXT:    v_add_i32_e32 v7, vcc, v7, v12
3282; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3283; CGP-NEXT:    v_add_i32_e32 v12, vcc, v13, v12
3284; CGP-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
3285; CGP-NEXT:    v_mul_lo_u32 v12, v6, v7
3286; CGP-NEXT:    v_mul_lo_u32 v13, v5, v11
3287; CGP-NEXT:    v_mul_hi_u32 v15, v5, v7
3288; CGP-NEXT:    v_mul_lo_u32 v14, v5, v7
3289; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v13
3290; CGP-NEXT:    v_add_i32_e32 v12, vcc, v12, v15
3291; CGP-NEXT:    v_sub_i32_e32 v9, vcc, v9, v14
3292; CGP-NEXT:    v_subb_u32_e64 v13, s[4:5], v3, v12, vcc
3293; CGP-NEXT:    v_sub_i32_e64 v3, s[4:5], v3, v12
3294; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v13, v6
3295; CGP-NEXT:    v_subb_u32_e32 v3, vcc, v3, v6, vcc
3296; CGP-NEXT:    v_cndmask_b32_e64 v12, 0, -1, s[4:5]
3297; CGP-NEXT:    v_cmp_ge_u32_e64 s[4:5], v9, v5
3298; CGP-NEXT:    v_sub_i32_e32 v9, vcc, v9, v5
3299; CGP-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
3300; CGP-NEXT:    v_cndmask_b32_e64 v14, 0, -1, s[4:5]
3301; CGP-NEXT:    v_cmp_eq_u32_e64 s[4:5], v13, v6
3302; CGP-NEXT:    v_add_i32_e32 v13, vcc, 1, v7
3303; CGP-NEXT:    v_cndmask_b32_e64 v12, v12, v14, s[4:5]
3304; CGP-NEXT:    v_addc_u32_e32 v14, vcc, 0, v11, vcc
3305; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v3, v6
3306; CGP-NEXT:    v_cndmask_b32_e64 v15, 0, -1, vcc
3307; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v9, v5
3308; CGP-NEXT:    v_cndmask_b32_e64 v5, 0, -1, vcc
3309; CGP-NEXT:    v_cmp_eq_u32_e32 vcc, v3, v6
3310; CGP-NEXT:    v_cndmask_b32_e32 v3, v15, v5, vcc
3311; CGP-NEXT:    v_add_i32_e32 v5, vcc, 1, v13
3312; CGP-NEXT:    v_addc_u32_e32 v6, vcc, 0, v14, vcc
3313; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v3
3314; CGP-NEXT:    v_cndmask_b32_e32 v3, v13, v5, vcc
3315; CGP-NEXT:    v_cndmask_b32_e32 v5, v14, v6, vcc
3316; CGP-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v12
3317; CGP-NEXT:    v_cndmask_b32_e32 v3, v7, v3, vcc
3318; CGP-NEXT:    v_xor_b32_e32 v6, v10, v4
3319; CGP-NEXT:    v_cndmask_b32_e32 v5, v11, v5, vcc
3320; CGP-NEXT:    v_xor_b32_e32 v3, v3, v6
3321; CGP-NEXT:    v_xor_b32_e32 v5, v5, v6
3322; CGP-NEXT:    v_sub_i32_e32 v4, vcc, v3, v6
3323; CGP-NEXT:    v_subb_u32_e32 v5, vcc, v5, v6, vcc
3324; CGP-NEXT:  BB8_6: ; %Flow
3325; CGP-NEXT:    s_or_saveexec_b64 s[6:7], s[6:7]
3326; CGP-NEXT:    s_xor_b64 exec, exec, s[6:7]
3327; CGP-NEXT:    s_cbranch_execz BB8_8
3328; CGP-NEXT:  ; %bb.7:
3329; CGP-NEXT:    v_cvt_f32_u32_e32 v3, v8
3330; CGP-NEXT:    v_sub_i32_e32 v4, vcc, 0, v8
3331; CGP-NEXT:    v_rcp_iflag_f32_e32 v3, v3
3332; CGP-NEXT:    v_mul_f32_e32 v3, 0x4f7ffffe, v3
3333; CGP-NEXT:    v_cvt_u32_f32_e32 v3, v3
3334; CGP-NEXT:    v_mul_lo_u32 v4, v4, v3
3335; CGP-NEXT:    v_mul_hi_u32 v4, v3, v4
3336; CGP-NEXT:    v_add_i32_e32 v3, vcc, v3, v4
3337; CGP-NEXT:    v_mul_hi_u32 v3, v2, v3
3338; CGP-NEXT:    v_mul_lo_u32 v4, v3, v8
3339; CGP-NEXT:    v_add_i32_e32 v5, vcc, 1, v3
3340; CGP-NEXT:    v_sub_i32_e32 v2, vcc, v2, v4
3341; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v8
3342; CGP-NEXT:    v_sub_i32_e64 v4, s[4:5], v2, v8
3343; CGP-NEXT:    v_cndmask_b32_e32 v3, v3, v5, vcc
3344; CGP-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
3345; CGP-NEXT:    v_add_i32_e32 v4, vcc, 1, v3
3346; CGP-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v8
3347; CGP-NEXT:    v_cndmask_b32_e32 v4, v3, v4, vcc
3348; CGP-NEXT:    v_mov_b32_e32 v5, 0
3349; CGP-NEXT:  BB8_8:
3350; CGP-NEXT:    s_or_b64 exec, exec, s[6:7]
3351; CGP-NEXT:    v_mov_b32_e32 v2, v4
3352; CGP-NEXT:    v_mov_b32_e32 v3, v5
3353; CGP-NEXT:    s_setpc_b64 s[30:31]
3354  %shl.y = shl <2 x i64> <i64 4096, i64 4096>, %y
3355  %r = sdiv <2 x i64> %x, %shl.y
3356  ret <2 x i64> %r
3357}
3358
3359define i64 @v_sdiv_i64_24bit(i64 %num, i64 %den) {
3360; GISEL-LABEL: v_sdiv_i64_24bit:
3361; GISEL:       ; %bb.0:
3362; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3363; GISEL-NEXT:    s_mov_b32 s4, 0xffffff
3364; GISEL-NEXT:    v_and_b32_e32 v1, s4, v2
3365; GISEL-NEXT:    v_cvt_f32_u32_e32 v2, v1
3366; GISEL-NEXT:    v_sub_i32_e32 v3, vcc, 0, v1
3367; GISEL-NEXT:    v_and_b32_e32 v0, s4, v0
3368; GISEL-NEXT:    v_rcp_iflag_f32_e32 v2, v2
3369; GISEL-NEXT:    v_mul_f32_e32 v2, 0x4f7ffffe, v2
3370; GISEL-NEXT:    v_cvt_u32_f32_e32 v2, v2
3371; GISEL-NEXT:    v_mul_lo_u32 v3, v3, v2
3372; GISEL-NEXT:    v_mul_hi_u32 v3, v2, v3
3373; GISEL-NEXT:    v_add_i32_e32 v2, vcc, v2, v3
3374; GISEL-NEXT:    v_mul_hi_u32 v2, v0, v2
3375; GISEL-NEXT:    v_mul_lo_u32 v3, v2, v1
3376; GISEL-NEXT:    v_add_i32_e32 v4, vcc, 1, v2
3377; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v3
3378; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
3379; GISEL-NEXT:    v_sub_i32_e64 v3, s[4:5], v0, v1
3380; GISEL-NEXT:    v_cndmask_b32_e32 v2, v2, v4, vcc
3381; GISEL-NEXT:    v_cndmask_b32_e32 v0, v0, v3, vcc
3382; GISEL-NEXT:    v_add_i32_e32 v3, vcc, 1, v2
3383; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
3384; GISEL-NEXT:    v_cndmask_b32_e32 v0, v2, v3, vcc
3385; GISEL-NEXT:    v_mov_b32_e32 v1, 0
3386; GISEL-NEXT:    s_setpc_b64 s[30:31]
3387;
3388; CGP-LABEL: v_sdiv_i64_24bit:
3389; CGP:       ; %bb.0:
3390; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3391; CGP-NEXT:    s_mov_b32 s4, 0xffffff
3392; CGP-NEXT:    v_and_b32_e32 v1, s4, v2
3393; CGP-NEXT:    v_cvt_f32_i32_e32 v1, v1
3394; CGP-NEXT:    v_and_b32_e32 v0, s4, v0
3395; CGP-NEXT:    v_cvt_f32_i32_e32 v0, v0
3396; CGP-NEXT:    v_rcp_f32_e32 v2, v1
3397; CGP-NEXT:    v_mul_f32_e32 v2, v0, v2
3398; CGP-NEXT:    v_trunc_f32_e32 v2, v2
3399; CGP-NEXT:    v_mad_f32 v0, -v2, v1, v0
3400; CGP-NEXT:    v_cvt_i32_f32_e32 v2, v2
3401; CGP-NEXT:    v_cmp_ge_f32_e64 s[4:5], |v0|, |v1|
3402; CGP-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[4:5]
3403; CGP-NEXT:    v_add_i32_e32 v0, vcc, v2, v0
3404; CGP-NEXT:    v_bfe_i32 v0, v0, 0, 25
3405; CGP-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
3406; CGP-NEXT:    s_setpc_b64 s[30:31]
3407  %num.mask = and i64 %num, 16777215
3408  %den.mask = and i64 %den, 16777215
3409  %result = sdiv i64 %num.mask, %den.mask
3410  ret i64 %result
3411}
3412
3413define <2 x i64> @v_sdiv_v2i64_24bit(<2 x i64> %num, <2 x i64> %den) {
3414; GISEL-LABEL: v_sdiv_v2i64_24bit:
3415; GISEL:       ; %bb.0:
3416; GISEL-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3417; GISEL-NEXT:    s_mov_b32 s6, 0xffffff
3418; GISEL-NEXT:    v_and_b32_e32 v1, s6, v4
3419; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 0, v1
3420; GISEL-NEXT:    v_addc_u32_e64 v3, s[4:5], 0, 0, vcc
3421; GISEL-NEXT:    v_cvt_f32_u32_e32 v4, v1
3422; GISEL-NEXT:    v_cvt_f32_u32_e32 v5, v3
3423; GISEL-NEXT:    v_sub_i32_e32 v7, vcc, 0, v1
3424; GISEL-NEXT:    v_subb_u32_e32 v8, vcc, 0, v3, vcc
3425; GISEL-NEXT:    v_and_b32_e32 v0, s6, v0
3426; GISEL-NEXT:    v_mac_f32_e32 v4, 0x4f800000, v5
3427; GISEL-NEXT:    v_rcp_iflag_f32_e32 v4, v4
3428; GISEL-NEXT:    v_and_b32_e32 v6, s6, v6
3429; GISEL-NEXT:    v_and_b32_e32 v2, s6, v2
3430; GISEL-NEXT:    v_mul_f32_e32 v4, 0x5f7ffffc, v4
3431; GISEL-NEXT:    v_mul_f32_e32 v5, 0x2f800000, v4
3432; GISEL-NEXT:    v_trunc_f32_e32 v5, v5
3433; GISEL-NEXT:    v_mac_f32_e32 v4, 0xcf800000, v5
3434; GISEL-NEXT:    v_cvt_u32_f32_e32 v4, v4
3435; GISEL-NEXT:    v_cvt_u32_f32_e32 v5, v5
3436; GISEL-NEXT:    v_mul_lo_u32 v9, v8, v4
3437; GISEL-NEXT:    v_mul_lo_u32 v10, v7, v5
3438; GISEL-NEXT:    v_mul_hi_u32 v12, v7, v4
3439; GISEL-NEXT:    v_mul_lo_u32 v11, v7, v4
3440; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
3441; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
3442; GISEL-NEXT:    v_mul_lo_u32 v10, v5, v11
3443; GISEL-NEXT:    v_mul_lo_u32 v12, v4, v9
3444; GISEL-NEXT:    v_mul_hi_u32 v14, v4, v11
3445; GISEL-NEXT:    v_add_i32_e32 v0, vcc, 0, v0
3446; GISEL-NEXT:    v_addc_u32_e64 v13, s[4:5], 0, 0, vcc
3447; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
3448; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3449; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v14
3450; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
3451; GISEL-NEXT:    v_mul_lo_u32 v14, v5, v9
3452; GISEL-NEXT:    v_mul_hi_u32 v11, v5, v11
3453; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
3454; GISEL-NEXT:    v_mul_hi_u32 v12, v4, v9
3455; GISEL-NEXT:    v_mul_hi_u32 v9, v5, v9
3456; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v14, v11
3457; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
3458; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
3459; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3460; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v14, v12
3461; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
3462; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
3463; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
3464; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
3465; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v10
3466; GISEL-NEXT:    v_addc_u32_e64 v10, s[4:5], v5, v9, vcc
3467; GISEL-NEXT:    v_mul_lo_u32 v8, v8, v4
3468; GISEL-NEXT:    v_mul_lo_u32 v11, v7, v10
3469; GISEL-NEXT:    v_mul_lo_u32 v12, v7, v4
3470; GISEL-NEXT:    v_mul_hi_u32 v7, v7, v4
3471; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v5, v9
3472; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v11
3473; GISEL-NEXT:    v_mul_hi_u32 v9, v4, v12
3474; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v8, v7
3475; GISEL-NEXT:    v_mul_lo_u32 v8, v10, v12
3476; GISEL-NEXT:    v_mul_lo_u32 v11, v4, v7
3477; GISEL-NEXT:    v_mul_hi_u32 v12, v10, v12
3478; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v11
3479; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
3480; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
3481; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
3482; GISEL-NEXT:    v_mul_lo_u32 v9, v10, v7
3483; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
3484; GISEL-NEXT:    v_mul_hi_u32 v11, v4, v7
3485; GISEL-NEXT:    v_mul_hi_u32 v7, v10, v7
3486; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
3487; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
3488; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v11
3489; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
3490; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
3491; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v9, v8
3492; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
3493; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v9
3494; GISEL-NEXT:    v_add_i32_e64 v7, s[4:5], v7, v9
3495; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, v5, v7, vcc
3496; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
3497; GISEL-NEXT:    v_addc_u32_e32 v5, vcc, 0, v5, vcc
3498; GISEL-NEXT:    v_mul_lo_u32 v7, v13, v4
3499; GISEL-NEXT:    v_mul_lo_u32 v8, v0, v5
3500; GISEL-NEXT:    v_mul_hi_u32 v9, v0, v4
3501; GISEL-NEXT:    v_mul_hi_u32 v4, v13, v4
3502; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
3503; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
3504; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v9
3505; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
3506; GISEL-NEXT:    v_mul_lo_u32 v9, v13, v5
3507; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
3508; GISEL-NEXT:    v_mul_hi_u32 v8, v0, v5
3509; GISEL-NEXT:    v_mul_hi_u32 v5, v13, v5
3510; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v9, v4
3511; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
3512; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v8
3513; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
3514; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
3515; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v7
3516; GISEL-NEXT:    v_cndmask_b32_e64 v7, 0, 1, vcc
3517; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v8, v7
3518; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v7
3519; GISEL-NEXT:    v_mul_lo_u32 v7, v3, v4
3520; GISEL-NEXT:    v_mul_lo_u32 v8, v1, v5
3521; GISEL-NEXT:    v_mul_hi_u32 v10, v1, v4
3522; GISEL-NEXT:    v_mul_lo_u32 v9, v1, v4
3523; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v8
3524; GISEL-NEXT:    v_add_i32_e32 v7, vcc, v7, v10
3525; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v9
3526; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v13, v7, vcc
3527; GISEL-NEXT:    v_sub_i32_e64 v7, s[4:5], v13, v7
3528; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v8, v3
3529; GISEL-NEXT:    v_subb_u32_e32 v7, vcc, v7, v3, vcc
3530; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
3531; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v0, v1
3532; GISEL-NEXT:    v_sub_i32_e32 v0, vcc, v0, v1
3533; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
3534; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v8, v3
3535; GISEL-NEXT:    v_subbrev_u32_e32 v7, vcc, 0, v7, vcc
3536; GISEL-NEXT:    v_cndmask_b32_e64 v8, v9, v10, s[4:5]
3537; GISEL-NEXT:    v_add_i32_e32 v9, vcc, 1, v4
3538; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v5, vcc
3539; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v7, v3
3540; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, -1, vcc
3541; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v0, v1
3542; GISEL-NEXT:    v_cndmask_b32_e64 v0, 0, -1, vcc
3543; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v7, v3
3544; GISEL-NEXT:    v_cndmask_b32_e32 v0, v11, v0, vcc
3545; GISEL-NEXT:    v_add_i32_e32 v1, vcc, 1, v9
3546; GISEL-NEXT:    v_addc_u32_e32 v3, vcc, 0, v10, vcc
3547; GISEL-NEXT:    v_add_i32_e32 v6, vcc, 0, v6
3548; GISEL-NEXT:    v_addc_u32_e64 v7, s[4:5], 0, 0, vcc
3549; GISEL-NEXT:    v_cvt_f32_u32_e32 v11, v6
3550; GISEL-NEXT:    v_cvt_f32_u32_e32 v12, v7
3551; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v0
3552; GISEL-NEXT:    v_cndmask_b32_e32 v0, v9, v1, vcc
3553; GISEL-NEXT:    v_cndmask_b32_e32 v1, v10, v3, vcc
3554; GISEL-NEXT:    v_mac_f32_e32 v11, 0x4f800000, v12
3555; GISEL-NEXT:    v_rcp_iflag_f32_e32 v3, v11
3556; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v8
3557; GISEL-NEXT:    v_cndmask_b32_e32 v0, v4, v0, vcc
3558; GISEL-NEXT:    v_cndmask_b32_e32 v1, v5, v1, vcc
3559; GISEL-NEXT:    v_mul_f32_e32 v3, 0x5f7ffffc, v3
3560; GISEL-NEXT:    v_mul_f32_e32 v4, 0x2f800000, v3
3561; GISEL-NEXT:    v_trunc_f32_e32 v4, v4
3562; GISEL-NEXT:    v_mac_f32_e32 v3, 0xcf800000, v4
3563; GISEL-NEXT:    v_cvt_u32_f32_e32 v3, v3
3564; GISEL-NEXT:    v_cvt_u32_f32_e32 v4, v4
3565; GISEL-NEXT:    v_sub_i32_e32 v5, vcc, 0, v6
3566; GISEL-NEXT:    v_subb_u32_e32 v8, vcc, 0, v7, vcc
3567; GISEL-NEXT:    v_mul_lo_u32 v9, v8, v3
3568; GISEL-NEXT:    v_mul_lo_u32 v10, v5, v4
3569; GISEL-NEXT:    v_mul_hi_u32 v12, v5, v3
3570; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v3
3571; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v10
3572; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v12
3573; GISEL-NEXT:    v_mul_lo_u32 v10, v4, v11
3574; GISEL-NEXT:    v_mul_lo_u32 v12, v3, v9
3575; GISEL-NEXT:    v_mul_hi_u32 v14, v3, v11
3576; GISEL-NEXT:    v_add_i32_e32 v2, vcc, 0, v2
3577; GISEL-NEXT:    v_addc_u32_e64 v13, s[4:5], 0, 0, vcc
3578; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v12
3579; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3580; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v10, v14
3581; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, 1, vcc
3582; GISEL-NEXT:    v_mul_lo_u32 v14, v4, v9
3583; GISEL-NEXT:    v_mul_hi_u32 v11, v4, v11
3584; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v12, v10
3585; GISEL-NEXT:    v_mul_hi_u32 v12, v3, v9
3586; GISEL-NEXT:    v_mul_hi_u32 v9, v4, v9
3587; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v14, v11
3588; GISEL-NEXT:    v_cndmask_b32_e64 v14, 0, 1, vcc
3589; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v11, v12
3590; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, vcc
3591; GISEL-NEXT:    v_add_i32_e32 v12, vcc, v14, v12
3592; GISEL-NEXT:    v_add_i32_e32 v10, vcc, v11, v10
3593; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, vcc
3594; GISEL-NEXT:    v_add_i32_e32 v11, vcc, v12, v11
3595; GISEL-NEXT:    v_add_i32_e32 v9, vcc, v9, v11
3596; GISEL-NEXT:    v_add_i32_e32 v3, vcc, v3, v10
3597; GISEL-NEXT:    v_addc_u32_e64 v10, s[4:5], v4, v9, vcc
3598; GISEL-NEXT:    v_mul_lo_u32 v8, v8, v3
3599; GISEL-NEXT:    v_mul_lo_u32 v11, v5, v10
3600; GISEL-NEXT:    v_mul_lo_u32 v12, v5, v3
3601; GISEL-NEXT:    v_mul_hi_u32 v5, v5, v3
3602; GISEL-NEXT:    v_add_i32_e64 v4, s[4:5], v4, v9
3603; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v11
3604; GISEL-NEXT:    v_mul_hi_u32 v9, v3, v12
3605; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v8, v5
3606; GISEL-NEXT:    v_mul_lo_u32 v8, v10, v12
3607; GISEL-NEXT:    v_mul_lo_u32 v11, v3, v5
3608; GISEL-NEXT:    v_mul_hi_u32 v12, v10, v12
3609; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v11
3610; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
3611; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v8, v9
3612; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, s[4:5]
3613; GISEL-NEXT:    v_mul_lo_u32 v9, v10, v5
3614; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v11, v8
3615; GISEL-NEXT:    v_mul_hi_u32 v11, v3, v5
3616; GISEL-NEXT:    v_mul_hi_u32 v5, v10, v5
3617; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v12
3618; GISEL-NEXT:    v_cndmask_b32_e64 v12, 0, 1, s[4:5]
3619; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v9, v11
3620; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, 1, s[4:5]
3621; GISEL-NEXT:    v_add_i32_e64 v11, s[4:5], v12, v11
3622; GISEL-NEXT:    v_add_i32_e64 v8, s[4:5], v9, v8
3623; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, s[4:5]
3624; GISEL-NEXT:    v_add_i32_e64 v9, s[4:5], v11, v9
3625; GISEL-NEXT:    v_add_i32_e64 v5, s[4:5], v5, v9
3626; GISEL-NEXT:    v_addc_u32_e32 v4, vcc, v4, v5, vcc
3627; GISEL-NEXT:    v_add_i32_e32 v3, vcc, v3, v8
3628; GISEL-NEXT:    v_addc_u32_e32 v4, vcc, 0, v4, vcc
3629; GISEL-NEXT:    v_mul_lo_u32 v5, v13, v3
3630; GISEL-NEXT:    v_mul_lo_u32 v8, v2, v4
3631; GISEL-NEXT:    v_mul_hi_u32 v9, v2, v3
3632; GISEL-NEXT:    v_subrev_i32_e32 v0, vcc, 0, v0
3633; GISEL-NEXT:    v_subbrev_u32_e32 v1, vcc, 0, v1, vcc
3634; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
3635; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
3636; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v9
3637; GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
3638; GISEL-NEXT:    v_mul_lo_u32 v9, v13, v4
3639; GISEL-NEXT:    v_mul_hi_u32 v3, v13, v3
3640; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
3641; GISEL-NEXT:    v_mul_hi_u32 v8, v2, v4
3642; GISEL-NEXT:    v_mul_hi_u32 v4, v13, v4
3643; GISEL-NEXT:    v_add_i32_e32 v3, vcc, v9, v3
3644; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, 1, vcc
3645; GISEL-NEXT:    v_add_i32_e32 v3, vcc, v3, v8
3646; GISEL-NEXT:    v_cndmask_b32_e64 v8, 0, 1, vcc
3647; GISEL-NEXT:    v_add_i32_e32 v8, vcc, v9, v8
3648; GISEL-NEXT:    v_add_i32_e32 v3, vcc, v3, v5
3649; GISEL-NEXT:    v_cndmask_b32_e64 v5, 0, 1, vcc
3650; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v8, v5
3651; GISEL-NEXT:    v_add_i32_e32 v4, vcc, v4, v5
3652; GISEL-NEXT:    v_mul_lo_u32 v5, v7, v3
3653; GISEL-NEXT:    v_mul_lo_u32 v8, v6, v4
3654; GISEL-NEXT:    v_mul_hi_u32 v10, v6, v3
3655; GISEL-NEXT:    v_mul_lo_u32 v9, v6, v3
3656; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v8
3657; GISEL-NEXT:    v_add_i32_e32 v5, vcc, v5, v10
3658; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v9
3659; GISEL-NEXT:    v_subb_u32_e64 v8, s[4:5], v13, v5, vcc
3660; GISEL-NEXT:    v_sub_i32_e64 v5, s[4:5], v13, v5
3661; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v8, v7
3662; GISEL-NEXT:    v_subb_u32_e32 v5, vcc, v5, v7, vcc
3663; GISEL-NEXT:    v_cndmask_b32_e64 v9, 0, -1, s[4:5]
3664; GISEL-NEXT:    v_cmp_ge_u32_e64 s[4:5], v2, v6
3665; GISEL-NEXT:    v_sub_i32_e32 v2, vcc, v2, v6
3666; GISEL-NEXT:    v_cndmask_b32_e64 v10, 0, -1, s[4:5]
3667; GISEL-NEXT:    v_cmp_eq_u32_e64 s[4:5], v8, v7
3668; GISEL-NEXT:    v_subbrev_u32_e32 v5, vcc, 0, v5, vcc
3669; GISEL-NEXT:    v_cndmask_b32_e64 v8, v9, v10, s[4:5]
3670; GISEL-NEXT:    v_add_i32_e32 v9, vcc, 1, v3
3671; GISEL-NEXT:    v_addc_u32_e32 v10, vcc, 0, v4, vcc
3672; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v5, v7
3673; GISEL-NEXT:    v_cndmask_b32_e64 v11, 0, -1, vcc
3674; GISEL-NEXT:    v_cmp_ge_u32_e32 vcc, v2, v6
3675; GISEL-NEXT:    v_cndmask_b32_e64 v2, 0, -1, vcc
3676; GISEL-NEXT:    v_cmp_eq_u32_e32 vcc, v5, v7
3677; GISEL-NEXT:    v_cndmask_b32_e32 v2, v11, v2, vcc
3678; GISEL-NEXT:    v_add_i32_e32 v5, vcc, 1, v9
3679; GISEL-NEXT:    v_addc_u32_e32 v6, vcc, 0, v10, vcc
3680; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v2
3681; GISEL-NEXT:    v_cndmask_b32_e32 v2, v9, v5, vcc
3682; GISEL-NEXT:    v_cndmask_b32_e32 v5, v10, v6, vcc
3683; GISEL-NEXT:    v_cmp_ne_u32_e32 vcc, 0, v8
3684; GISEL-NEXT:    v_cndmask_b32_e32 v2, v3, v2, vcc
3685; GISEL-NEXT:    v_cndmask_b32_e32 v3, v4, v5, vcc
3686; GISEL-NEXT:    v_subrev_i32_e32 v2, vcc, 0, v2
3687; GISEL-NEXT:    v_subbrev_u32_e32 v3, vcc, 0, v3, vcc
3688; GISEL-NEXT:    s_setpc_b64 s[30:31]
3689;
3690; CGP-LABEL: v_sdiv_v2i64_24bit:
3691; CGP:       ; %bb.0:
3692; CGP-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
3693; CGP-NEXT:    s_mov_b32 s4, 0xffffff
3694; CGP-NEXT:    v_and_b32_e32 v1, s4, v4
3695; CGP-NEXT:    v_cvt_f32_i32_e32 v1, v1
3696; CGP-NEXT:    v_and_b32_e32 v0, s4, v0
3697; CGP-NEXT:    v_cvt_f32_i32_e32 v0, v0
3698; CGP-NEXT:    v_and_b32_e32 v4, s4, v6
3699; CGP-NEXT:    v_rcp_f32_e32 v3, v1
3700; CGP-NEXT:    v_cvt_f32_i32_e32 v4, v4
3701; CGP-NEXT:    v_and_b32_e32 v2, s4, v2
3702; CGP-NEXT:    v_cvt_f32_i32_e32 v2, v2
3703; CGP-NEXT:    v_mul_f32_e32 v3, v0, v3
3704; CGP-NEXT:    v_trunc_f32_e32 v3, v3
3705; CGP-NEXT:    v_mad_f32 v0, -v3, v1, v0
3706; CGP-NEXT:    v_cvt_i32_f32_e32 v3, v3
3707; CGP-NEXT:    v_rcp_f32_e32 v5, v4
3708; CGP-NEXT:    v_cmp_ge_f32_e64 s[4:5], |v0|, |v1|
3709; CGP-NEXT:    v_cndmask_b32_e64 v0, 0, 1, s[4:5]
3710; CGP-NEXT:    v_add_i32_e32 v0, vcc, v3, v0
3711; CGP-NEXT:    v_mul_f32_e32 v3, v2, v5
3712; CGP-NEXT:    v_trunc_f32_e32 v3, v3
3713; CGP-NEXT:    v_mad_f32 v2, -v3, v4, v2
3714; CGP-NEXT:    v_cvt_i32_f32_e32 v3, v3
3715; CGP-NEXT:    v_cmp_ge_f32_e64 s[4:5], |v2|, |v4|
3716; CGP-NEXT:    v_cndmask_b32_e64 v2, 0, 1, s[4:5]
3717; CGP-NEXT:    v_bfe_i32 v0, v0, 0, 25
3718; CGP-NEXT:    v_add_i32_e32 v2, vcc, v3, v2
3719; CGP-NEXT:    v_bfe_i32 v2, v2, 0, 25
3720; CGP-NEXT:    v_ashrrev_i32_e32 v1, 31, v0
3721; CGP-NEXT:    v_ashrrev_i32_e32 v3, 31, v2
3722; CGP-NEXT:    s_setpc_b64 s[30:31]
3723  %num.mask = and <2 x i64> %num, <i64 16777215, i64 16777215>
3724  %den.mask = and <2 x i64> %den, <i64 16777215, i64 16777215>
3725  %result = sdiv <2 x i64> %num.mask, %den.mask
3726  ret <2 x i64> %result
3727}
3728