1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef DRM_FOURCC_H 20 #define DRM_FOURCC_H 21 #include "drm.h" 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 #define fourcc_code(a,b,c,d) ((__u32) (a) | ((__u32) (b) << 8) | ((__u32) (c) << 16) | ((__u32) (d) << 24)) 26 #define DRM_FORMAT_BIG_ENDIAN (1 << 31) 27 #define DRM_FORMAT_C8 fourcc_code('C', '8', ' ', ' ') 28 #define DRM_FORMAT_R8 fourcc_code('R', '8', ' ', ' ') 29 #define DRM_FORMAT_R16 fourcc_code('R', '1', '6', ' ') 30 #define DRM_FORMAT_RG88 fourcc_code('R', 'G', '8', '8') 31 #define DRM_FORMAT_GR88 fourcc_code('G', 'R', '8', '8') 32 #define DRM_FORMAT_RG1616 fourcc_code('R', 'G', '3', '2') 33 #define DRM_FORMAT_GR1616 fourcc_code('G', 'R', '3', '2') 34 #define DRM_FORMAT_RGB332 fourcc_code('R', 'G', 'B', '8') 35 #define DRM_FORMAT_BGR233 fourcc_code('B', 'G', 'R', '8') 36 #define DRM_FORMAT_XRGB4444 fourcc_code('X', 'R', '1', '2') 37 #define DRM_FORMAT_XBGR4444 fourcc_code('X', 'B', '1', '2') 38 #define DRM_FORMAT_RGBX4444 fourcc_code('R', 'X', '1', '2') 39 #define DRM_FORMAT_BGRX4444 fourcc_code('B', 'X', '1', '2') 40 #define DRM_FORMAT_ARGB4444 fourcc_code('A', 'R', '1', '2') 41 #define DRM_FORMAT_ABGR4444 fourcc_code('A', 'B', '1', '2') 42 #define DRM_FORMAT_RGBA4444 fourcc_code('R', 'A', '1', '2') 43 #define DRM_FORMAT_BGRA4444 fourcc_code('B', 'A', '1', '2') 44 #define DRM_FORMAT_XRGB1555 fourcc_code('X', 'R', '1', '5') 45 #define DRM_FORMAT_XBGR1555 fourcc_code('X', 'B', '1', '5') 46 #define DRM_FORMAT_RGBX5551 fourcc_code('R', 'X', '1', '5') 47 #define DRM_FORMAT_BGRX5551 fourcc_code('B', 'X', '1', '5') 48 #define DRM_FORMAT_ARGB1555 fourcc_code('A', 'R', '1', '5') 49 #define DRM_FORMAT_ABGR1555 fourcc_code('A', 'B', '1', '5') 50 #define DRM_FORMAT_RGBA5551 fourcc_code('R', 'A', '1', '5') 51 #define DRM_FORMAT_BGRA5551 fourcc_code('B', 'A', '1', '5') 52 #define DRM_FORMAT_RGB565 fourcc_code('R', 'G', '1', '6') 53 #define DRM_FORMAT_BGR565 fourcc_code('B', 'G', '1', '6') 54 #define DRM_FORMAT_RGB888 fourcc_code('R', 'G', '2', '4') 55 #define DRM_FORMAT_BGR888 fourcc_code('B', 'G', '2', '4') 56 #define DRM_FORMAT_XRGB8888 fourcc_code('X', 'R', '2', '4') 57 #define DRM_FORMAT_XBGR8888 fourcc_code('X', 'B', '2', '4') 58 #define DRM_FORMAT_RGBX8888 fourcc_code('R', 'X', '2', '4') 59 #define DRM_FORMAT_BGRX8888 fourcc_code('B', 'X', '2', '4') 60 #define DRM_FORMAT_ARGB8888 fourcc_code('A', 'R', '2', '4') 61 #define DRM_FORMAT_ABGR8888 fourcc_code('A', 'B', '2', '4') 62 #define DRM_FORMAT_RGBA8888 fourcc_code('R', 'A', '2', '4') 63 #define DRM_FORMAT_BGRA8888 fourcc_code('B', 'A', '2', '4') 64 #define DRM_FORMAT_XRGB2101010 fourcc_code('X', 'R', '3', '0') 65 #define DRM_FORMAT_XBGR2101010 fourcc_code('X', 'B', '3', '0') 66 #define DRM_FORMAT_RGBX1010102 fourcc_code('R', 'X', '3', '0') 67 #define DRM_FORMAT_BGRX1010102 fourcc_code('B', 'X', '3', '0') 68 #define DRM_FORMAT_ARGB2101010 fourcc_code('A', 'R', '3', '0') 69 #define DRM_FORMAT_ABGR2101010 fourcc_code('A', 'B', '3', '0') 70 #define DRM_FORMAT_RGBA1010102 fourcc_code('R', 'A', '3', '0') 71 #define DRM_FORMAT_BGRA1010102 fourcc_code('B', 'A', '3', '0') 72 #define DRM_FORMAT_YUYV fourcc_code('Y', 'U', 'Y', 'V') 73 #define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') 74 #define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') 75 #define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') 76 #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') 77 #define DRM_FORMAT_XRGB8888_A8 fourcc_code('X', 'R', 'A', '8') 78 #define DRM_FORMAT_XBGR8888_A8 fourcc_code('X', 'B', 'A', '8') 79 #define DRM_FORMAT_RGBX8888_A8 fourcc_code('R', 'X', 'A', '8') 80 #define DRM_FORMAT_BGRX8888_A8 fourcc_code('B', 'X', 'A', '8') 81 #define DRM_FORMAT_RGB888_A8 fourcc_code('R', '8', 'A', '8') 82 #define DRM_FORMAT_BGR888_A8 fourcc_code('B', '8', 'A', '8') 83 #define DRM_FORMAT_RGB565_A8 fourcc_code('R', '5', 'A', '8') 84 #define DRM_FORMAT_BGR565_A8 fourcc_code('B', '5', 'A', '8') 85 #define DRM_FORMAT_NV12 fourcc_code('N', 'V', '1', '2') 86 #define DRM_FORMAT_NV21 fourcc_code('N', 'V', '2', '1') 87 #define DRM_FORMAT_NV16 fourcc_code('N', 'V', '1', '6') 88 #define DRM_FORMAT_NV61 fourcc_code('N', 'V', '6', '1') 89 #define DRM_FORMAT_NV24 fourcc_code('N', 'V', '2', '4') 90 #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') 91 #define DRM_FORMAT_YUV410 fourcc_code('Y', 'U', 'V', '9') 92 #define DRM_FORMAT_YVU410 fourcc_code('Y', 'V', 'U', '9') 93 #define DRM_FORMAT_YUV411 fourcc_code('Y', 'U', '1', '1') 94 #define DRM_FORMAT_YVU411 fourcc_code('Y', 'V', '1', '1') 95 #define DRM_FORMAT_YUV420 fourcc_code('Y', 'U', '1', '2') 96 #define DRM_FORMAT_YVU420 fourcc_code('Y', 'V', '1', '2') 97 #define DRM_FORMAT_YUV422 fourcc_code('Y', 'U', '1', '6') 98 #define DRM_FORMAT_YVU422 fourcc_code('Y', 'V', '1', '6') 99 #define DRM_FORMAT_YUV444 fourcc_code('Y', 'U', '2', '4') 100 #define DRM_FORMAT_YVU444 fourcc_code('Y', 'V', '2', '4') 101 #define DRM_FORMAT_MOD_NONE 0 102 #define DRM_FORMAT_MOD_VENDOR_NONE 0 103 #define DRM_FORMAT_MOD_VENDOR_INTEL 0x01 104 #define DRM_FORMAT_MOD_VENDOR_AMD 0x02 105 #define DRM_FORMAT_MOD_VENDOR_NVIDIA 0x03 106 #define DRM_FORMAT_MOD_VENDOR_SAMSUNG 0x04 107 #define DRM_FORMAT_MOD_VENDOR_QCOM 0x05 108 #define DRM_FORMAT_MOD_VENDOR_VIVANTE 0x06 109 #define DRM_FORMAT_MOD_VENDOR_BROADCOM 0x07 110 #define DRM_FORMAT_MOD_VENDOR_ARM 0x08 111 #define DRM_FORMAT_RESERVED ((1ULL << 56) - 1) 112 #define fourcc_mod_code(vendor,val) ((((__u64) DRM_FORMAT_MOD_VENDOR_ ##vendor) << 56) | ((val) & 0x00ffffffffffffffULL)) 113 #define DRM_FORMAT_MOD_INVALID fourcc_mod_code(NONE, DRM_FORMAT_RESERVED) 114 #define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0) 115 #define I915_FORMAT_MOD_X_TILED fourcc_mod_code(INTEL, 1) 116 #define I915_FORMAT_MOD_Y_TILED fourcc_mod_code(INTEL, 2) 117 #define I915_FORMAT_MOD_Yf_TILED fourcc_mod_code(INTEL, 3) 118 #define I915_FORMAT_MOD_Y_TILED_CCS fourcc_mod_code(INTEL, 4) 119 #define I915_FORMAT_MOD_Yf_TILED_CCS fourcc_mod_code(INTEL, 5) 120 #define DRM_FORMAT_MOD_SAMSUNG_64_32_TILE fourcc_mod_code(SAMSUNG, 1) 121 #define DRM_FORMAT_MOD_QCOM_COMPRESSED fourcc_mod_code(QCOM, 1) 122 #define DRM_FORMAT_MOD_QCOM_DX fourcc_mod_code(QCOM, 0x2) 123 #define DRM_FORMAT_MOD_QCOM_TIGHT fourcc_mod_code(QCOM, 0x4) 124 #define DRM_FORMAT_MOD_QCOM_TILE fourcc_mod_code(QCOM, 0x8) 125 #define DRM_FORMAT_MOD_VIVANTE_TILED fourcc_mod_code(VIVANTE, 1) 126 #define DRM_FORMAT_MOD_VIVANTE_SUPER_TILED fourcc_mod_code(VIVANTE, 2) 127 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED fourcc_mod_code(VIVANTE, 3) 128 #define DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED fourcc_mod_code(VIVANTE, 4) 129 #define DRM_FORMAT_MOD_NVIDIA_TEGRA_TILED fourcc_mod_code(NVIDIA, 1) 130 #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK(v) fourcc_mod_code(NVIDIA, 0x10 | ((v) & 0xf)) 131 #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_ONE_GOB fourcc_mod_code(NVIDIA, 0x10) 132 #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_TWO_GOB fourcc_mod_code(NVIDIA, 0x11) 133 #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_FOUR_GOB fourcc_mod_code(NVIDIA, 0x12) 134 #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_EIGHT_GOB fourcc_mod_code(NVIDIA, 0x13) 135 #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_SIXTEEN_GOB fourcc_mod_code(NVIDIA, 0x14) 136 #define DRM_FORMAT_MOD_NVIDIA_16BX2_BLOCK_THIRTYTWO_GOB fourcc_mod_code(NVIDIA, 0x15) 137 #define __fourcc_mod_broadcom_param_shift 8 138 #define __fourcc_mod_broadcom_param_bits 48 139 #define fourcc_mod_broadcom_code(val,params) fourcc_mod_code(BROADCOM, ((((__u64) params) << __fourcc_mod_broadcom_param_shift) | val)) 140 #define fourcc_mod_broadcom_param(m) ((int) (((m) >> __fourcc_mod_broadcom_param_shift) & ((1ULL << __fourcc_mod_broadcom_param_bits) - 1))) 141 #define fourcc_mod_broadcom_mod(m) ((m) & ~(((1ULL << __fourcc_mod_broadcom_param_bits) - 1) << __fourcc_mod_broadcom_param_shift)) 142 #define DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED fourcc_mod_code(BROADCOM, 1) 143 #define DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(v) fourcc_mod_broadcom_code(2, v) 144 #define DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(v) fourcc_mod_broadcom_code(3, v) 145 #define DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(v) fourcc_mod_broadcom_code(4, v) 146 #define DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(v) fourcc_mod_broadcom_code(5, v) 147 #define DRM_FORMAT_MOD_BROADCOM_SAND32 DRM_FORMAT_MOD_BROADCOM_SAND32_COL_HEIGHT(0) 148 #define DRM_FORMAT_MOD_BROADCOM_SAND64 DRM_FORMAT_MOD_BROADCOM_SAND64_COL_HEIGHT(0) 149 #define DRM_FORMAT_MOD_BROADCOM_SAND128 DRM_FORMAT_MOD_BROADCOM_SAND128_COL_HEIGHT(0) 150 #define DRM_FORMAT_MOD_BROADCOM_SAND256 DRM_FORMAT_MOD_BROADCOM_SAND256_COL_HEIGHT(0) 151 #define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6) 152 #define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM, __afbc_mode) 153 #define AFBC_FORMAT_MOD_BLOCK_SIZE_MASK 0xf 154 #define AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 (1ULL) 155 #define AFBC_FORMAT_MOD_BLOCK_SIZE_32x8 (2ULL) 156 #define AFBC_FORMAT_MOD_YTR (1ULL << 4) 157 #define AFBC_FORMAT_MOD_SPLIT (1ULL << 5) 158 #define AFBC_FORMAT_MOD_SPARSE (1ULL << 6) 159 #define AFBC_FORMAT_MOD_CBR (1ULL << 7) 160 #define AFBC_FORMAT_MOD_TILED (1ULL << 8) 161 #define AFBC_FORMAT_MOD_SC (1ULL << 9) 162 #ifdef __cplusplus 163 } 164 #endif 165 #endif 166