1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _DRM_MODE_H 20 #define _DRM_MODE_H 21 #include "drm.h" 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 #define DRM_DISPLAY_INFO_LEN 32 26 #define DRM_CONNECTOR_NAME_LEN 32 27 #define DRM_DISPLAY_MODE_LEN 32 28 #define DRM_PROP_NAME_LEN 32 29 #define DRM_MODE_TYPE_BUILTIN (1 << 0) 30 #define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN) 31 #define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN) 32 #define DRM_MODE_TYPE_PREFERRED (1 << 3) 33 #define DRM_MODE_TYPE_DEFAULT (1 << 4) 34 #define DRM_MODE_TYPE_USERDEF (1 << 5) 35 #define DRM_MODE_TYPE_DRIVER (1 << 6) 36 #define DRM_MODE_FLAG_PHSYNC (1 << 0) 37 #define DRM_MODE_FLAG_NHSYNC (1 << 1) 38 #define DRM_MODE_FLAG_PVSYNC (1 << 2) 39 #define DRM_MODE_FLAG_NVSYNC (1 << 3) 40 #define DRM_MODE_FLAG_INTERLACE (1 << 4) 41 #define DRM_MODE_FLAG_DBLSCAN (1 << 5) 42 #define DRM_MODE_FLAG_CSYNC (1 << 6) 43 #define DRM_MODE_FLAG_PCSYNC (1 << 7) 44 #define DRM_MODE_FLAG_NCSYNC (1 << 8) 45 #define DRM_MODE_FLAG_HSKEW (1 << 9) 46 #define DRM_MODE_FLAG_BCAST (1 << 10) 47 #define DRM_MODE_FLAG_PIXMUX (1 << 11) 48 #define DRM_MODE_FLAG_DBLCLK (1 << 12) 49 #define DRM_MODE_FLAG_CLKDIV2 (1 << 13) 50 #define DRM_MODE_FLAG_3D_MASK (0x1f << 14) 51 #define DRM_MODE_FLAG_3D_NONE (0 << 14) 52 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14) 53 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14) 54 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14) 55 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14) 56 #define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14) 57 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14) 58 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14) 59 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14) 60 #define DRM_MODE_PICTURE_ASPECT_NONE 0 61 #define DRM_MODE_PICTURE_ASPECT_4_3 1 62 #define DRM_MODE_PICTURE_ASPECT_16_9 2 63 #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F << 19) 64 #define DRM_MODE_FLAG_PIC_AR_NONE (DRM_MODE_PICTURE_ASPECT_NONE << 19) 65 #define DRM_MODE_FLAG_PIC_AR_4_3 (DRM_MODE_PICTURE_ASPECT_4_3 << 19) 66 #define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19) 67 #define DRM_MODE_FLAG_SUPPORTS_RGB (1 << 23) 68 #define DRM_MODE_FLAG_SUPPORTS_YUV (1 << 24) 69 #define DRM_MODE_FLAG_SEAMLESS (1 << 31) 70 #define DRM_MODE_DPMS_ON 0 71 #define DRM_MODE_DPMS_STANDBY 1 72 #define DRM_MODE_DPMS_SUSPEND 2 73 #define DRM_MODE_DPMS_OFF 3 74 #define DRM_MODE_SCALE_NONE 0 75 #define DRM_MODE_SCALE_FULLSCREEN 1 76 #define DRM_MODE_SCALE_CENTER 2 77 #define DRM_MODE_SCALE_ASPECT 3 78 #define DRM_MODE_DITHERING_OFF 0 79 #define DRM_MODE_DITHERING_ON 1 80 #define DRM_MODE_DITHERING_AUTO 2 81 #define DRM_MODE_DIRTY_OFF 0 82 #define DRM_MODE_DIRTY_ON 1 83 #define DRM_MODE_DIRTY_ANNOTATE 2 84 #define DRM_MODE_LINK_STATUS_GOOD 0 85 #define DRM_MODE_LINK_STATUS_BAD 1 86 #define DRM_MODE_ROTATE_0 (1 << 0) 87 #define DRM_MODE_ROTATE_90 (1 << 1) 88 #define DRM_MODE_ROTATE_180 (1 << 2) 89 #define DRM_MODE_ROTATE_270 (1 << 3) 90 #define DRM_MODE_ROTATE_MASK (DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270) 91 #define DRM_MODE_REFLECT_X (1 << 4) 92 #define DRM_MODE_REFLECT_Y (1 << 5) 93 #define DRM_MODE_REFLECT_MASK (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y) 94 struct drm_mode_modeinfo { 95 __u32 clock; 96 __u16 hdisplay; 97 __u16 hsync_start; 98 __u16 hsync_end; 99 __u16 htotal; 100 __u16 hskew; 101 __u16 vdisplay; 102 __u16 vsync_start; 103 __u16 vsync_end; 104 __u16 vtotal; 105 __u16 vscan; 106 __u32 vrefresh; 107 __u32 flags; 108 __u32 type; 109 char name[DRM_DISPLAY_MODE_LEN]; 110 }; 111 struct drm_mode_card_res { 112 __u64 fb_id_ptr; 113 __u64 crtc_id_ptr; 114 __u64 connector_id_ptr; 115 __u64 encoder_id_ptr; 116 __u32 count_fbs; 117 __u32 count_crtcs; 118 __u32 count_connectors; 119 __u32 count_encoders; 120 __u32 min_width; 121 __u32 max_width; 122 __u32 min_height; 123 __u32 max_height; 124 }; 125 struct drm_mode_crtc { 126 __u64 set_connectors_ptr; 127 __u32 count_connectors; 128 __u32 crtc_id; 129 __u32 fb_id; 130 __u32 x; 131 __u32 y; 132 __u32 gamma_size; 133 __u32 mode_valid; 134 struct drm_mode_modeinfo mode; 135 }; 136 #define DRM_MODE_PRESENT_TOP_FIELD (1 << 0) 137 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1) 138 struct drm_mode_set_plane { 139 __u32 plane_id; 140 __u32 crtc_id; 141 __u32 fb_id; 142 __u32 flags; 143 __s32 crtc_x; 144 __s32 crtc_y; 145 __u32 crtc_w; 146 __u32 crtc_h; 147 __u32 src_x; 148 __u32 src_y; 149 __u32 src_h; 150 __u32 src_w; 151 }; 152 struct drm_mode_get_plane { 153 __u32 plane_id; 154 __u32 crtc_id; 155 __u32 fb_id; 156 __u32 possible_crtcs; 157 __u32 gamma_size; 158 __u32 count_format_types; 159 __u64 format_type_ptr; 160 }; 161 struct drm_mode_get_plane_res { 162 __u64 plane_id_ptr; 163 __u32 count_planes; 164 }; 165 #define DRM_MODE_ENCODER_NONE 0 166 #define DRM_MODE_ENCODER_DAC 1 167 #define DRM_MODE_ENCODER_TMDS 2 168 #define DRM_MODE_ENCODER_LVDS 3 169 #define DRM_MODE_ENCODER_TVDAC 4 170 #define DRM_MODE_ENCODER_VIRTUAL 5 171 #define DRM_MODE_ENCODER_DSI 6 172 #define DRM_MODE_ENCODER_DPMST 7 173 #define DRM_MODE_ENCODER_DPI 8 174 struct drm_mode_get_encoder { 175 __u32 encoder_id; 176 __u32 encoder_type; 177 __u32 crtc_id; 178 __u32 possible_crtcs; 179 __u32 possible_clones; 180 }; 181 enum drm_mode_subconnector { 182 DRM_MODE_SUBCONNECTOR_Automatic = 0, 183 DRM_MODE_SUBCONNECTOR_Unknown = 0, 184 DRM_MODE_SUBCONNECTOR_DVID = 3, 185 DRM_MODE_SUBCONNECTOR_DVIA = 4, 186 DRM_MODE_SUBCONNECTOR_Composite = 5, 187 DRM_MODE_SUBCONNECTOR_SVIDEO = 6, 188 DRM_MODE_SUBCONNECTOR_Component = 8, 189 DRM_MODE_SUBCONNECTOR_SCART = 9, 190 }; 191 #define DRM_MODE_CONNECTOR_Unknown 0 192 #define DRM_MODE_CONNECTOR_VGA 1 193 #define DRM_MODE_CONNECTOR_DVII 2 194 #define DRM_MODE_CONNECTOR_DVID 3 195 #define DRM_MODE_CONNECTOR_DVIA 4 196 #define DRM_MODE_CONNECTOR_Composite 5 197 #define DRM_MODE_CONNECTOR_SVIDEO 6 198 #define DRM_MODE_CONNECTOR_LVDS 7 199 #define DRM_MODE_CONNECTOR_Component 8 200 #define DRM_MODE_CONNECTOR_9PinDIN 9 201 #define DRM_MODE_CONNECTOR_DisplayPort 10 202 #define DRM_MODE_CONNECTOR_HDMIA 11 203 #define DRM_MODE_CONNECTOR_HDMIB 12 204 #define DRM_MODE_CONNECTOR_TV 13 205 #define DRM_MODE_CONNECTOR_eDP 14 206 #define DRM_MODE_CONNECTOR_VIRTUAL 15 207 #define DRM_MODE_CONNECTOR_DSI 16 208 #define DRM_MODE_CONNECTOR_DPI 17 209 struct drm_mode_get_connector { 210 __u64 encoders_ptr; 211 __u64 modes_ptr; 212 __u64 props_ptr; 213 __u64 prop_values_ptr; 214 __u32 count_modes; 215 __u32 count_props; 216 __u32 count_encoders; 217 __u32 encoder_id; 218 __u32 connector_id; 219 __u32 connector_type; 220 __u32 connector_type_id; 221 __u32 connection; 222 __u32 mm_width; 223 __u32 mm_height; 224 __u32 subpixel; 225 __u32 pad; 226 }; 227 #define DRM_MODE_PROP_PENDING (1 << 0) 228 #define DRM_MODE_PROP_RANGE (1 << 1) 229 #define DRM_MODE_PROP_IMMUTABLE (1 << 2) 230 #define DRM_MODE_PROP_ENUM (1 << 3) 231 #define DRM_MODE_PROP_BLOB (1 << 4) 232 #define DRM_MODE_PROP_BITMASK (1 << 5) 233 #define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK) 234 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 235 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 236 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 237 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 238 #define DRM_MODE_PROP_ATOMIC 0x80000000 239 struct drm_mode_property_enum { 240 __u64 value; 241 char name[DRM_PROP_NAME_LEN]; 242 }; 243 struct drm_mode_get_property { 244 __u64 values_ptr; 245 __u64 enum_blob_ptr; 246 __u32 prop_id; 247 __u32 flags; 248 char name[DRM_PROP_NAME_LEN]; 249 __u32 count_values; 250 __u32 count_enum_blobs; 251 }; 252 struct drm_mode_connector_set_property { 253 __u64 value; 254 __u32 prop_id; 255 __u32 connector_id; 256 }; 257 #define DRM_MODE_OBJECT_CRTC 0xcccccccc 258 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 259 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 260 #define DRM_MODE_OBJECT_MODE 0xdededede 261 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 262 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb 263 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 264 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 265 #define DRM_MODE_OBJECT_ANY 0 266 struct drm_mode_obj_get_properties { 267 __u64 props_ptr; 268 __u64 prop_values_ptr; 269 __u32 count_props; 270 __u32 obj_id; 271 __u32 obj_type; 272 }; 273 struct drm_mode_obj_set_property { 274 __u64 value; 275 __u32 prop_id; 276 __u32 obj_id; 277 __u32 obj_type; 278 }; 279 struct drm_mode_get_blob { 280 __u32 blob_id; 281 __u32 length; 282 __u64 data; 283 }; 284 struct drm_mode_fb_cmd { 285 __u32 fb_id; 286 __u32 width; 287 __u32 height; 288 __u32 pitch; 289 __u32 bpp; 290 __u32 depth; 291 __u32 handle; 292 }; 293 #define DRM_MODE_FB_INTERLACED (1 << 0) 294 #define DRM_MODE_FB_MODIFIERS (1 << 1) 295 #define DRM_MODE_FB_SECURE (1 << 2) 296 struct drm_mode_fb_cmd2 { 297 __u32 fb_id; 298 __u32 width; 299 __u32 height; 300 __u32 pixel_format; 301 __u32 flags; 302 __u32 handles[4]; 303 __u32 pitches[4]; 304 __u32 offsets[4]; 305 __u64 modifier[4]; 306 }; 307 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 308 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 309 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 310 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 311 struct drm_mode_fb_dirty_cmd { 312 __u32 fb_id; 313 __u32 flags; 314 __u32 color; 315 __u32 num_clips; 316 __u64 clips_ptr; 317 }; 318 struct drm_mode_mode_cmd { 319 __u32 connector_id; 320 struct drm_mode_modeinfo mode; 321 }; 322 #define DRM_MODE_CURSOR_BO 0x01 323 #define DRM_MODE_CURSOR_MOVE 0x02 324 #define DRM_MODE_CURSOR_FLAGS 0x03 325 struct drm_mode_cursor { 326 __u32 flags; 327 __u32 crtc_id; 328 __s32 x; 329 __s32 y; 330 __u32 width; 331 __u32 height; 332 __u32 handle; 333 }; 334 struct drm_mode_cursor2 { 335 __u32 flags; 336 __u32 crtc_id; 337 __s32 x; 338 __s32 y; 339 __u32 width; 340 __u32 height; 341 __u32 handle; 342 __s32 hot_x; 343 __s32 hot_y; 344 }; 345 struct drm_mode_crtc_lut { 346 __u32 crtc_id; 347 __u32 gamma_size; 348 __u64 red; 349 __u64 green; 350 __u64 blue; 351 }; 352 struct drm_color_ctm { 353 __s64 matrix[9]; 354 }; 355 struct drm_color_lut { 356 __u16 red; 357 __u16 green; 358 __u16 blue; 359 __u16 reserved; 360 }; 361 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 362 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 363 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 364 #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8 365 #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | DRM_MODE_PAGE_FLIP_TARGET_RELATIVE) 366 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_PAGE_FLIP_TARGET) 367 struct drm_mode_crtc_page_flip { 368 __u32 crtc_id; 369 __u32 fb_id; 370 __u32 flags; 371 __u32 reserved; 372 __u64 user_data; 373 }; 374 struct drm_mode_crtc_page_flip_target { 375 __u32 crtc_id; 376 __u32 fb_id; 377 __u32 flags; 378 __u32 sequence; 379 __u64 user_data; 380 }; 381 struct drm_mode_create_dumb { 382 __u32 height; 383 __u32 width; 384 __u32 bpp; 385 __u32 flags; 386 __u32 handle; 387 __u32 pitch; 388 __u64 size; 389 }; 390 struct drm_mode_map_dumb { 391 __u32 handle; 392 __u32 pad; 393 __u64 offset; 394 }; 395 struct drm_mode_destroy_dumb { 396 __u32 handle; 397 }; 398 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 399 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 400 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 401 #define DRM_MODE_ATOMIC_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_NONBLOCK | DRM_MODE_ATOMIC_ALLOW_MODESET) 402 struct drm_mode_atomic { 403 __u32 flags; 404 __u32 count_objs; 405 __u64 objs_ptr; 406 __u64 count_props_ptr; 407 __u64 props_ptr; 408 __u64 prop_values_ptr; 409 __u64 reserved; 410 __u64 user_data; 411 }; 412 struct drm_format_modifier_blob { 413 #define FORMAT_BLOB_CURRENT 1 414 __u32 version; 415 __u32 flags; 416 __u32 count_formats; 417 __u32 formats_offset; 418 __u32 count_modifiers; 419 __u32 modifiers_offset; 420 }; 421 struct drm_format_modifier { 422 __u64 formats; 423 __u32 offset; 424 __u32 pad; 425 __u64 modifier; 426 }; 427 struct drm_mode_create_blob { 428 __u64 data; 429 __u32 length; 430 __u32 blob_id; 431 }; 432 struct drm_mode_destroy_blob { 433 __u32 blob_id; 434 }; 435 struct drm_mode_create_lease { 436 __u64 object_ids; 437 __u32 object_count; 438 __u32 flags; 439 __u32 lessee_id; 440 __u32 fd; 441 }; 442 struct drm_mode_list_lessees { 443 __u32 count_lessees; 444 __u32 pad; 445 __u64 lessees_ptr; 446 }; 447 struct drm_mode_get_lease { 448 __u32 count_objects; 449 __u32 pad; 450 __u64 objects_ptr; 451 }; 452 struct drm_mode_revoke_lease { 453 __u32 lessee_id; 454 }; 455 #ifdef __cplusplus 456 } 457 #endif 458 #endif 459