1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __UAPI_AB_SM_H__ 20 #define __UAPI_AB_SM_H__ 21 #include <linux/ioctl.h> 22 #define AB_SM_FATAL_EL2_ERROR_FLAG 0x01 23 #define AB_SM_COMPUTE_READY_MASK 0x01 24 #define AB_SM_DRAM_INTACT_MASK 0x02 25 #define AB_SM_IOCTL_MAGIC 'a' 26 #define AB_SM_ENTER_EL2 _IO(AB_SM_IOCTL_MAGIC, 3) 27 #define AB_SM_EXIT_EL2 _IO(AB_SM_IOCTL_MAGIC, 4) 28 #define AB_SM_SET_IPU_FREQUENCY _IOW(AB_SM_IOCTL_MAGIC, 5, int) 29 #define AB_SM_SET_TPU_FREQUENCY _IOW(AB_SM_IOCTL_MAGIC, 6, int) 30 #define AB_SM_SET_DDR_FREQUENCY _IOW(AB_SM_IOCTL_MAGIC, 7, int) 31 #define AB_SM_SET_PCIE_FREQUENCY _IOW(AB_SM_IOCTL_MAGIC, 8, int) 32 #define AB_SM_SET_AON_FREQUENCY _IOW(AB_SM_IOCTL_MAGIC, 9, int) 33 #define AB_SM_SET_IPU_STATE _IOW(AB_SM_IOCTL_MAGIC, 10, int) 34 #define AB_SM_SET_TPU_STATE _IOW(AB_SM_IOCTL_MAGIC, 11, int) 35 #define AB_SM_SET_DDR_STATE _IOW(AB_SM_IOCTL_MAGIC, 12, int) 36 #define AB_SM_SET_PCIE_STATE _IOW(AB_SM_IOCTL_MAGIC, 13, int) 37 #define AB_SM_UPDATE_IPU_STATE_PROPERTIES _IOW(AB_SM_IOCTL_MAGIC, 14, struct new_block_props *) 38 #define AB_SM_UPDATE_TPU_STATE_PROPERTIES _IOW(AB_SM_IOCTL_MAGIC, 15, struct new_block_props *) 39 #define AB_SM_UPDATE_DRAM_STATE_PROPERTIES _IOW(AB_SM_IOCTL_MAGIC, 16, struct new_block_props *) 40 #define AB_SM_UPDATE_MIF_STATE_PROPERTIES _IOW(AB_SM_IOCTL_MAGIC, 17, struct new_block_props *) 41 #define AB_SM_UPDATE_FSYS_STATE_PROPERTIES _IOW(AB_SM_IOCTL_MAGIC, 18, struct new_block_props *) 42 #define AB_SM_UPDATE_AON_STATE_PROPERTIES _IOW(AB_SM_IOCTL_MAGIC, 19, struct new_block_props *) 43 #define AB_SM_GET_EL2_MODE _IOR(AB_SM_IOCTL_MAGIC, 20, int *) 44 #define AB_SM_MAPPED_ASYNC_NOTIFY _IOR(AB_SM_IOCTL_MAGIC, 21, int *) 45 #define AB_SM_MAPPED_SET_STATE _IOW(AB_SM_IOCTL_MAGIC, 22, int) 46 #define AB_SM_MAPPED_GET_STATE _IOR(AB_SM_IOCTL_MAGIC, 23, int *) 47 #define AB_SM_SET_PCIE_L1SS_DELAY _IOW(AB_SM_IOCTL_MAGIC, 24, int) 48 #define AB_SM_COMPUTE_READY_NOTIFY _IOR(AB_SM_IOCTL_MAGIC, 25, int *) 49 #define AB_SM_SET_THROTTLE_LEVEL _IOW(AB_SM_IOCTL_MAGIC, 26, int) 50 #define AB_SM_ENABLE_THERMAL _IOW(AB_SM_IOCTL_MAGIC, 27, int) 51 #define AB_SM_EXIT_EL2_WITH_FLAG _IOW(AB_SM_IOCTL_MAGIC, 28, int) 52 #define AB_SM_GET_THERMAL_LEVEL _IOR(AB_SM_IOCTL_MAGIC, 29, int *) 53 #define AB_CHIP_ID_UNKNOWN - 1 54 #define AB_CHIP_ID_A0 0 55 #define AB_CHIP_ID_B0 1 56 #define UAPI_BLK_(num,pmu,rail,v,clk,freq,pwr,used,tiles,dr) { UAPI_BLOCK_STATE_ ##num, (enum uapi_pmu_state) pmu, uapi_ ##rail, UAPI_VOLTAGE_ ##v, uapi_ ##clk, (__u64) (1000000. * freq), pwr, used, tiles, dr, } 57 #define AB_SM_UAPI_NUM_BLOCK_STATES 12 58 enum uapi_block_state { 59 UAPI_BLOCK_STATE_0 = 0, 60 UAPI_BLOCK_STATE_100 = 100, 61 UAPI_BLOCK_STATE_101, 62 UAPI_BLOCK_STATE_200 = 200, 63 UAPI_BLOCK_STATE_201, 64 UAPI_BLOCK_STATE_202, 65 UAPI_BLOCK_STATE_300 = 300, 66 UAPI_BLOCK_STATE_301, 67 UAPI_BLOCK_STATE_302, 68 UAPI_BLOCK_STATE_303, 69 UAPI_BLOCK_STATE_304, 70 UAPI_BLOCK_STATE_305, 71 }; 72 enum uapi_pmu_state { 73 UAPI_PMU_STATE_ON = 0, 74 UAPI_PMU_STATE_SLEEP, 75 UAPI_PMU_STATE_DEEP_SLEEP, 76 UAPI_PMU_STATE_OFF 77 }; 78 enum uapi_state { 79 uapi_off = 0, 80 uapi_on = 1, 81 }; 82 enum uapi_logic_voltage { 83 UAPI_VOLTAGE_0_0, 84 UAPI_VOLTAGE_0_60, 85 UAPI_VOLTAGE_0_75, 86 UAPI_VOLTAGE_0_85, 87 }; 88 struct uapi_block_properties { 89 enum uapi_block_state id; 90 enum uapi_pmu_state pmu; 91 enum uapi_state rail_en; 92 enum uapi_logic_voltage logic_voltage; 93 enum uapi_state clk_status; 94 __u64 clk_frequency; 95 __u32 num_powered_cores; 96 __u32 num_computing_cores; 97 __u32 num_powered_tiles; 98 __u32 data_rate; 99 }; 100 struct new_block_props { 101 struct uapi_block_properties table[AB_SM_UAPI_NUM_BLOCK_STATES]; 102 }; 103 #endif 104