1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __UAPI_LINUX_CAM_REQ_MGR_H 20 #define __UAPI_LINUX_CAM_REQ_MGR_H 21 #include <linux/videodev2.h> 22 #include <linux/types.h> 23 #include <linux/ioctl.h> 24 #include <linux/media.h> 25 #include <media/cam_defs.h> 26 #define CAM_REQ_MGR_VNODE_NAME "cam-req-mgr-devnode" 27 #define CAM_DEVICE_TYPE_BASE (MEDIA_ENT_F_OLD_BASE) 28 #define CAM_VNODE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE) 29 #define CAM_SENSOR_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 1) 30 #define CAM_IFE_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 2) 31 #define CAM_ICP_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 3) 32 #define CAM_LRME_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 4) 33 #define CAM_JPEG_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 5) 34 #define CAM_FD_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 6) 35 #define CAM_CPAS_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 7) 36 #define CAM_CSIPHY_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 8) 37 #define CAM_ACTUATOR_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 9) 38 #define CAM_CCI_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 10) 39 #define CAM_FLASH_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 11) 40 #define CAM_EEPROM_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 12) 41 #define CAM_OIS_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 13) 42 #define CAM_CUSTOM_DEVICE_TYPE (CAM_DEVICE_TYPE_BASE + 14) 43 #define CAM_REQ_MGR_HDL_IDX_POS 8 44 #define CAM_REQ_MGR_HDL_IDX_MASK ((1 << CAM_REQ_MGR_HDL_IDX_POS) - 1) 45 #define CAM_REQ_MGR_GET_HDL_IDX(hdl) (hdl & CAM_REQ_MGR_HDL_IDX_MASK) 46 #define CAM_REQ_MGR_MAX_HANDLES 64 47 #define CAM_REQ_MGR_MAX_HANDLES_V2 128 48 #define MAX_LINKS_PER_SESSION 2 49 #define V4L_EVENT_CAM_REQ_MGR_EVENT (V4L2_EVENT_PRIVATE_START + 0) 50 #define V4L_EVENT_CAM_REQ_MGR_SOF 0 51 #define V4L_EVENT_CAM_REQ_MGR_ERROR 1 52 #define V4L_EVENT_CAM_REQ_MGR_SOF_BOOT_TS 2 53 #define V4L_EVENT_CAM_REQ_MGR_VSYNC_TS 3 54 #define V4L_EVENT_CAM_REQ_MGR_CUSTOM_EVT 4 55 #define CAM_REQ_MGR_SOF_EVENT_SUCCESS 0 56 #define CAM_REQ_MGR_SOF_EVENT_ERROR 1 57 #define CAM_REQ_MGR_LINK_ACTIVATE 0 58 #define CAM_REQ_MGR_LINK_DEACTIVATE 1 59 #define CAM_REQ_MGR_FLUSH_TYPE_ALL 0 60 #define CAM_REQ_MGR_FLUSH_TYPE_CANCEL_REQ 1 61 #define CAM_REQ_MGR_FLUSH_TYPE_MAX 2 62 #define CAM_REQ_MGR_SYNC_MODE_NO_SYNC 0 63 #define CAM_REQ_MGR_SYNC_MODE_SYNC 1 64 struct cam_req_mgr_event_data { 65 int32_t session_hdl; 66 int32_t link_hdl; 67 int32_t frame_id; 68 int32_t reserved; 69 int64_t req_id; 70 uint64_t tv_sec; 71 uint64_t tv_usec; 72 }; 73 struct cam_req_mgr_session_info { 74 int32_t session_hdl; 75 int32_t reserved; 76 }; 77 struct cam_req_mgr_link_info { 78 int32_t session_hdl; 79 uint32_t num_devices; 80 int32_t dev_hdls[CAM_REQ_MGR_MAX_HANDLES]; 81 int32_t link_hdl; 82 }; 83 struct cam_req_mgr_link_info_v2 { 84 int32_t session_hdl; 85 uint32_t num_devices; 86 int32_t dev_hdls[CAM_REQ_MGR_MAX_HANDLES_V2]; 87 int32_t link_hdl; 88 }; 89 struct cam_req_mgr_ver_info { 90 uint32_t version; 91 union { 92 struct cam_req_mgr_link_info link_info_v1; 93 struct cam_req_mgr_link_info_v2 link_info_v2; 94 } u; 95 }; 96 struct cam_req_mgr_unlink_info { 97 int32_t session_hdl; 98 int32_t link_hdl; 99 }; 100 struct cam_req_mgr_flush_info { 101 int32_t session_hdl; 102 int32_t link_hdl; 103 uint32_t flush_type; 104 uint32_t reserved; 105 int64_t req_id; 106 }; 107 struct cam_req_mgr_sched_request { 108 int32_t session_hdl; 109 int32_t link_hdl; 110 int32_t bubble_enable; 111 int32_t sync_mode; 112 int32_t additional_timeout; 113 int32_t reserved; 114 int64_t req_id; 115 }; 116 struct cam_req_mgr_sync_mode { 117 int32_t session_hdl; 118 int32_t sync_mode; 119 int32_t num_links; 120 int32_t link_hdls[MAX_LINKS_PER_SESSION]; 121 int32_t master_link_hdl; 122 int32_t reserved; 123 }; 124 struct cam_req_mgr_link_control { 125 int32_t ops; 126 int32_t session_hdl; 127 int32_t num_links; 128 int32_t reserved; 129 int32_t link_hdls[MAX_LINKS_PER_SESSION]; 130 }; 131 #define CAM_REQ_MGR_CREATE_DEV_NODES (CAM_COMMON_OPCODE_MAX + 1) 132 #define CAM_REQ_MGR_CREATE_SESSION (CAM_COMMON_OPCODE_MAX + 2) 133 #define CAM_REQ_MGR_DESTROY_SESSION (CAM_COMMON_OPCODE_MAX + 3) 134 #define CAM_REQ_MGR_LINK (CAM_COMMON_OPCODE_MAX + 4) 135 #define CAM_REQ_MGR_UNLINK (CAM_COMMON_OPCODE_MAX + 5) 136 #define CAM_REQ_MGR_SCHED_REQ (CAM_COMMON_OPCODE_MAX + 6) 137 #define CAM_REQ_MGR_FLUSH_REQ (CAM_COMMON_OPCODE_MAX + 7) 138 #define CAM_REQ_MGR_SYNC_MODE (CAM_COMMON_OPCODE_MAX + 8) 139 #define CAM_REQ_MGR_ALLOC_BUF (CAM_COMMON_OPCODE_MAX + 9) 140 #define CAM_REQ_MGR_MAP_BUF (CAM_COMMON_OPCODE_MAX + 10) 141 #define CAM_REQ_MGR_RELEASE_BUF (CAM_COMMON_OPCODE_MAX + 11) 142 #define CAM_REQ_MGR_CACHE_OPS (CAM_COMMON_OPCODE_MAX + 12) 143 #define CAM_REQ_MGR_LINK_CONTROL (CAM_COMMON_OPCODE_MAX + 13) 144 #define CAM_REQ_MGR_LINK_V2 (CAM_COMMON_OPCODE_MAX + 14) 145 #define CAM_REQ_MGR_REQUEST_DUMP (CAM_COMMON_OPCODE_MAX + 15) 146 #define CAM_MEM_FLAG_HW_READ_WRITE (1 << 0) 147 #define CAM_MEM_FLAG_HW_READ_ONLY (1 << 1) 148 #define CAM_MEM_FLAG_HW_WRITE_ONLY (1 << 2) 149 #define CAM_MEM_FLAG_KMD_ACCESS (1 << 3) 150 #define CAM_MEM_FLAG_UMD_ACCESS (1 << 4) 151 #define CAM_MEM_FLAG_PROTECTED_MODE (1 << 5) 152 #define CAM_MEM_FLAG_CMD_BUF_TYPE (1 << 6) 153 #define CAM_MEM_FLAG_PIXEL_BUF_TYPE (1 << 7) 154 #define CAM_MEM_FLAG_STATS_BUF_TYPE (1 << 8) 155 #define CAM_MEM_FLAG_PACKET_BUF_TYPE (1 << 9) 156 #define CAM_MEM_FLAG_CACHE (1 << 10) 157 #define CAM_MEM_FLAG_HW_SHARED_ACCESS (1 << 11) 158 #define CAM_MEM_FLAG_CDSP_OUTPUT (1 << 12) 159 #define CAM_MEM_FLAG_DISABLE_DELAYED_UNMAP (1 << 13) 160 #define CAM_MEM_MMU_MAX_HANDLE 16 161 #define CAM_MEM_BUFQ_MAX 1024 162 #define CAM_MEM_MGR_SECURE_BIT_POS 15 163 #define CAM_MEM_MGR_HDL_IDX_SIZE 15 164 #define CAM_MEM_MGR_HDL_FD_SIZE 16 165 #define CAM_MEM_MGR_HDL_IDX_END_POS 16 166 #define CAM_MEM_MGR_HDL_FD_END_POS 32 167 #define CAM_MEM_MGR_HDL_IDX_MASK ((1 << CAM_MEM_MGR_HDL_IDX_SIZE) - 1) 168 #define GET_MEM_HANDLE(idx,fd) ((idx & CAM_MEM_MGR_HDL_IDX_MASK) | (fd << (CAM_MEM_MGR_HDL_FD_END_POS - CAM_MEM_MGR_HDL_FD_SIZE))) 169 #define GET_FD_FROM_HANDLE(hdl) (hdl >> (CAM_MEM_MGR_HDL_FD_END_POS - CAM_MEM_MGR_HDL_FD_SIZE)) 170 #define CAM_MEM_MGR_GET_HDL_IDX(hdl) (hdl & CAM_MEM_MGR_HDL_IDX_MASK) 171 #define CAM_MEM_MGR_SET_SECURE_HDL(hdl,flag) ((flag) ? (hdl |= (1 << CAM_MEM_MGR_SECURE_BIT_POS)) : ((hdl) &= ~(1 << CAM_MEM_MGR_SECURE_BIT_POS))) 172 #define CAM_MEM_MGR_IS_SECURE_HDL(hdl) (((hdl) & (1 << CAM_MEM_MGR_SECURE_BIT_POS)) >> CAM_MEM_MGR_SECURE_BIT_POS) 173 #define CAM_MEM_DMA_NONE 0 174 #define CAM_MEM_DMA_BIDIRECTIONAL 1 175 #define CAM_MEM_DMA_TO_DEVICE 2 176 #define CAM_MEM_DMA_FROM_DEVICE 3 177 #define CAM_MEM_CLEAN_CACHE 1 178 #define CAM_MEM_INV_CACHE 2 179 #define CAM_MEM_CLEAN_INV_CACHE 3 180 struct cam_mem_alloc_out_params { 181 uint32_t buf_handle; 182 int32_t fd; 183 uint64_t vaddr; 184 }; 185 struct cam_mem_map_out_params { 186 uint32_t buf_handle; 187 uint32_t reserved; 188 uint64_t vaddr; 189 }; 190 struct cam_mem_mgr_alloc_cmd { 191 uint64_t len; 192 uint64_t align; 193 int32_t mmu_hdls[CAM_MEM_MMU_MAX_HANDLE]; 194 uint32_t num_hdl; 195 uint32_t flags; 196 struct cam_mem_alloc_out_params out; 197 }; 198 struct cam_mem_mgr_map_cmd { 199 int32_t mmu_hdls[CAM_MEM_MMU_MAX_HANDLE]; 200 uint32_t num_hdl; 201 uint32_t flags; 202 int32_t fd; 203 uint32_t reserved; 204 struct cam_mem_map_out_params out; 205 }; 206 struct cam_mem_mgr_release_cmd { 207 int32_t buf_handle; 208 uint32_t reserved; 209 }; 210 struct cam_mem_cache_ops_cmd { 211 int32_t buf_handle; 212 uint32_t mem_cache_ops; 213 }; 214 #define CAM_REQ_MGR_ERROR_TYPE_DEVICE 0 215 #define CAM_REQ_MGR_ERROR_TYPE_REQUEST 1 216 #define CAM_REQ_MGR_ERROR_TYPE_BUFFER 2 217 #define CAM_REQ_MGR_ERROR_TYPE_RECOVERY 3 218 #define CAM_REQ_MGR_ERROR_TYPE_SOF_FREEZE 4 219 #define CAM_REQ_MGR_ERROR_TYPE_FULL_RECOVERY 5 220 struct cam_req_mgr_error_msg { 221 uint32_t error_type; 222 uint32_t request_id; 223 int32_t device_hdl; 224 int32_t link_hdl; 225 uint64_t resource_size; 226 }; 227 struct cam_req_mgr_frame_msg { 228 uint64_t request_id; 229 uint64_t frame_id; 230 uint64_t timestamp; 231 uint64_t bf_timestamp; 232 int32_t link_hdl; 233 uint32_t sof_status; 234 uint32_t frame_id_meta; 235 uint32_t reserved; 236 }; 237 struct cam_req_mgr_custom_msg { 238 uint32_t custom_type; 239 uint64_t request_id; 240 uint64_t frame_id; 241 uint64_t timestamp; 242 int32_t link_hdl; 243 uint64_t custom_data; 244 }; 245 struct cam_req_mgr_message { 246 int32_t session_hdl; 247 int32_t reserved; 248 union { 249 struct cam_req_mgr_error_msg err_msg; 250 struct cam_req_mgr_frame_msg frame_msg; 251 struct cam_req_mgr_custom_msg custom_msg; 252 } u; 253 }; 254 #endif 255